diff options
Diffstat (limited to 'cpu/arm926ejs/at91/at91cap9_devices.c')
| -rw-r--r-- | cpu/arm926ejs/at91/at91cap9_devices.c | 100 |
1 files changed, 50 insertions, 50 deletions
diff --git a/cpu/arm926ejs/at91/at91cap9_devices.c b/cpu/arm926ejs/at91/at91cap9_devices.c index 39e405fee1..518a8d7002 100644 --- a/cpu/arm926ejs/at91/at91cap9_devices.c +++ b/cpu/arm926ejs/at91/at91cap9_devices.c @@ -34,29 +34,29 @@ void at91_serial0_hw_init(void) { - at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */ + at91_set_a_periph(AT91_PIO_PORTA, 22, 1); /* TXD0 */ + at91_set_a_periph(AT91_PIO_PORTA, 23, 0); /* RXD0 */ at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US0); } void at91_serial1_hw_init(void) { - at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ + at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* TXD1 */ + at91_set_a_periph(AT91_PIO_PORTD, 1, 0); /* RXD1 */ at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US1); } void at91_serial2_hw_init(void) { - at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ + at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* TXD2 */ + at91_set_a_periph(AT91_PIO_PORTD, 3, 0); /* RXD2 */ at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US2); } void at91_serial3_hw_init(void) { - at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ + at91_set_a_periph(AT91_PIO_PORTC, 30, 0); /* DRXD */ + at91_set_a_periph(AT91_PIO_PORTC, 31, 1); /* DTXD */ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); } @@ -82,71 +82,71 @@ void at91_serial_hw_init(void) #ifdef CONFIG_HAS_DATAFLASH void at91_spi0_hw_init(unsigned long cs_mask) { - at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ - at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ - at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + at91_set_b_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */ + at91_set_b_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */ + at91_set_b_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */ /* Enable clock */ at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0); if (cs_mask & (1 << 0)) { - at91_set_B_periph(AT91_PIN_PA5, 1); + at91_set_b_periph(AT91_PIO_PORTA, 5, 1); } if (cs_mask & (1 << 1)) { - at91_set_B_periph(AT91_PIN_PA3, 1); + at91_set_b_periph(AT91_PIO_PORTA, 3, 1); } if (cs_mask & (1 << 2)) { - at91_set_B_periph(AT91_PIN_PD0, 1); + at91_set_b_periph(AT91_PIO_PORTD, 0, 1); } if (cs_mask & (1 << 3)) { - at91_set_B_periph(AT91_PIN_PD1, 1); + at91_set_b_periph(AT91_PIO_PORTD, 1, 1); } if (cs_mask & (1 << 4)) { - at91_set_gpio_output(AT91_PIN_PA5, 1); + at91_set_pio_output(AT91_PIO_PORTA, 5, 1); } if (cs_mask & (1 << 5)) { - at91_set_gpio_output(AT91_PIN_PA3, 1); + at91_set_pio_output(AT91_PIO_PORTA, 3, 1); } if (cs_mask & (1 << 6)) { - at91_set_gpio_output(AT91_PIN_PD0, 1); + at91_set_pio_output(AT91_PIO_PORTD, 0, 1); } if (cs_mask & (1 << 7)) { - at91_set_gpio_output(AT91_PIN_PD1, 1); + at91_set_pio_output(AT91_PIO_PORTD, 1, 1); } } void at91_spi1_hw_init(unsigned long cs_mask) { - at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ - at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ - at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ + at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* SPI1_MISO */ + at91_set_a_periph(AT91_PIO_PORTB, 13, 0); /* SPI1_MOSI */ + at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* SPI1_SPCK */ /* Enable clock */ at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI1); if (cs_mask & (1 << 0)) { - at91_set_A_periph(AT91_PIN_PB15, 1); + at91_set_a_periph(AT91_PIO_PORTB, 15, 1); } if (cs_mask & (1 << 1)) { - at91_set_A_periph(AT91_PIN_PB16, 1); + at91_set_a_periph(AT91_PIO_PORTB, 16, 1); } if (cs_mask & (1 << 2)) { - at91_set_A_periph(AT91_PIN_PB17, 1); + at91_set_a_periph(AT91_PIO_PORTB, 17, 1); } if (cs_mask & (1 << 3)) { - at91_set_A_periph(AT91_PIN_PB18, 1); + at91_set_a_periph(AT91_PIO_PORTB, 18, 1); } if (cs_mask & (1 << 4)) { - at91_set_gpio_output(AT91_PIN_PB15, 1); + at91_set_pio_output(AT91_PIO_PORTB, 15, 1); } if (cs_mask & (1 << 5)) { - at91_set_gpio_output(AT91_PIN_PB16, 1); + at91_set_pio_output(AT91_PIO_PORTB, 16, 1); } if (cs_mask & (1 << 6)) { - at91_set_gpio_output(AT91_PIN_PB17, 1); + at91_set_pio_output(AT91_PIO_PORTB, 17, 1); } if (cs_mask & (1 << 7)) { - at91_set_gpio_output(AT91_PIN_PB18, 1); + at91_set_pio_output(AT91_PIO_PORTB, 18, 1); } } @@ -155,26 +155,26 @@ void at91_spi1_hw_init(unsigned long cs_mask) #ifdef CONFIG_MACB void at91_macb_hw_init(void) { - at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */ - at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */ - at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */ - at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */ - at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */ - at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */ - at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */ - at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */ - at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */ - at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */ + at91_set_a_periph(AT91_PIO_PORTB, 21, 0); /* ETXCK_EREFCK */ + at91_set_a_periph(AT91_PIO_PORTB, 22, 0); /* ERXDV */ + at91_set_a_periph(AT91_PIO_PORTB, 25, 0); /* ERX0 */ + at91_set_a_periph(AT91_PIO_PORTB, 26, 0); /* ERX1 */ + at91_set_a_periph(AT91_PIO_PORTB, 27, 0); /* ERXER */ + at91_set_a_periph(AT91_PIO_PORTB, 28, 0); /* ETXEN */ + at91_set_a_periph(AT91_PIO_PORTB, 23, 0); /* ETX0 */ + at91_set_a_periph(AT91_PIO_PORTB, 24, 0); /* ETX1 */ + at91_set_a_periph(AT91_PIO_PORTB, 30, 0); /* EMDIO */ + at91_set_a_periph(AT91_PIO_PORTB, 29, 0); /* EMDC */ #ifndef CONFIG_RMII - at91_set_B_periph(AT91_PIN_PC25, 0); /* ECRS */ - at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ - at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ - at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ - at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ - at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ - at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ - at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ + at91_set_b_periph(AT91_PIO_PORTC, 25, 0); /* ECRS */ + at91_set_b_periph(AT91_PIO_PORTC, 26, 0); /* ECOL */ + at91_set_b_periph(AT91_PIO_PORTC, 22, 0); /* ERX2 */ + at91_set_b_periph(AT91_PIO_PORTC, 23, 0); /* ERX3 */ + at91_set_b_periph(AT91_PIO_PORTC, 27, 0); /* ERXCK */ + at91_set_b_periph(AT91_PIO_PORTC, 20, 0); /* ETX2 */ + at91_set_b_periph(AT91_PIO_PORTC, 21, 0); /* ETX3 */ + at91_set_b_periph(AT91_PIO_PORTC, 24, 0); /* ETXER */ #endif } #endif @@ -182,8 +182,8 @@ void at91_macb_hw_init(void) #ifdef CONFIG_AT91_CAN void at91_can_hw_init(void) { - at91_set_A_periph(AT91_PIN_PA12, 0); /* CAN_TX */ - at91_set_A_periph(AT91_PIN_PA13, 1); /* CAN_RX */ + at91_set_a_periph(AT91_PIO_PORTA, 12, 0); /* CAN_TX */ + at91_set_a_periph(AT91_PIO_PORTA, 13, 1); /* CAN_RX */ /* Enable clock */ at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_CAN); |