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-rw-r--r--board/ms7722se/lowlevel_init.S56
-rw-r--r--board/r7780mp/lowlevel_init.S3
-rw-r--r--board/sh7785lcr/selfcheck.c4
3 files changed, 39 insertions, 24 deletions
diff --git a/board/ms7722se/lowlevel_init.S b/board/ms7722se/lowlevel_init.S
index 332f65a4ce..8b46595f33 100644
--- a/board/ms7722se/lowlevel_init.S
+++ b/board/ms7722se/lowlevel_init.S
@@ -43,48 +43,61 @@
lowlevel_init:
- mov.l CCR_A, r1 ! Address of Cache Control Register
- mov.l CCR_D, r0 ! Instruction Cache Invalidate
+ /* Address of Cache Control Register */
+ mov.l CCR_A, r1
+ /*Instruction Cache Invalidate */
+ mov.l CCR_D, r0
mov.l r0, @r1
- mov.l MMUCR_A, r1 ! Address of MMU Control Register
- mov.l MMUCR_D, r0 ! TI == TLB Invalidate bit
+ /* Address of MMU Control Register */
+ mov.l MMUCR_A, r1
+ /* TI == TLB Invalidate bit */
+ mov.l MMUCR_D, r0
mov.l r0, @r1
- mov.l MSTPCR0_A, r1 ! Address of Power Control Register 0
- mov.l MSTPCR0_D, r0 !
+ /* Address of Power Control Register 0 */
+ mov.l MSTPCR0_A, r1
+ mov.l MSTPCR0_D, r0
mov.l r0, @r1
- mov.l MSTPCR2_A, r1 ! Address of Power Control Register 2
- mov.l MSTPCR2_D, r0 !
+ /* Address of Power Control Register 2 */
+ mov.l MSTPCR2_A, r1
+ mov.l MSTPCR2_D, r0
mov.l r0, @r1
- mov.l SBSCR_A, r1 !
- mov.w SBSCR_D, r0 !
+ mov.l SBSCR_A, r1
+ mov.w SBSCR_D, r0
mov.w r0, @r1
- mov.l PSCR_A, r1 !
- mov.w PSCR_D, r0 !
+ mov.l PSCR_A, r1
+ mov.w PSCR_D, r0
mov.w r0, @r1
-! mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register)
-! mov.w RWTCSR_D_1, r0 ! 0xA507 -> timer_STOP/WDT_CLK=max
+ /* 0xA4520004 (Watchdog Control / Status Register) */
+! mov.l RWTCSR_A, r1
+ /* 0xA507 -> timer_STOP/WDT_CLK=max */
+! mov.w RWTCSR_D_1, r0
! mov.w r0, @r1
- mov.l RWTCNT_A, r1 ! 0xA4520000 (Watchdog Count Register)
- mov.w RWTCNT_D, r0 ! 0x5A00 -> Clear
+ /* 0xA4520000 (Watchdog Count Register) */
+ mov.l RWTCNT_A, r1
+ /*0x5A00 -> Clear */
+ mov.w RWTCNT_D, r0
mov.w r0, @r1
- mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register)
- mov.w RWTCSR_D_2, r0 ! 0xA504 -> timer_STOP/CLK=500ms
+ /* 0xA4520004 (Watchdog Control / Status Register) */
+ mov.l RWTCSR_A, r1
+ /* 0xA504 -> timer_STOP/CLK=500ms */
+ mov.w RWTCSR_D_2, r0
mov.w r0, @r1
- mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register
+ /* 0xA4150000 Frequency control register */
+ mov.l FRQCR_A, r1
mov.l FRQCR_D, r0 !
mov.l r0, @r1
- mov.l CCR_A, r1 ! Address of Cache Control Register
- mov.l CCR_D_2, r0 ! ??
+ mov.l CCR_A, r1
+ mov.l CCR_D_2, r0
mov.l r0, @r1
bsc_init:
@@ -290,5 +303,6 @@ PSCR_D: .word 0x0000
RWTCSR_D_1: .word 0xA507
RWTCSR_D_2: .word 0xA507
RWTCNT_D: .word 0x5A00
+ .align 2
SR_MASK_D: .long 0xEFFFFF0F
diff --git a/board/r7780mp/lowlevel_init.S b/board/r7780mp/lowlevel_init.S
index 05c075b6ca..ab0499a3a2 100644
--- a/board/r7780mp/lowlevel_init.S
+++ b/board/r7780mp/lowlevel_init.S
@@ -325,8 +325,9 @@ repeat2:
RWTCSR_D_1: .word 0xA507
RWTCSR_D_2: .word 0xA507
RWTCNT_D: .word 0x5A00
+ .align 2
-BBG_PMMR_A: .long 0xFF800010
+BBG_PMMR_A: .long 0xFF800010
BBG_PMSR1_A: .long 0xFF800014
BBG_PMSR2_A: .long 0xFF800018
BBG_PMSR3_A: .long 0xFF80001C
diff --git a/board/sh7785lcr/selfcheck.c b/board/sh7785lcr/selfcheck.c
index d924595b76..ce0620f687 100644
--- a/board/sh7785lcr/selfcheck.c
+++ b/board/sh7785lcr/selfcheck.c
@@ -84,7 +84,7 @@ static void test_net(void)
if (data == 0x816910ec)
printf("Ethernet OK\n");
else
- printf("Ethernet NG, data = %08x\n", data);
+ printf("Ethernet NG, data = %08x\n", (unsigned int)data);
}
static void test_sata(void)
@@ -96,7 +96,7 @@ static void test_sata(void)
if (data == 0x35121095)
printf("SATA OK\n");
else
- printf("SATA NG, data = %08x\n", data);
+ printf("SATA NG, data = %08x\n", (unsigned int)data);
}
static void test_pci(void)