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-rw-r--r--board/actux1/actux1.c105
-rw-r--r--board/actux1/config.mk4
-rw-r--r--board/actux1/u-boot.lds41
-rw-r--r--board/actux2/actux2.c93
-rw-r--r--board/actux2/config.mk4
-rw-r--r--board/actux2/u-boot.lds46
-rw-r--r--board/actux3/actux3.c120
-rw-r--r--board/actux3/config.mk4
-rw-r--r--board/actux3/u-boot.lds52
-rw-r--r--board/actux4/actux4.c103
-rw-r--r--board/actux4/config.mk4
-rw-r--r--board/dvlhost/Makefile50
-rw-r--r--board/dvlhost/dvlhost.c130
-rw-r--r--board/dvlhost/dvlhost_hw.h47
-rw-r--r--board/dvlhost/u-boot.lds87
-rw-r--r--board/dvlhost/watchdog.c43
-rw-r--r--board/ixdp425/config.mk2
-rw-r--r--board/ixdp425/flash.c427
-rw-r--r--board/ixdp425/ixdp425.c155
-rw-r--r--board/prodrive/pdnb3/config.mk2
20 files changed, 803 insertions, 716 deletions
diff --git a/board/actux1/actux1.c b/board/actux1/actux1.c
index 85e3f9e6c4..2f631b7085 100644
--- a/board/actux1/actux1.c
+++ b/board/actux1/actux1.c
@@ -37,49 +37,57 @@
#include <asm/arch/ixp425.h>
#include <asm/io.h>
#include <miiphy.h>
+#ifdef CONFIG_PCI
+#include <pci.h>
+#include <asm/arch/ixp425pci.h>
+#endif
#include "actux1_hw.h"
DECLARE_GLOBAL_DATA_PTR;
-int board_init (void)
+int board_early_init_f(void)
+{
+ /* CS5: Debug port */
+ writel(0x9d520003, IXP425_EXP_CS5);
+ /* CS6: HwRel */
+ writel(0x81860001, IXP425_EXP_CS6);
+ /* CS7: LEDs */
+ writel(0x80900003, IXP425_EXP_CS7);
+ return 0;
+}
+
+int board_init(void)
{
gd->bd->bi_arch_number = MACH_TYPE_ACTUX1;
/* adress of boot parameters */
gd->bd->bi_boot_params = 0x00000100;
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_IORST);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
- /* Setup GPIO's for PCI INTA */
- GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_PCI1_INTA);
- GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_PCI1_INTA);
+ /* Setup GPIOs for PCI INTA */
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI1_INTA);
+ GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI1_INTA);
- /* Setup GPIO's for 33MHz clock output */
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK);
- *IXP425_GPIO_GPCLKR = 0x011001FF;
+ /* Setup GPIOs for 33MHz clock output */
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
+ writel(0x011001FF, IXP425_GPIO_GPCLKR);
- /* CS5: Debug port */
- *IXP425_EXP_CS5 = 0x9d520003;
- /* CS6: HwRel */
- *IXP425_EXP_CS6 = 0x81860001;
- /* CS7: LEDs */
- *IXP425_EXP_CS7 = 0x80900003;
-
- udelay (533);
- GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
+ udelay(533);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
- ACTUX1_LED1 (2);
- ACTUX1_LED2 (2);
- ACTUX1_LED3 (0);
- ACTUX1_LED4 (0);
- ACTUX1_LED5 (0);
- ACTUX1_LED6 (0);
- ACTUX1_LED7 (0);
+ ACTUX1_LED1(2);
+ ACTUX1_LED2(2);
+ ACTUX1_LED3(0);
+ ACTUX1_LED4(0);
+ ACTUX1_LED5(0);
+ ACTUX1_LED6(0);
+ ACTUX1_LED7(0);
- ACTUX1_HS (ACTUX1_HS_DCD);
+ ACTUX1_HS(ACTUX1_HS_DCD);
return 0;
}
@@ -87,21 +95,21 @@ int board_init (void)
/*
* Check Board Identity
*/
-int checkboard (void)
+int checkboard(void)
{
char buf[64];
int i = getenv_f("serial#", buf, sizeof(buf));
- puts ("Board: AcTux-1 rev.");
- putc (ACTUX1_BOARDREL + 'A' - 1);
+ puts("Board: AcTux-1 rev.");
+ putc(ACTUX1_BOARDREL + 'A' - 1);
if (i > 0) {
puts(", serial# ");
puts(buf);
}
- putc ('\n');
+ putc('\n');
- return (0);
+ return 0;
}
/*************************************************************************
@@ -110,39 +118,36 @@ int checkboard (void)
* 1 = Rev. A
* 2 = Rev. B
*************************************************************************/
-u32 get_board_rev (void)
+u32 get_board_rev(void)
{
return ACTUX1_BOARDREL;
}
-int dram_init (void)
+int dram_init(void)
{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
+ gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
+ return 0;
}
-#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
-extern struct pci_controller hose;
-extern void pci_ixp_init (struct pci_controller *hose);
-void pci_init_board (void)
+#ifdef CONFIG_PCI
+struct pci_controller hose;
+
+void pci_init_board(void)
{
- extern void pci_ixp_init (struct pci_controller *hose);
- pci_ixp_init (&hose);
+ pci_ixp_init(&hose);
}
#endif
-void reset_phy (void)
+void reset_phy(void)
{
u16 id1, id2;
/* initialize the PHY */
- miiphy_reset ("NPE0", CONFIG_PHY_ADDR);
+ miiphy_reset("NPE0", CONFIG_PHY_ADDR);
- miiphy_read ("NPE0", CONFIG_PHY_ADDR, MII_PHYSID1, &id1);
- miiphy_read ("NPE0", CONFIG_PHY_ADDR, MII_PHYSID2, &id2);
+ miiphy_read("NPE0", CONFIG_PHY_ADDR, MII_PHYSID1, &id1);
+ miiphy_read("NPE0", CONFIG_PHY_ADDR, MII_PHYSID2, &id2);
id2 &= 0xFFF0; /* mask out revision bits */
@@ -153,9 +158,9 @@ void reset_phy (void)
* LED2 (unused) = LINK,
* LED3(red) = Coll
*/
- miiphy_write ("NPE0", CONFIG_PHY_ADDR, 20, 0xD432);
+ miiphy_write("NPE0", CONFIG_PHY_ADDR, 20, 0xD432);
} else if (id1 == 0x143 && id2 == 0xbc30) {
/* BCM5241: default values are OK */
} else
- printf ("unknown ethernet PHY ID: %x %x\n", id1, id2);
+ printf("unknown ethernet PHY ID: %x %x\n", id1, id2);
}
diff --git a/board/actux1/config.mk b/board/actux1/config.mk
deleted file mode 100644
index 9cb838b738..0000000000
--- a/board/actux1/config.mk
+++ /dev/null
@@ -1,4 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x00e00000
-
-# include NPE ethernet driver
-BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o
diff --git a/board/actux1/u-boot.lds b/board/actux1/u-boot.lds
index 8be2b20c34..9dbaa6faf6 100644
--- a/board/actux1/u-boot.lds
+++ b/board/actux1/u-boot.lds
@@ -30,15 +30,15 @@ SECTIONS
. = ALIGN (4);
.text : {
- arch/arm/cpu/ixp/start.o(.text)
- lib/string.o(.text)
- lib/vsprintf.o(.text)
- arch/arm/lib/board.o(.text)
- common/dlmalloc.o(.text)
- arch/arm/cpu/ixp/cpu.o(.text)
+ arch/arm/cpu/ixp/start.o(.text*)
+ net/libnet.o(.text*)
+ board/actux1/libactux1.o(.text*)
+ arch/arm/cpu/ixp/libixp.o(.text*)
+ drivers/serial/libserial.o(.text*)
+
. = env_offset;
common/env_embedded.o(.ppcenv)
- * (.text)
+ *(.text*)
}
. = ALIGN (4);
@@ -47,7 +47,7 @@ SECTIONS
}
. = ALIGN (4);
.data : {
- *(.data)
+ *(.data*)
}
. = ALIGN (4);
.got : {
@@ -61,10 +61,27 @@ SECTIONS
__u_boot_cmd_end =.;
. = ALIGN (4);
- __bss_start =.;
- .bss (NOLOAD): {
- *(.bss)
- . = ALIGN(4);
+ .rel.dyn : {
+ __rel_dyn_start = .;
+ *(.rel*)
+ __rel_dyn_end = .;
+ }
+
+ .dynsym : {
+ __dynsym_start = .;
+ *(.dynsym)
+ }
+
+ .bss __rel_dyn_start (OVERLAY) : {
+ __bss_start = .;
+ *(.bss*)
+ . = ALIGN(4);
+ _end = .;
}
__bss_end__ =.;
+ /DISCARD/ : { *(.dynstr*) }
+ /DISCARD/ : { *(.dynamic*) }
+ /DISCARD/ : { *(.plt*) }
+ /DISCARD/ : { *(.interp*) }
+ /DISCARD/ : { *(.gnu*) }
}
diff --git a/board/actux2/actux2.c b/board/actux2/actux2.c
index 0d67f80b97..9040a098de 100644
--- a/board/actux2/actux2.c
+++ b/board/actux2/actux2.c
@@ -43,50 +43,55 @@
DECLARE_GLOBAL_DATA_PTR;
-int board_init (void)
+int board_early_init_f(void)
+{
+ /* CS1: IPAC-X */
+ writel(0x94d10013, IXP425_EXP_CS1);
+ /* CS5: Debug port */
+ writel(0x9d520003, IXP425_EXP_CS5);
+ /* CS6: HW release register */
+ writel(0x81860001, IXP425_EXP_CS6);
+ /* CS7: LEDs */
+ writel(0x80900003, IXP425_EXP_CS7);
+
+ return 0;
+}
+
+int board_init(void)
{
gd->bd->bi_arch_number = MACH_TYPE_ACTUX2;
/* adress of boot parameters */
gd->bd->bi_boot_params = 0x00000100;
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_ETHRST);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_DSR);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_DCD);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_ETHRST);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DSR);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DCD);
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_ETHRST);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_ETHRST);
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_DSR);
- GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_DCD);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DSR);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_DCD);
- /* Setup GPIO's for Interrupt inputs */
- GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_DBGINT);
- GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_ETHINT);
+ /* Setup GPIOs for Interrupt inputs */
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_DBGINT);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_ETHINT);
- /* Setup GPIO's for 33MHz clock output */
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK);
- *IXP425_GPIO_GPCLKR = 0x011001FF;
+ /* Setup GPIOs for 33MHz clock output */
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
+ writel(0x011001FF, IXP425_GPIO_GPCLKR);
- /* CS1: IPAC-X */
- *IXP425_EXP_CS1 = 0x94d10013;
- /* CS5: Debug port */
- *IXP425_EXP_CS5 = 0x9d520003;
- /* CS6: HW release register */
- *IXP425_EXP_CS6 = 0x81860001;
- /* CS7: LEDs */
- *IXP425_EXP_CS7 = 0x80900003;
+ udelay(533);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_ETHRST);
- udelay (533);
- GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_ETHRST);
-
- ACTUX2_LED1 (1);
- ACTUX2_LED2 (0);
- ACTUX2_LED3 (0);
- ACTUX2_LED4 (0);
+ ACTUX2_LED1(1);
+ ACTUX2_LED2(0);
+ ACTUX2_LED3(0);
+ ACTUX2_LED4(0);
return 0;
}
@@ -94,29 +99,27 @@ int board_init (void)
/*
* Check Board Identity
*/
-int checkboard (void)
+int checkboard(void)
{
char buf[64];
int i = getenv_f("serial#", buf, sizeof(buf));
- puts ("Board: AcTux-2 rev.");
- putc (ACTUX2_BOARDREL + 'A' - 1);
+ puts("Board: AcTux-2 rev.");
+ putc(ACTUX2_BOARDREL + 'A' - 1);
if (i > 0) {
puts(", serial# ");
puts(buf);
}
- putc ('\n');
+ putc('\n');
- return (0);
+ return 0;
}
-int dram_init (void)
+int dram_init(void)
{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
+ gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
+ return 0;
}
/*************************************************************************
@@ -125,13 +128,13 @@ int dram_init (void)
* 1 = Rev. A
* 2 = Rev. B
*************************************************************************/
-u32 get_board_rev (void)
+u32 get_board_rev(void)
{
return ACTUX2_BOARDREL;
}
-void reset_phy (void)
+void reset_phy(void)
{
/* init IcPlus IP175C ethernet switch to native IP175C mode */
- miiphy_write ("NPE0", 29, 31, 0x175C);
+ miiphy_write("NPE0", 29, 31, 0x175C);
}
diff --git a/board/actux2/config.mk b/board/actux2/config.mk
deleted file mode 100644
index 9cb838b738..0000000000
--- a/board/actux2/config.mk
+++ /dev/null
@@ -1,4 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x00e00000
-
-# include NPE ethernet driver
-BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o
diff --git a/board/actux2/u-boot.lds b/board/actux2/u-boot.lds
index a405f557ed..3575ed99fc 100644
--- a/board/actux2/u-boot.lds
+++ b/board/actux2/u-boot.lds
@@ -30,34 +30,29 @@ SECTIONS
. = ALIGN (4);
.text : {
- arch/arm/cpu/ixp/start.o(.text)
- lib/string.o(.text)
- lib/vsprintf.o(.text)
- arch/arm/lib/board.o(.text)
- common/dlmalloc.o(.text)
- arch/arm/cpu/ixp/cpu.o(.text)
+ arch/arm/cpu/ixp/start.o(.text*)
+ net/libnet.o(.text*)
+ board/actux2/libactux2.o(.text*)
+ arch/arm/cpu/ixp/libixp.o(.text*)
+ drivers/serial/libserial.o(.text*)
. = env_offset;
- common/env_embedded.o (.ppcenv)
-
- * (.text)
+ common/env_embedded.o(.ppcenv)
+ *(.text*)
}
. = ALIGN (4);
.rodata : {
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
-
. = ALIGN (4);
.data : {
- *(.data)
+ *(.data*)
}
-
. = ALIGN (4);
.got : {
*(.got)
}
-
. =.;
__u_boot_cmd_start =.;
.u_boot_cmd : {
@@ -66,10 +61,27 @@ SECTIONS
__u_boot_cmd_end =.;
. = ALIGN (4);
- __bss_start =.;
- .bss (NOLOAD): {
- *(.bss)
- . = ALIGN(4);
+ .rel.dyn : {
+ __rel_dyn_start = .;
+ *(.rel*)
+ __rel_dyn_end = .;
+ }
+
+ .dynsym : {
+ __dynsym_start = .;
+ *(.dynsym)
+ }
+
+ .bss __rel_dyn_start (OVERLAY) : {
+ __bss_start = .;
+ *(.bss*)
+ . = ALIGN(4);
+ _end = .;
}
__bss_end__ =.;
+ /DISCARD/ : { *(.dynstr*) }
+ /DISCARD/ : { *(.dynamic*) }
+ /DISCARD/ : { *(.plt*) }
+ /DISCARD/ : { *(.interp*) }
+ /DISCARD/ : { *(.gnu*) }
}
diff --git a/board/actux3/actux3.c b/board/actux3/actux3.c
index bace2547e1..64e5215f36 100644
--- a/board/actux3/actux3.c
+++ b/board/actux3/actux3.c
@@ -36,72 +36,76 @@
#include <malloc.h>
#include <asm/arch/ixp425.h>
#include <asm/io.h>
-
#include <miiphy.h>
-
#include "actux3_hw.h"
DECLARE_GLOBAL_DATA_PTR;
-int board_init (void)
+int board_early_init_f(void)
+{
+ /* CS1: IPAC-X */
+ writel(0x94d10013, IXP425_EXP_CS1);
+ /* CS5: Debug port */
+ writel(0x9d520003, IXP425_EXP_CS5);
+ /* CS6: Release/Option register */
+ writel(0x81860001, IXP425_EXP_CS6);
+ /* CS7: LEDs */
+ writel(0x80900003, IXP425_EXP_CS7);
+
+ return 0;
+}
+
+int board_init(void)
{
gd->bd->bi_arch_number = MACH_TYPE_ACTUX3;
/* adress of boot parameters */
gd->bd->bi_boot_params = 0x00000100;
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_ETHRST);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_DSR);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_DCD);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED5_GN);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED6_RT);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED6_GN);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_ETHRST);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DSR);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DCD);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED5_GN);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED6_RT);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED6_GN);
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_ETHRST);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_ETHRST);
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_DSR);
- GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_DCD);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DSR);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_DCD);
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_LED5_GN);
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_LED6_RT);
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_LED6_GN);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_LED5_GN);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_LED6_RT);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_LED6_GN);
/*
* Setup GPIO's for Interrupt inputs
*/
- GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_DBGINT);
- GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_ETHINT);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_DBGINT);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_ETHINT);
/*
* Setup GPIO's for 33MHz clock output
*/
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK);
- *IXP425_GPIO_GPCLKR = 0x011001FF;
-
- /* CS1: IPAC-X */
- *IXP425_EXP_CS1 = 0x94d10013;
- /* CS5: Debug port */
- *IXP425_EXP_CS5 = 0x9d520003;
- /* CS6: Release/Option register */
- *IXP425_EXP_CS6 = 0x81860001;
- /* CS7: LEDs */
- *IXP425_EXP_CS7 = 0x80900003;
-
- udelay (533);
- GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_ETHRST);
-
- ACTUX3_LED1_RT (1);
- ACTUX3_LED1_GN (0);
- ACTUX3_LED2_RT (0);
- ACTUX3_LED2_GN (0);
- ACTUX3_LED3_RT (0);
- ACTUX3_LED3_GN (0);
- ACTUX3_LED4_GN (0);
- ACTUX3_LED5_RT (0);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
+ writel(0x011001FF, IXP425_GPIO_GPCLKR);
+
+ /* we need a minimum PCI reset pulse width after enabling the clock */
+ udelay(533);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_ETHRST);
+
+ ACTUX3_LED1_RT(1);
+ ACTUX3_LED1_GN(0);
+ ACTUX3_LED2_RT(0);
+ ACTUX3_LED2_GN(0);
+ ACTUX3_LED3_RT(0);
+ ACTUX3_LED3_GN(0);
+ ACTUX3_LED4_GN(0);
+ ACTUX3_LED5_RT(0);
return 0;
}
@@ -109,21 +113,21 @@ int board_init (void)
/*
* Check Board Identity
*/
-int checkboard (void)
+int checkboard(void)
{
char buf[64];
int i = getenv_f("serial#", buf, sizeof(buf));
- puts ("Board: AcTux-3 rev.");
- putc (ACTUX3_BOARDREL + 'A' - 1);
+ puts("Board: AcTux-3 rev.");
+ putc(ACTUX3_BOARDREL + 'A' - 1);
if (i > 0) {
puts (", serial# ");
puts (buf);
}
- putc ('\n');
+ putc('\n');
- return (0);
+ return 0;
}
/*************************************************************************
@@ -132,34 +136,32 @@ int checkboard (void)
* 1 = Rev. A
* 2 = Rev. B
*************************************************************************/
-u32 get_board_rev (void)
+u32 get_board_rev(void)
{
return ACTUX3_BOARDREL;
}
-int dram_init (void)
+int dram_init(void)
{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
+ gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
+ return 0;
}
-void reset_phy (void)
+void reset_phy(void)
{
int i;
/* initialize the PHY */
- miiphy_reset ("NPE0", CONFIG_PHY_ADDR);
+ miiphy_reset("NPE0", CONFIG_PHY_ADDR);
/* all LED outputs = Link/Act */
- miiphy_write ("NPE0", CONFIG_PHY_ADDR, 0x16, 0x0AAA);
+ miiphy_write("NPE0", CONFIG_PHY_ADDR, 0x16, 0x0AAA);
/*
* The Marvell 88E6060 switch comes up with all ports disabled.
* set all ethernet switch ports to forwarding state
*/
for (i = 1; i <= 5; i++)
- miiphy_write ("NPE0", CONFIG_PHY_ADDR + 8 + i, 0x04, 0x03);
+ miiphy_write("NPE0", CONFIG_PHY_ADDR + 8 + i, 0x04, 0x03);
}
diff --git a/board/actux3/config.mk b/board/actux3/config.mk
deleted file mode 100644
index 9cb838b738..0000000000
--- a/board/actux3/config.mk
+++ /dev/null
@@ -1,4 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x00e00000
-
-# include NPE ethernet driver
-BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o
diff --git a/board/actux3/u-boot.lds b/board/actux3/u-boot.lds
index d3463cd8e6..35aab29d40 100644
--- a/board/actux3/u-boot.lds
+++ b/board/actux3/u-boot.lds
@@ -30,34 +30,29 @@ SECTIONS
. = ALIGN (4);
.text : {
- arch/arm/cpu/ixp/start.o (.text)
- lib/string.o (.text)
- lib/vsprintf.o (.text)
- arch/arm/lib/board.o (.text)
- common/dlmalloc.o (.text)
- arch/arm/cpu/ixp/cpu.o (.text)
+ arch/arm/cpu/ixp/start.o(.text*)
+ net/libnet.o(.text*)
+ board/actux3/libactux3.o(.text*)
+ arch/arm/cpu/ixp/libixp.o(.text*)
+ drivers/serial/libserial.o(.text*)
. = env_offset;
- common/env_embedded.o (.ppcenv)
-
- * (.text)
+ common/env_embedded.o(.ppcenv)
+ *(.text*)
}
- . = ALIGN (4);
+ . = ALIGN(4);
.rodata : {
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
-
- . = ALIGN (4);
+ . = ALIGN(4);
.data : {
- *(.data)
+ *(.data*)
}
-
- . = ALIGN (4);
+ . = ALIGN(4);
.got : {
*(.got)
}
-
. =.;
__u_boot_cmd_start =.;
.u_boot_cmd : {
@@ -66,10 +61,27 @@ SECTIONS
__u_boot_cmd_end =.;
. = ALIGN (4);
- __bss_start =.;
- .bss (NOLOAD): {
- *(.bss)
- . = ALIGN(4);
+ .rel.dyn : {
+ __rel_dyn_start = .;
+ *(.rel*)
+ __rel_dyn_end = .;
+ }
+
+ .dynsym : {
+ __dynsym_start = .;
+ *(.dynsym)
+ }
+
+ .bss __rel_dyn_start (OVERLAY) : {
+ __bss_start = .;
+ *(.bss*)
+ . = ALIGN(4);
+ _end = .;
}
__bss_end__ =.;
+ /DISCARD/ : { *(.dynstr*) }
+ /DISCARD/ : { *(.dynamic*) }
+ /DISCARD/ : { *(.plt*) }
+ /DISCARD/ : { *(.interp*) }
+ /DISCARD/ : { *(.gnu*) }
}
diff --git a/board/actux4/actux4.c b/board/actux4/actux4.c
index f373b58777..d20d881eaf 100644
--- a/board/actux4/actux4.c
+++ b/board/actux4/actux4.c
@@ -35,92 +35,107 @@
#include <command.h>
#include <malloc.h>
#include <asm/arch/ixp425.h>
-
+#include <asm/io.h>
#include <miiphy.h>
+#ifdef CONFIG_PCI
+#include <pci.h>
+#include <asm/arch/ixp425pci.h>
+#endif
#include "actux4_hw.h"
DECLARE_GLOBAL_DATA_PTR;
-int board_init (void)
+int board_early_init_f(void)
+{
+ writel(0xbd113c42, IXP425_EXP_CS1);
+ return 0;
+}
+
+int board_init(void)
{
gd->bd->bi_arch_number = MACH_TYPE_ACTUX4;
/* adress of boot parameters */
gd->bd->bi_boot_params = 0x00000100;
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_nPWRON);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_nPWRON);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_nPWRON);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_nPWRON);
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_IORST);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
/* led not populated on board*/
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED3);
- GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_LED3);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED3);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED3);
/* middle LED */
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED2);
- GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_LED2);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED2);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED2);
/* right LED */
/* weak pulldown = LED weak on */
- GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_LED1);
- GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_LED1);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_LED1);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED1);
/* Setup GPIO's for Interrupt inputs */
- GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_USBINTA);
- GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_USBINTB);
- GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_USBINTC);
- GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_RTCINT);
- GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_PCI_INTA);
- GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_PCI_INTB);
-
- GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_USBINTA);
- GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_USBINTB);
- GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_USBINTC);
- GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_RTCINT);
- GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_PCI_INTA);
- GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_PCI_INTB);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTA);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTB);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTC);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RTCINT);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB);
+
+ GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTA);
+ GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTB);
+ GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTC);
+ GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RTCINT);
+ GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA);
+ GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB);
/* Setup GPIO's for 33MHz clock output */
- *IXP425_GPIO_GPCLKR = 0x011001FF;
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK);
- GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK);
-
- *IXP425_EXP_CS1 = 0xbd113c42;
+ writel(0x011001FF, IXP425_GPIO_GPCLKR);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
- udelay (10000);
- GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
- udelay (10000);
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST);
- udelay (10000);
- GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
+ udelay(10000);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
+ udelay(10000);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
+ udelay(10000);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
return 0;
}
/* Check Board Identity */
-int checkboard (void)
+int checkboard(void)
{
- puts ("Board: AcTux-4\n");
- return (0);
+ puts("Board: AcTux-4\n");
+ return 0;
}
-int dram_init (void)
+int dram_init(void)
{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+ gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
+ return 0;
+}
- return (0);
+#ifdef CONFIG_PCI
+struct pci_controller hose;
+
+void pci_init_board(void)
+{
+ pci_ixp_init(&hose);
}
+#endif
/*
* Hardcoded flash setup:
* Flash 0 is a non-CFI SST 39VF020 flash, 8 bit flash / 8 bit bus.
* Flash 1 is an Intel *16 flash using the CFI driver.
*/
-ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
+ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
{
if (banknum == 0) { /* non-CFI boot flash */
info->portwidth = 1;
diff --git a/board/actux4/config.mk b/board/actux4/config.mk
deleted file mode 100644
index 9cb838b738..0000000000
--- a/board/actux4/config.mk
+++ /dev/null
@@ -1,4 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x00e00000
-
-# include NPE ethernet driver
-BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o
diff --git a/board/dvlhost/Makefile b/board/dvlhost/Makefile
new file mode 100644
index 0000000000..af9a644ba1
--- /dev/null
+++ b/board/dvlhost/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS := dvlhost.o watchdog.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/dvlhost/dvlhost.c b/board/dvlhost/dvlhost.c
new file mode 100644
index 0000000000..561e47f935
--- /dev/null
+++ b/board/dvlhost/dvlhost.c
@@ -0,0 +1,130 @@
+/*
+ * (C) Copyright 2009
+ * Michael Schwingen, michael@schwingen.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <config.h>
+#include <command.h>
+#include <malloc.h>
+#include <asm/arch/ixp425.h>
+#include <asm/io.h>
+#include <miiphy.h>
+#ifdef CONFIG_PCI
+#include <pci.h>
+#include <asm/arch/ixp425pci.h>
+#endif
+
+#include "dvlhost_hw.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_early_init_f(void)
+{
+ /* CS1: LED Latch */
+ writel(0xBFFF0002, IXP425_EXP_CS1);
+ return 0;
+}
+
+int board_init(void)
+{
+ gd->bd->bi_arch_number = MACH_TYPE_DVLHOST;
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = 0x00000100;
+
+ /* Setup GPIOs used as output */
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_WDGTRIGGER);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_DLAN_PAIRING);
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PCIRST);
+
+ /*
+ * LED latch enable and watchdog enable are tied to the same GPIO,
+ * so we need to trigger the watchdog if we want to enable the LEDs.
+ */
+#ifdef CONFIG_HW_WATCHDOG
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_WDG_LED_EN);
+#else
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_WDG_LED_EN);
+#endif
+
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_WDGTRIGGER);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DLAN_PAIRING);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_WDG_LED_EN);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCIRST);
+
+ /* Setup GPIOs for Interrupt inputs */
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_BTN_WLAN);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_BTN_PAIRING);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_BTN_RESET);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_IRQA);
+ GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_IRQB);
+
+ /* Setup GPIO's for 33MHz clock output */
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
+ writel(0x01FF01FF, IXP425_GPIO_GPCLKR);
+
+ /* turn off all LEDs */
+ writew(0x0000, DVLHOST_LED_LATCH);
+
+ udelay(533);
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_PCIRST);
+
+ return 0;
+}
+
+/* Check Board Identity */
+int checkboard(void)
+{
+ char *s = getenv("serial#");
+
+ puts("Board: dLAN 200AV (dvlhost)");
+
+ if (s != NULL) {
+ puts(", serial# ");
+ puts(s);
+ }
+ putc('\n');
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
+ return 0;
+}
+
+#ifdef CONFIG_PCI
+struct pci_controller hose;
+
+void pci_init_board(void)
+{
+ pci_ixp_init(&hose);
+}
+#endif
+
+void reset_phy(void)
+{
+ /* init IcPlus IP175C ethernet switch to native IP175C mode */
+ miiphy_write("NPE1", 29, 31, 0x175C);
+}
diff --git a/board/dvlhost/dvlhost_hw.h b/board/dvlhost/dvlhost_hw.h
new file mode 100644
index 0000000000..5e2d0b0f78
--- /dev/null
+++ b/board/dvlhost/dvlhost_hw.h
@@ -0,0 +1,47 @@
+/*
+ * (C) Copyright 2009
+ * Michael Schwingen, michael@schwingen.org
+ *
+ * hardware register definitions for the
+ * dLAN200 AV Wireless G ("dvlhost") board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _DVLHOST_HW_H
+#define _DVLHOST_HW_H
+
+/*
+ * GPIO settings
+ */
+#define CONFIG_SYS_GPIO_WDGTRIGGER 0 /* Out */
+#define CONFIG_SYS_GPIO_BTN_WLAN 1
+#define CONFIG_SYS_GPIO_BTN_PAIRING 6
+#define CONFIG_SYS_GPIO_DLAN_PAIRING 7 /* Out */
+#define CONFIG_SYS_GPIO_BTN_RESET 9
+#define CONFIG_SYS_GPIO_IRQB 10
+#define CONFIG_SYS_GPIO_IRQA 11
+#define CONFIG_SYS_GPIO_WDG_LED_EN 12 /* Out */
+#define CONFIG_SYS_GPIO_PCIRST 13 /* Out */
+#define CONFIG_SYS_GPIO_PCI_CLK 14 /* Out */
+#define CONFIG_SYS_GPIO_EXTBUS_CLK 15 /* Out */
+
+#define DVLHOST_LED_LATCH IXP425_EXP_BUS_CS1_BASE_PHYS
+
+#endif
diff --git a/board/dvlhost/u-boot.lds b/board/dvlhost/u-boot.lds
new file mode 100644
index 0000000000..01ec39008d
--- /dev/null
+++ b/board/dvlhost/u-boot.lds
@@ -0,0 +1,87 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm")
+OUTPUT_ARCH (arm)
+ENTRY (_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN (4);
+ .text : {
+ arch/arm/cpu/ixp/start.o(.text*)
+ net/libnet.o(.text*)
+ board/dvlhost/libdvlhost.o(.text*)
+ arch/arm/cpu/ixp/libixp.o(.text*)
+ drivers/serial/libserial.o(.text*)
+
+ . = env_offset;
+ common/env_embedded.o(.ppcenv)
+ *(.text*)
+ }
+
+ . = ALIGN (4);
+ .rodata : {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ }
+ . = ALIGN (4);
+ .data : {
+ *(.data*)
+ }
+ . = ALIGN (4);
+ .got : {
+ *(.got)
+ }
+ . =.;
+ __u_boot_cmd_start =.;
+ .u_boot_cmd : {
+ *(.u_boot_cmd)
+ }
+ __u_boot_cmd_end =.;
+
+ . = ALIGN (4);
+ .rel.dyn : {
+ __rel_dyn_start = .;
+ *(.rel*)
+ __rel_dyn_end = .;
+ }
+
+ .dynsym : {
+ __dynsym_start = .;
+ *(.dynsym)
+ }
+
+ .bss __rel_dyn_start (OVERLAY) : {
+ __bss_start = .;
+ *(.bss*)
+ . = ALIGN(4);
+ _end = .;
+ }
+ __bss_end__ =.;
+ /DISCARD/ : { *(.dynstr*) }
+ /DISCARD/ : { *(.dynamic*) }
+ /DISCARD/ : { *(.plt*) }
+ /DISCARD/ : { *(.interp*) }
+ /DISCARD/ : { *(.gnu*) }
+}
diff --git a/board/dvlhost/watchdog.c b/board/dvlhost/watchdog.c
new file mode 100644
index 0000000000..bf836845ca
--- /dev/null
+++ b/board/dvlhost/watchdog.c
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2009
+ * Michael Schwingen, michael@schwingen.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <config.h>
+#include <asm/io.h>
+#include "dvlhost_hw.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_HW_WATCHDOG
+#include <watchdog.h>
+#include <asm/arch/ixp425.h>
+
+void hw_watchdog_reset(void)
+{
+ unsigned int x;
+ x = readl(IXP425_GPIO_GPOUTR);
+ x ^= (1 << (CONFIG_SYS_GPIO_WDGTRIGGER));
+ writel(x, IXP425_GPIO_GPOUTR);
+}
+
+#endif /* CONFIG_HW_WATCHDOG */
diff --git a/board/ixdp425/config.mk b/board/ixdp425/config.mk
deleted file mode 100644
index 509c894a28..0000000000
--- a/board/ixdp425/config.mk
+++ /dev/null
@@ -1,2 +0,0 @@
-#
-CONFIG_SYS_TEXT_BASE = 0x00f80000
diff --git a/board/ixdp425/flash.c b/board/ixdp425/flash.c
deleted file mode 100644
index f1d9190eac..0000000000
--- a/board/ixdp425/flash.c
+++ /dev/null
@@ -1,427 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#undef FLASH_PORT_WIDTH32
-#define FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) x
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE,
- CONFIG_SYS_FLASH_BASE + _bss_start - _armboot_start,
- &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info)
-{
- volatile FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
-
- switch (value) {
-
- case (FPW) INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x02000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
- info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- *addr = (FPW) 0x00500050; /* clear status register */
- *addr = (FPW) 0x00200020; /* erase setup */
- *addr = (FPW) 0x00D000D0; /* erase confirm */
-
- while (((status =
- *addr) & (FPW) 0x00800080) !=
- (FPW) 0x00800080) {
- if (get_timer_masked () >
- CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = (FPW) 0x00B000B0; /* suspend erase */
- *addr = (FPW) 0x00FF00FF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = (FPW) 0x00500050; /* clear status register cmd. */
- *addr = (FPW) 0x00FF00FF; /* resest to read mode */
-
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, SWAP (data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr,
- (ulong) * addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/ixdp425/ixdp425.c b/board/ixdp425/ixdp425.c
index a29d584389..7269458fef 100644
--- a/board/ixdp425/ixdp425.c
+++ b/board/ixdp425/ixdp425.c
@@ -33,24 +33,82 @@
#include <malloc.h>
#include <netdev.h>
#include <asm/arch/ixp425.h>
+#include <asm/io.h>
+#ifdef CONFIG_PCI
+#include <pci.h>
+#include <asm/arch/ixp425pci.h>
+#endif
DECLARE_GLOBAL_DATA_PTR;
+#define IXDP425_LED_PORT 0x52000000 /* 4-digit hex display */
+
+int board_early_init_f(void)
+{
+ /* CS2: LED port */
+ writel(0xbcff0002, IXP425_EXP_CS2);
+ writew(0x0001, IXDP425_LED_PORT); /* output postcode to LEDs */
+
+ return 0;
+}
+
+#ifdef CONFIG_PCI
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_ixpdp425_config_table[] = {
+ { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x00, PCI_ANY_ID,
+ pci_cfgfunc_config_device,
+ { 0x400,
+ 0x40000000,
+ PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } },
+
+ { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x01, PCI_ANY_ID,
+ pci_cfgfunc_config_device,
+ { 0x800,
+ 0x40010000,
+ PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } },
+
+ { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x02, PCI_ANY_ID,
+ pci_cfgfunc_config_device,
+ { 0xc00,
+ 0x40020000,
+ PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } },
+
+ { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x03, PCI_ANY_ID,
+ pci_cfgfunc_config_device,
+ { 0x1000,
+ 0x40030000,
+ PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } },
+ { }
+};
+#endif
+
+struct pci_controller hose = {
+#ifndef CONFIG_PCI_PNP
+ config_table: pci_ixpdp425_config_table,
+#endif
+};
+#endif /* CONFIG_PCI */
+
+
/*
* Miscelaneous platform dependent initialisations
*/
-int board_init (void)
+int board_init(void)
{
+ writew(0x0002, IXDP425_LED_PORT); /* output postcode to LEDs */
+
+#ifdef CONFIG_IXDPG425
+ /* arch number of IXDP */
+ gd->bd->bi_arch_number = MACH_TYPE_IXDPG425;
+#else
/* arch number of IXDP */
gd->bd->bi_arch_number = MACH_TYPE_IXDP425;
+#endif
/* adress of boot parameters */
gd->bd->bi_boot_params = 0x00000100;
#ifdef CONFIG_IXDPG425
- /* arch number of IXDP */
- gd->bd->bi_arch_number = MACH_TYPE_IXDPG425;
-
/*
* Get realtek RTL8305 switch and SLIC out of reset
*/
@@ -60,19 +118,56 @@ int board_init (void)
GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SLIC_RESET_N);
/*
- * Setup GPIO's for PCI INTA & INTB
+ * Setup GPIOs for PCI INTA & INTB
*/
GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA_N);
GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA_N);
GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB_N);
GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB_N);
- /*
- * Setup GPIO's for 33MHz clock output
- */
- *IXP425_GPIO_GPCLKR = 0x01FF01FF;
+ /* Setup GPIOs for 33MHz clock output */
+ writel(0x01FF01FF, IXP425_GPIO_GPCLKR);
+
GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
+
+ /* set GPIO8..11 interrupt type to active low */
+ writel((0x1 << 9) | (0x1 << 6) | (0x1 << 3) | 0x1, IXP425_GPIO_GPIT2R);
+
+ /* clear pending interrupts */
+ writel(-1, IXP425_GPIO_GPISR);
+
+ /* assert PCI reset */
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_SLIC_RESET_N);
+
+ udelay(533);
+
+ /* deassert PCI reset */
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SLIC_RESET_N);
+
+ udelay(533);
+
+#else /* IXDP425 */
+ /* Setup GPIOs for 33MHz ExpBus and PCI clock output */
+ writel(0x01FF01FF, IXP425_GPIO_GPCLKR);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
+ GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_RESET_N);
+
+ /* set GPIO8..11 interrupt type to active low */
+ writel((0x1 << 9) | (0x1 << 6) | (0x1 << 3) | 0x1, IXP425_GPIO_GPIT2R);
+ /* clear pending interrupts */
+ writel(-1, IXP425_GPIO_GPISR);
+
+ /* assert PCI reset */
+ GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PCI_RESET_N);
+
+ udelay(533);
+
+ /* deassert PCI reset */
+ GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_PCI_RESET_N);
+
+ udelay(533);
#endif
return 0;
@@ -98,30 +193,46 @@ int checkboard(void)
}
putc('\n');
- return (0);
+ return 0;
}
-int dram_init (void)
+int dram_init(void)
{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
+ /* we can only map 64MB via PCI, so we limit memory
+ until a better solution is implemented. */
+#ifdef CONFIG_PCI
+ gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 64<<20);
+#else
+ gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 256<<20);
+#endif
+ return 0;
}
-#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
-extern struct pci_controller hose;
-extern void pci_ixp_init(struct pci_controller * hose);
-
+#ifdef CONFIG_PCI
void pci_init_board(void)
{
- extern void pci_ixp_init (struct pci_controller *hose);
-
pci_ixp_init(&hose);
}
+
+/*
+ * dev 0 on the PCI bus is not the host bridge, so we have to override
+ * these functions in order to not skip PCI slot 0 during configuration.
+*/
+int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
+{
+ return 0;
+}
+int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
+{
+ return 1;
+}
+
#endif
int board_eth_init(bd_t *bis)
{
- return pci_eth_init(bis);
+#ifdef CONFIG_PCI
+ pci_eth_init(bis);
+#endif
+ return cpu_eth_init(bis);
}
diff --git a/board/prodrive/pdnb3/config.mk b/board/prodrive/pdnb3/config.mk
deleted file mode 100644
index 817541f97d..0000000000
--- a/board/prodrive/pdnb3/config.mk
+++ /dev/null
@@ -1,2 +0,0 @@
-#
-CONFIG_SYS_TEXT_BASE = 0x01f00000
generated by cgit v1.2.3 (git 2.0.4) at 2024-07-08 00:12:35 +0000