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-rw-r--r--board/freescale/p1_p2_rdb_pc/Kconfig3
-rw-r--r--board/freescale/p1_p2_rdb_pc/ddr.c2
-rw-r--r--board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c4
-rw-r--r--board/freescale/p1_p2_rdb_pc/tlb.c2
4 files changed, 6 insertions, 5 deletions
diff --git a/board/freescale/p1_p2_rdb_pc/Kconfig b/board/freescale/p1_p2_rdb_pc/Kconfig
index 6fa68595c0..c46e04e08d 100644
--- a/board/freescale/p1_p2_rdb_pc/Kconfig
+++ b/board/freescale/p1_p2_rdb_pc/Kconfig
@@ -1,6 +1,7 @@
if TARGET_P1_P2_RDB_PC || \
TARGET_P1020MBG || \
- TARGET_P1020RDB_PC
+ TARGET_P1020RDB_PC || \
+ TARGET_P1020RDB_PD
config SYS_BOARD
default "p1_p2_rdb_pc"
diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c
index 2abe84096b..8291c18846 100644
--- a/board/freescale/p1_p2_rdb_pc/ddr.c
+++ b/board/freescale/p1_p2_rdb_pc/ddr.c
@@ -78,7 +78,7 @@ dimm_params_t ddr_raw_timing = {
.refresh_rate_ps = 7800000,
.tfaw_ps = 30000,
};
-#elif (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_P1020RDB_PD))
+#elif (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_TARGET_P1020RDB_PD))
/* Micron MT41J512M8_187E */
dimm_params_t ddr_raw_timing = {
.n_ranks = 2,
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 1a8744e688..33f2c7e133 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -428,7 +428,7 @@ int ft_board_setup(void *blob, bd_t *bd)
{
phys_addr_t base;
phys_size_t size;
-#if defined(CONFIG_P1020RDB_PD) || defined(CONFIG_TARGET_P1020RDB_PC)
+#if defined(CONFIG_TARGET_P1020RDB_PD) || defined(CONFIG_TARGET_P1020RDB_PC)
const char *soc_usb_compat = "fsl-usb2-dr";
int usb_err, usb1_off, usb2_off;
#endif
@@ -478,7 +478,7 @@ int ft_board_setup(void *blob, bd_t *bd)
}
#endif
-#if defined(CONFIG_P1020RDB_PD) || defined(CONFIG_TARGET_P1020RDB_PC)
+#if defined(CONFIG_TARGET_P1020RDB_PD) || defined(CONFIG_TARGET_P1020RDB_PC)
/* Delete USB2 node as it is muxed with eLBC */
usb1_off = fdt_node_offset_by_compatible(blob, -1,
soc_usb_compat);
diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c
index d88c06f1af..7cba411007 100644
--- a/board/freescale/p1_p2_rdb_pc/tlb.c
+++ b/board/freescale/p1_p2_rdb_pc/tlb.c
@@ -85,7 +85,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 8, BOOKE_PAGESZ_1G, 1),
-#if defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_P1020RDB_PD)
+#if defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_TARGET_P1020RDB_PD)
/* 2G DDR on P1020MBG, map the second 1G */
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,