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-rw-r--r--board/atum8548/tlb.c2
-rw-r--r--board/freescale/mpc8540ads/tlb.c2
-rw-r--r--board/freescale/mpc8541cds/tlb.c2
-rw-r--r--board/freescale/mpc8544ds/tlb.c2
-rw-r--r--board/freescale/mpc8548cds/tlb.c2
-rw-r--r--board/freescale/mpc8555cds/tlb.c2
-rw-r--r--board/freescale/mpc8560ads/tlb.c2
-rw-r--r--board/freescale/mpc8568mds/tlb.c2
-rw-r--r--board/mpc8540eval/tlb.c2
-rw-r--r--board/pm854/tlb.c2
-rw-r--r--board/pm856/tlb.c2
-rw-r--r--board/sbc8548/tlb.c2
-rw-r--r--board/sbc8560/tlb.c2
-rw-r--r--board/stxgp3/tlb.c2
-rw-r--r--board/stxssa/tlb.c2
-rw-r--r--board/tqm85xx/tlb.c2
16 files changed, 16 insertions, 16 deletions
diff --git a/board/atum8548/tlb.c b/board/atum8548/tlb.c
index bb6ce761ac5..1ef4de41efb 100644
--- a/board/atum8548/tlb.c
+++ b/board/atum8548/tlb.c
@@ -82,7 +82,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe210_0000 1M PCI2 IO
* 0xe300_0000 1M PCIe IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
};
diff --git a/board/freescale/mpc8540ads/tlb.c b/board/freescale/mpc8540ads/tlb.c
index 3eaff013f61..4fe2862f7d5 100644
--- a/board/freescale/mpc8540ads/tlb.c
+++ b/board/freescale/mpc8540ads/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe200_0000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/freescale/mpc8541cds/tlb.c b/board/freescale/mpc8541cds/tlb.c
index 92f759b31ba..c5434a069f9 100644
--- a/board/freescale/mpc8541cds/tlb.c
+++ b/board/freescale/mpc8541cds/tlb.c
@@ -88,7 +88,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe200_0000 16M PCI1 IO
* 0xe300_0000 16M PCI2 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/freescale/mpc8544ds/tlb.c b/board/freescale/mpc8544ds/tlb.c
index 34cfb38f0d6..61fc60986c4 100644
--- a/board/freescale/mpc8544ds/tlb.c
+++ b/board/freescale/mpc8544ds/tlb.c
@@ -75,7 +75,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe100_0000 255M PCI IO range
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 4, BOOKE_PAGESZ_64M, 1),
diff --git a/board/freescale/mpc8548cds/tlb.c b/board/freescale/mpc8548cds/tlb.c
index b21f71bd12b..ab99af7e1c3 100644
--- a/board/freescale/mpc8548cds/tlb.c
+++ b/board/freescale/mpc8548cds/tlb.c
@@ -80,7 +80,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe210_0000 1M PCI2 IO
* 0xe300_0000 1M PCIe IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/freescale/mpc8555cds/tlb.c b/board/freescale/mpc8555cds/tlb.c
index 92f759b31ba..c5434a069f9 100644
--- a/board/freescale/mpc8555cds/tlb.c
+++ b/board/freescale/mpc8555cds/tlb.c
@@ -88,7 +88,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe200_0000 16M PCI1 IO
* 0xe300_0000 16M PCI2 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/freescale/mpc8560ads/tlb.c b/board/freescale/mpc8560ads/tlb.c
index 3eaff013f61..4fe2862f7d5 100644
--- a/board/freescale/mpc8560ads/tlb.c
+++ b/board/freescale/mpc8560ads/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe200_0000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/freescale/mpc8568mds/tlb.c b/board/freescale/mpc8568mds/tlb.c
index 225fc9465e1..a866c526c8d 100644
--- a/board/freescale/mpc8568mds/tlb.c
+++ b/board/freescale/mpc8568mds/tlb.c
@@ -74,7 +74,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe200_0000 8M PCI1 IO
* 0xe280_0000 8M PCIe IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 3, BOOKE_PAGESZ_64M, 1),
diff --git a/board/mpc8540eval/tlb.c b/board/mpc8540eval/tlb.c
index f04123636d8..1003bf61341 100644
--- a/board/mpc8540eval/tlb.c
+++ b/board/mpc8540eval/tlb.c
@@ -27,7 +27,7 @@
#include <asm/mmu.h>
struct fsl_e_tlb_entry tlb_table[] = {
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 1, BOOKE_PAGESZ_1M, 1),
diff --git a/board/pm854/tlb.c b/board/pm854/tlb.c
index 5d8753798f2..a7f3813501a 100644
--- a/board/pm854/tlb.c
+++ b/board/pm854/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe200_0000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/pm856/tlb.c b/board/pm856/tlb.c
index 5d8753798f2..a7f3813501a 100644
--- a/board/pm856/tlb.c
+++ b/board/pm856/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe200_0000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/sbc8548/tlb.c b/board/sbc8548/tlb.c
index 8d6625e54e2..6314005ca86 100644
--- a/board/sbc8548/tlb.c
+++ b/board/sbc8548/tlb.c
@@ -81,7 +81,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe0000000 1M CCSRBAR
* 0xe2000000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 4, BOOKE_PAGESZ_64M, 1),
diff --git a/board/sbc8560/tlb.c b/board/sbc8560/tlb.c
index 155ff64bbba..d073399606c 100644
--- a/board/sbc8560/tlb.c
+++ b/board/sbc8560/tlb.c
@@ -28,7 +28,7 @@
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB for CCSRBAR (IMMR) */
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 1, BOOKE_PAGESZ_1M, 1),
diff --git a/board/stxgp3/tlb.c b/board/stxgp3/tlb.c
index 529f230428e..d4104166a04 100644
--- a/board/stxgp3/tlb.c
+++ b/board/stxgp3/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe200_0000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/stxssa/tlb.c b/board/stxssa/tlb.c
index 46b14406d84..86cbd112791 100644
--- a/board/stxssa/tlb.c
+++ b/board/stxssa/tlb.c
@@ -88,7 +88,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe200_0000 16M PCI1 IO
* 0xe300_0000 16M PCI2 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
diff --git a/board/tqm85xx/tlb.c b/board/tqm85xx/tlb.c
index a178cfef30f..ad26caeea2a 100644
--- a/board/tqm85xx/tlb.c
+++ b/board/tqm85xx/tlb.c
@@ -91,7 +91,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe000_0000 1M CCSRBAR
* 0xe200_0000 16M PCI1 IO
*/
- SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+ SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 6, BOOKE_PAGESZ_64M, 1),
generated by cgit v1.2.3 (git 2.0.4) at 2024-09-17 18:32:37 +0000