diff options
Diffstat (limited to 'board')
30 files changed, 3574 insertions, 484 deletions
diff --git a/board/at91rm9200dk/at45.c b/board/at91rm9200dk/at45.c index f886fe4820..66cb14bb1d 100644 --- a/board/at91rm9200dk/at45.c +++ b/board/at91rm9200dk/at45.c @@ -134,488 +134,4 @@ unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc ) return DATAFLASH_OK; } - -/*----------------------------------------------------------------------*/ -/* \fn AT91F_DataFlashSendCommand */ -/* \brief Generic function to send a command to the dataflash */ -/*----------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashSendCommand( - AT91PS_DataFlash pDataFlash, - unsigned char OpCode, - unsigned int CmdSize, - unsigned int DataflashAddress) -{ - unsigned int adr; - - if ( (pDataFlash->pDataFlashDesc->state) != IDLE) - return DATAFLASH_BUSY; - - /* process the address to obtain page address and byte address */ - adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << pDataFlash->pDevice->page_offset) + (DataflashAddress % (pDataFlash->pDevice->pages_size)); - - /* fill the command buffer */ - pDataFlash->pDataFlashDesc->command[0] = OpCode; - if (pDataFlash->pDevice->pages_number >= 16384) { - pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x0F000000) >> 24); - pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x00FF0000) >> 16); - pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((adr & 0x0000FF00) >> 8); - pDataFlash->pDataFlashDesc->command[4] = (unsigned char)(adr & 0x000000FF); - } else { - pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x00FF0000) >> 16); - pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x0000FF00) >> 8); - pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(adr & 0x000000FF) ; - pDataFlash->pDataFlashDesc->command[4] = 0; - } - pDataFlash->pDataFlashDesc->command[5] = 0; - pDataFlash->pDataFlashDesc->command[6] = 0; - pDataFlash->pDataFlashDesc->command[7] = 0; - - /* Initialize the SpiData structure for the spi write fuction */ - pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ; - pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize ; - pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ; - pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize ; - - /* send the command and read the data */ - return AT91F_SpiWrite (pDataFlash->pDataFlashDesc); -} - - -/*----------------------------------------------------------------------*/ -/* \fn AT91F_DataFlashGetStatus */ -/* \brief Read the status register of the dataflash */ -/*----------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc) -{ - AT91S_DataFlashStatus status; - - /* if a transfert is in progress ==> return 0 */ - if( (pDesc->state) != IDLE) - return DATAFLASH_BUSY; - - /* first send the read status command (D7H) */ - pDesc->command[0] = DB_STATUS; - pDesc->command[1] = 0; - - pDesc->DataFlash_state = GET_STATUS; - pDesc->tx_data_size = 0 ; /* Transmit the command and receive response */ - pDesc->tx_cmd_pt = pDesc->command ; - pDesc->rx_cmd_pt = pDesc->command ; - pDesc->rx_cmd_size = 2 ; - pDesc->tx_cmd_size = 2 ; - status = AT91F_SpiWrite (pDesc); - - pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1); - - return status; -} - - -/*----------------------------------------------------------------------*/ -/* \fn AT91F_DataFlashWaitReady */ -/* \brief wait for dataflash ready (bit7 of the status register == 1) */ -/*----------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc pDataFlashDesc, unsigned int timeout) -{ - pDataFlashDesc->DataFlash_state = IDLE; - - do { - AT91F_DataFlashGetStatus(pDataFlashDesc); - timeout--; - } while( ((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) && (timeout > 0) ); - - if((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) - return DATAFLASH_ERROR; - - return DATAFLASH_OK; -} - - -/*------------------------------------------------------------------------------*/ -/* Function Name : AT91F_DataFlashContinuousRead */ -/* Object : Continuous stream Read */ -/* Input Parameters : DataFlash Service */ -/* : <src> = dataflash address */ -/* : <*dataBuffer> = data buffer pointer */ -/* : <sizeToRead> = data buffer size */ -/* Return value : State of the dataflash */ -/*------------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashContinuousRead ( - AT91PS_DataFlash pDataFlash, - int src, - unsigned char *dataBuffer, - int sizeToRead ) -{ - AT91S_DataFlashStatus status; - /* Test the size to read in the device */ - if ( (src + sizeToRead) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number))) - return DATAFLASH_MEMORY_OVERFLOW; - - pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer; - pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead; - pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer; - pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead; - - status = AT91F_DataFlashSendCommand (pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src); - /* Send the command to the dataflash */ - return(status); -} - - -/*------------------------------------------------------------------------------*/ -/* Function Name : AT91F_DataFlashPagePgmBuf */ -/* Object : Main memory page program through buffer 1 or buffer 2 */ -/* Input Parameters : DataFlash Service */ -/* : <*src> = Source buffer */ -/* : <dest> = dataflash destination address */ -/* : <SizeToWrite> = data buffer size */ -/* Return value : State of the dataflash */ -/*------------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf( - AT91PS_DataFlash pDataFlash, - unsigned char *src, - unsigned int dest, - unsigned int SizeToWrite) -{ - int cmdsize; - pDataFlash->pDataFlashDesc->tx_data_pt = src ; - pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ; - pDataFlash->pDataFlashDesc->rx_data_pt = src; - pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite; - - cmdsize = 4; - /* Send the command to the dataflash */ - if (pDataFlash->pDevice->pages_number >= 16384) - cmdsize = 5; - return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_PGM_BUF1, cmdsize, dest)); -} - - -/*------------------------------------------------------------------------------*/ -/* Function Name : AT91F_MainMemoryToBufferTransfert */ -/* Object : Read a page in the SRAM Buffer 1 or 2 */ -/* Input Parameters : DataFlash Service */ -/* : Page concerned */ -/* : */ -/* Return value : State of the dataflash */ -/*------------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert( - AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned int page) -{ - int cmdsize; - /* Test if the buffer command is legal */ - if ((BufferCommand != DB_PAGE_2_BUF1_TRF) && (BufferCommand != DB_PAGE_2_BUF2_TRF)) - return DATAFLASH_BAD_COMMAND; - - /* no data to transmit or receive */ - pDataFlash->pDataFlashDesc->tx_data_size = 0; - cmdsize = 4; - if (pDataFlash->pDevice->pages_number >= 16384) - cmdsize = 5; - return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, page*pDataFlash->pDevice->pages_size)); -} - - -/*----------------------------------------------------------------------------- */ -/* Function Name : AT91F_DataFlashWriteBuffer */ -/* Object : Write data to the internal sram buffer 1 or 2 */ -/* Input Parameters : DataFlash Service */ -/* : <BufferCommand> = command to write buffer1 or buffer2 */ -/* : <*dataBuffer> = data buffer to write */ -/* : <bufferAddress> = address in the internal buffer */ -/* : <SizeToWrite> = data buffer size */ -/* Return value : State of the dataflash */ -/*------------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer ( - AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned char *dataBuffer, - unsigned int bufferAddress, - int SizeToWrite ) -{ - int cmdsize; - /* Test if the buffer command is legal */ - if ((BufferCommand != DB_BUF1_WRITE) && (BufferCommand != DB_BUF2_WRITE)) - return DATAFLASH_BAD_COMMAND; - - /* buffer address must be lower than page size */ - if (bufferAddress > pDataFlash->pDevice->pages_size) - return DATAFLASH_BAD_ADDRESS; - - if ( (pDataFlash->pDataFlashDesc->state) != IDLE) - return DATAFLASH_BUSY; - - /* Send first Write Command */ - pDataFlash->pDataFlashDesc->command[0] = BufferCommand; - pDataFlash->pDataFlashDesc->command[1] = 0; - if (pDataFlash->pDevice->pages_number >= 16384) { - pDataFlash->pDataFlashDesc->command[2] = 0; - pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ; - pDataFlash->pDataFlashDesc->command[4] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ; - cmdsize = 5; - } else { - pDataFlash->pDataFlashDesc->command[2] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ; - pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ; - pDataFlash->pDataFlashDesc->command[4] = 0; - cmdsize = 4; - } - - pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ; - pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize ; - pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ; - pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize ; - - pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer ; - pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer ; - pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite ; - pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ; - - return AT91F_SpiWrite(pDataFlash->pDataFlashDesc); -} - -/*------------------------------------------------------------------------------*/ -/* Function Name : AT91F_PageErase */ -/* Object : Erase a page */ -/* Input Parameters : DataFlash Service */ -/* : Page concerned */ -/* : */ -/* Return value : State of the dataflash */ -/*------------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_PageErase( - AT91PS_DataFlash pDataFlash, - unsigned int page) -{ - int cmdsize; - /* Test if the buffer command is legal */ - /* no data to transmit or receive */ - pDataFlash->pDataFlashDesc->tx_data_size = 0; - - cmdsize = 4; - if (pDataFlash->pDevice->pages_number >= 16384) - cmdsize = 5; - return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_ERASE, cmdsize, page*pDataFlash->pDevice->pages_size)); -} - - -/*------------------------------------------------------------------------------*/ -/* Function Name : AT91F_BlockErase */ -/* Object : Erase a Block */ -/* Input Parameters : DataFlash Service */ -/* : Page concerned */ -/* : */ -/* Return value : State of the dataflash */ -/*------------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_BlockErase( - AT91PS_DataFlash pDataFlash, - unsigned int block) -{ - int cmdsize; - /* Test if the buffer command is legal */ - /* no data to transmit or receive */ - pDataFlash->pDataFlashDesc->tx_data_size = 0; - cmdsize = 4; - if (pDataFlash->pDevice->pages_number >= 16384) - cmdsize = 5; - return(AT91F_DataFlashSendCommand (pDataFlash, DB_BLOCK_ERASE,cmdsize, block*8*pDataFlash->pDevice->pages_size)); -} - -/*------------------------------------------------------------------------------*/ -/* Function Name : AT91F_WriteBufferToMain */ -/* Object : Write buffer to the main memory */ -/* Input Parameters : DataFlash Service */ -/* : <BufferCommand> = command to send to buffer1 or buffer2 */ -/* : <dest> = main memory address */ -/* Return value : State of the dataflash */ -/*------------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_WriteBufferToMain ( - AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned int dest ) -{ - int cmdsize; - /* Test if the buffer command is correct */ - if ((BufferCommand != DB_BUF1_PAGE_PGM) && - (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) && - (BufferCommand != DB_BUF2_PAGE_PGM) && - (BufferCommand != DB_BUF2_PAGE_ERASE_PGM) ) - return DATAFLASH_BAD_COMMAND; - - /* no data to transmit or receive */ - pDataFlash->pDataFlashDesc->tx_data_size = 0; - - cmdsize = 4; - if (pDataFlash->pDevice->pages_number >= 16384) - cmdsize = 5; - /* Send the command to the dataflash */ - return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, dest)); -} - - -/*------------------------------------------------------------------------------*/ -/* Function Name : AT91F_PartialPageWrite */ -/* Object : Erase partielly a page */ -/* Input Parameters : <page> = page number */ -/* : <AdrInpage> = adr to begin the fading */ -/* : <length> = Number of bytes to erase */ -/*------------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_PartialPageWrite ( - AT91PS_DataFlash pDataFlash, - unsigned char *src, - unsigned int dest, - unsigned int size) -{ - unsigned int page; - unsigned int AdrInPage; - - page = dest / (pDataFlash->pDevice->pages_size); - AdrInPage = dest % (pDataFlash->pDevice->pages_size); - - /* Read the contents of the page in the Sram Buffer */ - AT91F_MainMemoryToBufferTransfert(pDataFlash, DB_PAGE_2_BUF1_TRF, page); - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); - /*Update the SRAM buffer */ - AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, AdrInPage, size); - - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); - - /* Erase page if a 128 Mbits device */ - if (pDataFlash->pDevice->pages_number >= 16384) { - AT91F_PageErase(pDataFlash, page); - /* Rewrite the modified Sram Buffer in the main memory */ - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); - } - - /* Rewrite the modified Sram Buffer in the main memory */ - return(AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM, (page*pDataFlash->pDevice->pages_size))); -} - - -/*------------------------------------------------------------------------------*/ -/* Function Name : AT91F_DataFlashWrite */ -/* Object : */ -/* Input Parameters : <*src> = Source buffer */ -/* : <dest> = dataflash adress */ -/* : <size> = data buffer size */ -/*------------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashWrite( - AT91PS_DataFlash pDataFlash, - unsigned char *src, - int dest, - int size ) -{ - unsigned int length; - unsigned int page; - unsigned int status; - - AT91F_SpiEnable(pDataFlash->pDevice->cs); - - if ( (dest + size) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number))) - return DATAFLASH_MEMORY_OVERFLOW; - - /* If destination does not fit a page start address */ - if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 ) { - length = pDataFlash->pDevice->pages_size - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size))); - - if (size < length) - length = size; - - if(!AT91F_PartialPageWrite(pDataFlash,src, dest, length)) - return DATAFLASH_ERROR; - - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); - - /* Update size, source and destination pointers */ - size -= length; - dest += length; - src += length; - } - - while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) { - /* program dataflash page */ - page = (unsigned int)dest / (pDataFlash->pDevice->pages_size); - - status = AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, 0, pDataFlash->pDevice->pages_size); - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); - - status = AT91F_PageErase(pDataFlash, page); - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); - if (!status) - return DATAFLASH_ERROR; - - status = AT91F_WriteBufferToMain (pDataFlash, DB_BUF1_PAGE_PGM, dest); - if(!status) - return DATAFLASH_ERROR; - - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); - - /* Update size, source and destination pointers */ - size -= pDataFlash->pDevice->pages_size ; - dest += pDataFlash->pDevice->pages_size ; - src += pDataFlash->pDevice->pages_size ; - } - - /* If still some bytes to read */ - if ( size > 0 ) { - /* program dataflash page */ - if(!AT91F_PartialPageWrite(pDataFlash, src, dest, size) ) - return DATAFLASH_ERROR; - - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); - } - return DATAFLASH_OK; -} - - -/*------------------------------------------------------------------------------*/ -/* Function Name : AT91F_DataFlashRead */ -/* Object : Read a block in dataflash */ -/* Input Parameters : */ -/* Return value : */ -/*------------------------------------------------------------------------------*/ -int AT91F_DataFlashRead( - AT91PS_DataFlash pDataFlash, - unsigned long addr, - unsigned long size, - char *buffer) -{ - unsigned long SizeToRead; - - AT91F_SpiEnable(pDataFlash->pDevice->cs); - - if(AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK) - return -1; - - while (size) { - SizeToRead = (size < 0x8000)? size:0x8000; - - if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK) - return -1; - - if (AT91F_DataFlashContinuousRead (pDataFlash, addr, (uchar *)buffer, SizeToRead) != DATAFLASH_OK) - return -1; - - size -= SizeToRead; - addr += SizeToRead; - buffer += SizeToRead; - } - - return DATAFLASH_OK; -} - - -/*------------------------------------------------------------------------------*/ -/* Function Name : AT91F_DataflashProbe */ -/* Object : */ -/* Input Parameters : */ -/* Return value : Dataflash status register */ -/*------------------------------------------------------------------------------*/ -int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc) -{ - AT91F_SpiEnable(cs); - AT91F_DataFlashGetStatus(pDesc); - return((pDesc->command[1] == 0xFF)? 0: pDesc->command[1] & 0x3C); -} - #endif diff --git a/board/at91rm9200ek/Makefile b/board/at91rm9200ek/Makefile new file mode 100644 index 0000000000..10a2cdc6b6 --- /dev/null +++ b/board/at91rm9200ek/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := at91rm9200ek.o at45.o flash.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/at91rm9200ek/at45.c b/board/at91rm9200ek/at45.c new file mode 100644 index 0000000000..66cb14bb1d --- /dev/null +++ b/board/at91rm9200ek/at45.c @@ -0,0 +1,137 @@ +/* Driver for ATMEL DataFlash support + * Author : Hamid Ikdoumi (Atmel) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <config.h> +#include <common.h> +#include <asm/hardware.h> + +#ifdef CONFIG_HAS_DATAFLASH +#include <dataflash.h> + +#define AT91C_SPI_CLK 10000000 /* Max Value = 10MHz to be compliant to +the Continuous Array Read function */ + +/* AC Characteristics */ +/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */ +#define DATAFLASH_TCSS (0xC << 16) +#define DATAFLASH_TCHS (0x1 << 24) + +#define AT91C_TIMEOUT_WRDY 200000 +#define AT91C_SPI_PCS0_SERIAL_DATAFLASH 0xE /* Chip Select 0 : NPCS0 %1110 */ +#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3 : NPCS3 %0111 */ + +void AT91F_SpiInit(void) { + +/*-------------------------------------------------------------------*/ +/* SPI DataFlash Init */ +/*-------------------------------------------------------------------*/ + /* Configure PIOs */ + AT91C_BASE_PIOA->PIO_ASR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 | + AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK; + AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 | + AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK; + /* Enable CLock */ + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI; + + /* Reset the SPI */ + AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST; + + /* Configure SPI in Master Mode with No CS selected !!! */ + AT91C_BASE_SPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS; + + /* Configure CS0 and CS3 */ + *(AT91C_SPI_CSR + 0) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT & + DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8); + + *(AT91C_SPI_CSR + 3) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT & + DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8); + +} + +void AT91F_SpiEnable(int cs) { + switch(cs) { + case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */ + AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF; + AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS0_SERIAL_DATAFLASH<<16) & AT91C_SPI_PCS); + break; + case 3: /* Configure SPI CS3 for Serial DataFlash Card */ + /* Set up PIO SDC_TYPE to switch on DataFlash Card and not MMC/SDCard */ + AT91C_BASE_PIOB->PIO_PER = AT91C_PIO_PB7; /* Set in PIO mode */ + AT91C_BASE_PIOB->PIO_OER = AT91C_PIO_PB7; /* Configure in output */ + /* Clear Output */ + AT91C_BASE_PIOB->PIO_CODR = AT91C_PIO_PB7; + /* Configure PCS */ + AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF; + AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS); + break; + } + + /* SPI_Enable */ + AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN; +} + +/*----------------------------------------------------------------------------*/ +/* \fn AT91F_SpiWrite */ +/* \brief Set the PDC registers for a transfert */ +/*----------------------------------------------------------------------------*/ +unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc ) +{ + unsigned int timeout; + + pDesc->state = BUSY; + + AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; + + /* Initialize the Transmit and Receive Pointer */ + AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ; + AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ; + + /* Intialize the Transmit and Receive Counters */ + AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size; + AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size; + + if ( pDesc->tx_data_size != 0 ) { + /* Initialize the Next Transmit and Next Receive Pointer */ + AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ; + AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ; + + /* Intialize the Next Transmit and Next Receive Counters */ + AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ; + AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ; + } + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked(); + timeout = 0; + + AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN; + while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) && ((timeout = get_timer_masked() ) < CFG_SPI_WRITE_TOUT)); + AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; + pDesc->state = IDLE; + + if (timeout >= CFG_SPI_WRITE_TOUT){ + printf("Error Timeout\n\r"); + return DATAFLASH_ERROR; + } + + return DATAFLASH_OK; +} + +#endif diff --git a/board/at91rm9200ek/at91rm9200ek.c b/board/at91rm9200ek/at91rm9200ek.c new file mode 100644 index 0000000000..5fd841a826 --- /dev/null +++ b/board/at91rm9200ek/at91rm9200ek.c @@ -0,0 +1,142 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/AT91RM9200.h> +#include <at91rm9200_net.h> +#include <dm9161.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +int board_init (void) +{ + /* Enable Ctrlc */ + console_init_f (); + + /* Correct IRDA resistor problem */ + /* Set PA23_TXD in Output */ + ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2; + + /* memory and cpu-speed are setup before relocation */ + /* so we do _nothing_ here */ + + /* arch number of AT91RM9200EK-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200EK; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int dram_init (void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + +#ifdef CONFIG_DRIVER_ETHER +#if (CONFIG_COMMANDS & CFG_CMD_NET) + +/* + * Name: + * at91rm9200_GetPhyInterface + * Description: + * Initialise the interface functions to the PHY + * Arguments: + * None + * Return value: + * None + */ +void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops) +{ + p_phyops->Init = dm9161_InitPhy; + p_phyops->IsPhyConnected = dm9161_IsPhyConnected; + p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed; + p_phyops->AutoNegotiate = dm9161_AutoNegotiate; +} + +#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ +#endif /* CONFIG_DRIVER_ETHER */ + +/* + * Disk On Chip (NAND) Millenium initialization. + * The NAND lives in the CS2* space + */ +#if (CONFIG_COMMANDS & CFG_CMD_NAND) +extern ulong nand_probe (ulong physadr); + +#define AT91_SMARTMEDIA_BASE 0x40000000 /* physical address to access memory on NCS3 */ +void nand_init (void) +{ + /* Setup Smart Media, fitst enable the address range of CS3 */ + *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia; + /* set the bus interface characteristics based on + tDS Data Set up Time 30 - ns + tDH Data Hold Time 20 - ns + tALS ALE Set up Time 20 - ns + 16ns at 60 MHz ~= 3 */ +/*memory mapping structures */ +#define SM_ID_RWH (5 << 28) +#define SM_RWH (1 << 28) +#define SM_RWS (0 << 24) +#define SM_TDF (1 << 8) +#define SM_NWS (3) + AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS | + AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 | + SM_TDF | AT91C_SMC2_WSEN | SM_NWS); + + /* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */ + *AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE | + AT91C_PC3_BFBAA_SMWE; + *AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE | + AT91C_PC3_BFBAA_SMWE; + + /* Configure PC2 as input (signal READY of the SmartMedia) */ + *AT91C_PIOC_PER = AT91C_PC2_BFAVD; /* enable direct output enable */ + *AT91C_PIOC_ODR = AT91C_PC2_BFAVD; /* disable output */ + + /* Configure PB1 as input (signal Card Detect of the SmartMedia) */ + *AT91C_PIOB_PER = AT91C_PIO_PB1; /* enable direct output enable */ + *AT91C_PIOB_ODR = AT91C_PIO_PB1; /* disable output */ + + /* PIOB and PIOC clock enabling */ + *AT91C_PMC_PCER = 1 << AT91C_ID_PIOB; + *AT91C_PMC_PCER = 1 << AT91C_ID_PIOC; + + if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1) + printf (" No SmartMedia card inserted\n"); +#ifdef DEBUG + printf (" SmartMedia card inserted\n"); + + printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE); +#endif + printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20); +} +#endif diff --git a/board/at91rm9200ek/config.mk b/board/at91rm9200ek/config.mk new file mode 100644 index 0000000000..9ce161e55f --- /dev/null +++ b/board/at91rm9200ek/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x21f00000 diff --git a/board/at91rm9200ek/flash.c b/board/at91rm9200ek/flash.c new file mode 100644 index 0000000000..0513d61d73 --- /dev/null +++ b/board/at91rm9200ek/flash.c @@ -0,0 +1,502 @@ +/* + * (C) Copyright 2002 + * Lineo, Inc. <www.lineo.com> + * Bernhard Kuhn <bkuhn@lineo.com> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Alex Zuepke <azu@sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +ulong myflush(void); + + +/* Flash Organization Structure */ +typedef struct OrgDef +{ + unsigned int sector_number; + unsigned int sector_size; +} OrgDef; + + +/* Flash Organizations */ +OrgDef OrgAT49BV16x4[] = +{ + { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ + { 2, 32*1024 }, /* 2 * 32 kBytes sectors */ + { 30, 64*1024 }, /* 30 * 64 kBytes sectors */ +}; + +OrgDef OrgAT49BV16x4A[] = +{ + { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ + { 31, 64*1024 }, /* 31 * 64 kBytes sectors */ +}; + +OrgDef OrgAT49BV6416[] = +{ + { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ + { 127, 64*1024 }, /* 127 * 64 kBytes sectors */ +}; + +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; + +/* AT49BV1614A Codes */ +#define FLASH_CODE1 0xAA +#define FLASH_CODE2 0x55 +#define ID_IN_CODE 0x90 +#define ID_OUT_CODE 0xF0 + + +#define CMD_READ_ARRAY 0x00F0 +#define CMD_UNLOCK1 0x00AA +#define CMD_UNLOCK2 0x0055 +#define CMD_ERASE_SETUP 0x0080 +#define CMD_ERASE_CONFIRM 0x0030 +#define CMD_PROGRAM 0x00A0 +#define CMD_UNLOCK_BYPASS 0x0020 +#define CMD_SECTOR_UNLOCK 0x0070 + +#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00005555<<1))) +#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00002AAA<<1))) + +#define BIT_ERASE_DONE 0x0080 +#define BIT_RDY_MASK 0x0080 +#define BIT_PROGRAM_ERROR 0x0020 +#define BIT_TIMEOUT 0x80000000 /* our flag */ + +#define READY 1 +#define ERR 2 +#define TMO 4 + +/*----------------------------------------------------------------------- + */ +void flash_identification (flash_info_t * info) +{ + volatile u16 manuf_code, device_code, add_device_code; + + MEM_FLASH_ADDR1 = FLASH_CODE1; + MEM_FLASH_ADDR2 = FLASH_CODE2; + MEM_FLASH_ADDR1 = ID_IN_CODE; + + manuf_code = *(volatile u16 *) CFG_FLASH_BASE; + device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2); + add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1)); + + MEM_FLASH_ADDR1 = FLASH_CODE1; + MEM_FLASH_ADDR2 = FLASH_CODE2; + MEM_FLASH_ADDR1 = ID_OUT_CODE; + + /* Vendor type */ + info->flash_id = ATM_MANUFACT & FLASH_VENDMASK; + printf ("Atmel: "); + + if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV1614 & FLASH_TYPEMASK)) { + + if ((add_device_code & FLASH_TYPEMASK) == + (ATM_ID_BV1614A & FLASH_TYPEMASK)) { + info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK; + printf ("AT49BV1614A (16Mbit)\n"); + } else { /* AT49BV1614 Flash */ + info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK; + printf ("AT49BV1614 (16Mbit)\n"); + } + + } else if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV6416 & FLASH_TYPEMASK)) { + info->flash_id |= ATM_ID_BV6416 & FLASH_TYPEMASK; + printf ("AT49BV6416 (64Mbit)\n"); + } +} + +ushort flash_number_sector(OrgDef *pOrgDef, unsigned int nb_blocks) +{ + int i, nb_sectors = 0; + + for (i=0; i<nb_blocks; i++){ + nb_sectors += pOrgDef[i].sector_number; + } + + return nb_sectors; +} + +void flash_unlock_sector(flash_info_t * info, unsigned int sector) +{ + volatile u16 *addr = (volatile u16 *) (info->start[sector]); + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + *addr = CMD_SECTOR_UNLOCK; +} + + +ulong flash_init (void) +{ + int i, j, k; + unsigned int flash_nb_blocks, sector; + unsigned int start_address; + OrgDef *pOrgDef; + + ulong size = 0; + + for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { + ulong flashbase = 0; + + flash_identification (&flash_info[i]); + + if ((flash_info[i].flash_id & FLASH_TYPEMASK) == + (ATM_ID_BV1614 & FLASH_TYPEMASK)) { + + pOrgDef = OrgAT49BV16x4; + flash_nb_blocks = sizeof (OrgAT49BV16x4) / sizeof (OrgDef); + } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) == + (ATM_ID_BV1614A & FLASH_TYPEMASK)){ /* AT49BV1614A Flash */ + + pOrgDef = OrgAT49BV16x4A; + flash_nb_blocks = sizeof (OrgAT49BV16x4A) / sizeof (OrgDef); + } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) == + (ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */ + + pOrgDef = OrgAT49BV6416; + flash_nb_blocks = sizeof (OrgAT49BV6416) / sizeof (OrgDef); + } else { + flash_nb_blocks = 0; + pOrgDef = OrgAT49BV16x4; + } + + flash_info[i].sector_count = flash_number_sector(pOrgDef, flash_nb_blocks); + memset (flash_info[i].protect, 0, flash_info[i].sector_count); + + if (i == 0) + flashbase = PHYS_FLASH_1; + else + panic ("configured too many flash banks!\n"); + + sector = 0; + start_address = flashbase; + flash_info[i].size = 0; + + for (j = 0; j < flash_nb_blocks; j++) { + for (k = 0; k < pOrgDef[j].sector_number; k++) { + flash_info[i].start[sector++] = start_address; + start_address += pOrgDef[j].sector_size; + flash_info[i].size += pOrgDef[j].sector_size; + } + } + + size += flash_info[i].size; + + if ((flash_info[i].flash_id & FLASH_TYPEMASK) == + (ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */ + + /* Unlock all sectors at reset */ + for (j=0; j<flash_info[i].sector_count; j++){ + flash_unlock_sector(&flash_info[i], j); + } + } + } + + /* Protect binary boot image */ + flash_protect (FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE + CFG_BOOT_SIZE - 1, &flash_info[0]); + + /* Protect environment variables */ + flash_protect (FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]); + + /* Protect U-Boot gzipped image */ + flash_protect (FLAG_PROTECT_SET, + CFG_U_BOOT_BASE, + CFG_U_BOOT_BASE + CFG_U_BOOT_SIZE - 1, &flash_info[0]); + + return size; +} + +/*----------------------------------------------------------------------- + */ +void flash_print_info (flash_info_t * info) +{ + int i; + + switch (info->flash_id & FLASH_VENDMASK) { + case (ATM_MANUFACT & FLASH_VENDMASK): + printf ("Atmel: "); + break; + default: + printf ("Unknown Vendor "); + break; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case (ATM_ID_BV1614 & FLASH_TYPEMASK): + printf ("AT49BV1614 (16Mbit)\n"); + break; + case (ATM_ID_BV1614A & FLASH_TYPEMASK): + printf ("AT49BV1614A (16Mbit)\n"); + break; + case (ATM_ID_BV6416 & FLASH_TYPEMASK): + printf ("AT49BV6416 (64Mbit)\n"); + break; + default: + printf ("Unknown Chip Type\n"); + return; + } + + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; i++) { + if ((i % 5) == 0) { + printf ("\n "); + } + printf (" %08lX%s", info->start[i], + info->protect[i] ? " (RO)" : " "); + } + printf ("\n"); +} + +/*----------------------------------------------------------------------- + */ + +int flash_erase (flash_info_t * info, int s_first, int s_last) +{ + ulong result; + int iflag, cflag, prot, sect; + int rc = ERR_OK; + int chip1; + + /* first look for protection bits */ + + if (info->flash_id == FLASH_UNKNOWN) + return ERR_UNKNOWN_FLASH_TYPE; + + if ((s_first < 0) || (s_first > s_last)) { + return ERR_INVAL; + } + + if ((info->flash_id & FLASH_VENDMASK) != + (ATM_MANUFACT & FLASH_VENDMASK)) { + return ERR_UNKNOWN_FLASH_VENDOR; + } + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + if (prot) + return ERR_PROTECTED; + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + cflag = icache_status (); + icache_disable (); + iflag = disable_interrupts (); + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { + printf ("Erasing sector %2d ... ", sect); + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + if (info->protect[sect] == 0) { /* not protected */ + volatile u16 *addr = (volatile u16 *) (info->start[sect]); + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + MEM_FLASH_ADDR1 = CMD_ERASE_SETUP; + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + *addr = CMD_ERASE_CONFIRM; + + /* wait until flash is ready */ + chip1 = 0; + + do { + result = *addr; + + /* check timeout */ + if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) { + MEM_FLASH_ADDR1 = CMD_READ_ARRAY; + chip1 = TMO; + break; + } + + if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE) + chip1 = READY; + + } while (!chip1); + + MEM_FLASH_ADDR1 = CMD_READ_ARRAY; + + if (chip1 == ERR) { + rc = ERR_PROG_ERROR; + goto outahere; + } + if (chip1 == TMO) { + rc = ERR_TIMOUT; + goto outahere; + } + + printf ("ok.\n"); + } else { /* it was protected */ + printf ("protected!\n"); + } + } + + if (ctrlc ()) + printf ("User Interrupt!\n"); + +outahere: + /* allow flash to settle - wait 10 ms */ + udelay_masked (10000); + + if (iflag) + enable_interrupts (); + + if (cflag) + icache_enable (); + + return rc; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash + */ + +static int write_word (flash_info_t * info, ulong dest, ulong data) +{ + volatile u16 *addr = (volatile u16 *) dest; + ulong result; + int rc = ERR_OK; + int cflag, iflag; + int chip1; + + /* + * Check if Flash is (sufficiently) erased + */ + result = *addr; + if ((result & data) != data) + return ERR_NOT_ERASED; + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + cflag = icache_status (); + icache_disable (); + iflag = disable_interrupts (); + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + MEM_FLASH_ADDR1 = CMD_PROGRAM; + *addr = data; + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + /* wait until flash is ready */ + chip1 = 0; + do { + result = *addr; + + /* check timeout */ + if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) { + chip1 = ERR | TMO; + break; + } + if (!chip1 && ((result & 0x80) == (data & 0x80))) + chip1 = READY; + + } while (!chip1); + + *addr = CMD_READ_ARRAY; + + if (chip1 == ERR || *addr != data) + rc = ERR_PROG_ERROR; + + if (iflag) + enable_interrupts (); + + if (cflag) + icache_enable (); + + return rc; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash. + */ + +int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) +{ + ulong wp, data; + int rc; + + if (addr & 1) { + printf ("unaligned destination not supported\n"); + return ERR_ALIGN; + }; + + if ((int) src & 1) { + printf ("unaligned source not supported\n"); + return ERR_ALIGN; + }; + + wp = addr; + + while (cnt >= 2) { + data = *((volatile u16 *) src); + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + src += 2; + wp += 2; + cnt -= 2; + } + + if (cnt == 1) { + data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) << + 8); + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + src += 1; + wp += 1; + cnt -= 1; + }; + + return ERR_OK; +} diff --git a/board/at91rm9200ek/u-boot.lds b/board/at91rm9200ek/u-boot.lds new file mode 100644 index 0000000000..f4fbf969c3 --- /dev/null +++ b/board/at91rm9200ek/u-boot.lds @@ -0,0 +1,57 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm920t/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/board/at91sam9260ek/Makefile b/board/at91sam9260ek/Makefile new file mode 100644 index 0000000000..ef8b305713 --- /dev/null +++ b/board/at91sam9260ek/Makefile @@ -0,0 +1,46 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := at91sam9260ek.o dm9161a.o nand.o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff --git a/board/at91sam9260ek/at91sam9260ek.c b/board/at91sam9260ek/at91sam9260ek.c new file mode 100644 index 0000000000..5fce346a25 --- /dev/null +++ b/board/at91sam9260ek/at91sam9260ek.c @@ -0,0 +1,195 @@ +/* + * (C) Copyright 2006 + * M. Amine SAYA ATMEL Rousset, France. + * Added AT91SAM9260EK support. + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/hardware.h> + +#include <net.h> + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +int board_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* Enable Ctrlc */ + console_init_f (); + + /* Enable clocks for SMC */ + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS; + + /* memory and cpu-speed are setup before relocation */ + /* so we do _nothing_ here */ + + /* arch number of AT91SAM9260EK-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9260EK; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + + +int board_late_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* Fix Ethernet Initialization Bug when starting Linux from U-Boot */ +#if (CONFIG_COMMANDS & CFG_CMD_NET) + eth_init(gd->bd); +#endif + + return 0; +} + + + +int AT91F_Serial_Hardware_Init(void) +{ + +/* DBGU */ +#ifdef CONFIG_DBGU + *AT91C_PIOB_PDR = AT91C_PB15_DTXD | AT91C_PB14_DRXD; /* PB 15 & 15 */ + *AT91C_PMC_PCER = 1 << AT91C_ID_SYS; /* enable clock */ +#endif + +/* USART 0 */ +#ifdef CONFIG_USART0 + *AT91C_PIOB_PDR = AT91C_PB4_TXD0 | AT91C_PB5_RXD0; /* PB 4 & 5 */ + *AT91C_PMC_PCER |= 1 << AT91C_ID_US0; /* enable clock */ +#endif + +#ifdef CONFIG_USART1 + *AT91C_PIOB_PDR = AT91C_PB6_TXD1 | AT91C_PB7_RXD1; /* PB 6 & 7 */ + *AT91C_PMC_PCER |= 1 << AT91C_ID_US1; /* enable clock */ +#endif + +#ifdef CONFIG_USART2 + *AT91C_PIOB_PDR = AT91C_PB8_TXD2 | AT91C_PB9_RXD2; /* PB 8 & 9 */ + *AT91C_PMC_PCER |= 1 << AT91C_ID_US2; /* enable clock */ +#endif +} + + +#ifdef CONFIG_DRIVER_ETHER +#if (CONFIG_COMMANDS & CFG_CMD_NET) + +extern AT91PS_EMAC p_mac; + +int AT91F_EMAC_Hardware_Init(void) +{ + unsigned int periphAEnable, periphBEnable; + unsigned int val, i; + int ret; + + p_mac = AT91C_BASE_EMACB; + + /* Disable pull-up on: + RXDV (PA17) => PHY normal mode (not Test mode) + + ERX0 (PA14) => PHY ADDR0 + ERX1 (PA15) => PHY ADDR1 + ERX2 (PA25) => PHY ADDR2 + ERX3 (PA26) => PHY ADDR3 + ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 + + PHY has internal pull-down + */ + + AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PA14_ERX0 | AT91C_PA15_ERX1 | + AT91C_PA17_ERXDV | AT91C_PA25_ERX2 | + AT91C_PA26_ERX3 | AT91C_PA28_ECRS; + + /* Need to reset PHY -> 500ms reset */ + AT91C_BASE_RSTC->RSTC_RMR = (AT91C_RSTC_KEY & ((unsigned int)0xA5<<24)) | + (AT91C_RSTC_ERSTL & (0x0D << 8)) | AT91C_RSTC_URSTEN; + AT91C_BASE_RSTC->RSTC_RCR = (AT91C_RSTC_KEY & ((unsigned int)0xA5<<24)) | + AT91C_RSTC_EXTRST; + + /* Wait for end hardware reset */ + while (!(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL)); + + /* Re-enable pull-up */ + AT91C_BASE_PIOA->PIO_PPUER = AT91C_PA14_ERX0 | AT91C_PA15_ERX1 | + AT91C_PA17_ERXDV | AT91C_PA25_ERX2 | + AT91C_PA26_ERX3 | AT91C_PA28_ECRS; + +#ifdef CONFIG_AT91C_USE_RMII + periphAEnable = ((unsigned int) AT91C_PA21_EMDIO ) | + ((unsigned int) AT91C_PA20_EMDC ) | + ((unsigned int) AT91C_PA19_ETXCK ) | + ((unsigned int) AT91C_PA18_ERXER ) | + ((unsigned int) AT91C_PA14_ERX0 ) | + ((unsigned int) AT91C_PA17_ERXDV ) | + ((unsigned int) AT91C_PA15_ERX1 ) | + ((unsigned int) AT91C_PA16_ETXEN ) | + ((unsigned int) AT91C_PA12_ETX0 ) | + ((unsigned int) AT91C_PA13_ETX1 ); + + periphBEnable = 0; +#else + periphAEnable = ((unsigned int) AT91C_PA21_EMDIO ) | + ((unsigned int) AT91C_PA19_ETXCK ) | + ((unsigned int) AT91C_PA20_EMDC ) | + ((unsigned int) AT91C_PA18_ERXER ) | + ((unsigned int) AT91C_PA14_ERX0 ) | + ((unsigned int) AT91C_PA17_ERXDV ) | + ((unsigned int) AT91C_PA15_ERX1 ) | + ((unsigned int) AT91C_PA16_ETXEN ) | + ((unsigned int) AT91C_PA12_ETX0 ) | + ((unsigned int) AT91C_PA13_ETX1 ); + + periphBEnable = ((unsigned int) AT91C_PA27_ERXCK ) | + ((unsigned int) AT91C_PA29_ECOL ) | + ((unsigned int) AT91C_PA25_ERX2 ) | + ((unsigned int) AT91C_PA26_ERX3 ) | + ((unsigned int) AT91C_PA22_ETXER ) | + ((unsigned int) AT91C_PA10_ETX2 ) | + ((unsigned int) AT91C_PA11_ETX3 ) | + ((unsigned int) AT91C_PA28_ECRS ); +#endif + AT91C_BASE_PIOA->PIO_ASR = periphAEnable; + AT91C_BASE_PIOA->PIO_BSR = periphBEnable; + AT91C_BASE_PIOA->PIO_PDR = (periphAEnable | periphBEnable); +} + +#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ +#endif /* CONFIG_DRIVER_ETHER */ diff --git a/board/at91sam9260ek/config.mk b/board/at91sam9260ek/config.mk new file mode 100644 index 0000000000..ff2cfd170b --- /dev/null +++ b/board/at91sam9260ek/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/at91sam9260ek/dm9161a.c b/board/at91sam9260ek/dm9161a.c new file mode 100644 index 0000000000..135e2e1127 --- /dev/null +++ b/board/at91sam9260ek/dm9161a.c @@ -0,0 +1,301 @@ +/* + * (C) Copyright 2003 + * Author : Hamid Ikdoumi (Atmel) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <at91_net.h> +#include <net.h> +#include <dm9161.h> + +#ifdef CONFIG_DRIVER_ETHER + +#if (CONFIG_COMMANDS & CFG_CMD_NET) + +/* + * Name: + * dm9161a_IsPhyConnected + * Description: + * Reads the 2 PHY ID registers + * Arguments: + * p_mac - pointer to AT91S_EMAC struct + * Return value: + * TRUE - if id read successfully + * FALSE- if error + */ +static unsigned int dm9161a_IsPhyConnected (AT91PS_EMAC p_mac) +{ + unsigned short Id1, Id2; + + at91_EmacEnableMDIO (p_mac); + at91_EmacReadPhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_PHYID1, &Id1); + at91_EmacReadPhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_PHYID2, &Id2); + at91_EmacDisableMDIO (p_mac); + + if ((Id1 == (DM9161_PHYID1_OUI >> 6)) && + ((Id2 >> 10) == (DM9161_PHYID1_OUI & DM9161_LSB_MASK))) { + printf("DM9161A PHY Detected\n\r"); + return TRUE; + } + + return FALSE; +} + +/* + * Name: + * dm9161a_GetLinkSpeed + * Description: + * Link parallel detection status of MAC is checked and set in the + * MAC configuration registers + * Arguments: + * p_mac - pointer to MAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +static uchar dm9161a_GetLinkSpeed (AT91PS_EMAC p_mac) +{ + unsigned short stat1, stat2; + + if (!at91_EmacReadPhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_BMSR, &stat1)) + return FALSE; + + if (!(stat1 & DM9161_LINK_STATUS)) /* link status up? */ + return FALSE; + + if (!at91_EmacReadPhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_DSCSR, &stat2)) + return FALSE; + + if ((stat1 & DM9161_100BASE_TX_FD) && (stat2 & DM9161_100FDX)) { + /*set Emac for 100BaseTX and Full Duplex */ + p_mac->EMAC_NCFGR |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return TRUE; + } + + if ((stat1 & DM9161_10BASE_T_FD) && (stat2 & DM9161_10FDX)) { + /*set MII for 10BaseT and Full Duplex */ + p_mac->EMAC_NCFGR = (p_mac->EMAC_NCFGR & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_FD; + return TRUE; + } + + if ((stat1 & DM9161_100BASE_T4_HD) && (stat2 & DM9161_100HDX)) { + /*set MII for 100BaseTX and Half Duplex */ + p_mac->EMAC_NCFGR = (p_mac->EMAC_NCFGR & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_SPD; + return TRUE; + } + + if ((stat1 & DM9161_10BASE_T_HD) && (stat2 & DM9161_10HDX)) { + /*set MII for 10BaseT and Half Duplex */ + p_mac->EMAC_NCFGR &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); + return TRUE; + } + + return FALSE; +} + + +/* + * Name: + * dm9161a_ResetPhy + * Description: + * Resets PHY + * Arguments: + * p_mac - pointer to struct AT91S_EMAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +static uchar dm9161a_ResetPhy(AT91PS_EMAC p_mac) +{ + unsigned short bmcr; + int timeout = 10; + uchar ret = TRUE; + + + bmcr = DM9161_RESET; + at91_EmacEnableMDIO (p_mac); + at91_EmacWritePhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_BMCR, &bmcr); + + do { + at91_EmacReadPhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_BMCR, &bmcr); + at91_EmacReadPhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_BMCR, &bmcr); + timeout--; + } while ((bmcr & DM9161_RESET) && timeout); + + at91_EmacDisableMDIO (p_mac); + + if (!timeout) + ret = FALSE; + + return ret; +} + + +/* + * Name: + * dm9161a_InitPhy + * Description: + * MAC starts checking its link by using parallel detection and + * Autonegotiation and the same is set in the MAC configuration registers + * Arguments: + * p_mac - pointer to struct AT91S_EMAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +static uchar dm9161a_InitPhy (AT91PS_EMAC p_mac) +{ + unsigned int tick = 0; + unsigned short IntValue; + uchar ret = TRUE; + + at91_EmacEnableMDIO (p_mac); + + do { + /* Link status is latched, so read twice to get current value */ + at91_EmacReadPhy(p_mac, SAM9260EK_PHY_ADDRESS, DM9161_BMSR, &IntValue); + at91_EmacReadPhy(p_mac, SAM9260EK_PHY_ADDRESS, DM9161_BMSR, &IntValue); + + tick++; + } while (!(IntValue & DM9161_LINK_STATUS) && (tick < AT91C_ETH_TIMEOUT)); + + if (!(IntValue & DM9161_LINK_STATUS)){ + at91_EmacDisableMDIO (p_mac); + printf ("No link\n\r"); + ret = FALSE; + return ret; + } + + if (!dm9161a_GetLinkSpeed (p_mac)) { + /* Try another time */ + ret = dm9161a_GetLinkSpeed (p_mac); + } + + /* Disable PHY Interrupts */ + at91_EmacReadPhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_MDINTR, &IntValue); + /* clear FDX, SPD, Link, INTR masks */ + IntValue &= ~(DM9161_FDX_MASK | DM9161_SPD_MASK | + DM9161_LINK_MASK | DM9161_INTR_MASK); + at91_EmacWritePhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_MDINTR, &IntValue); + at91_EmacDisableMDIO (p_mac); + + return (ret); +} + + +/* + * Name: + * dm9161a_AutoNegotiate + * Description: + * MAC Autonegotiates with the partner status of same is set in the + * MAC configuration registers + * Arguments: + * dev - pointer to struct net_device + * Return value: + * TRUE - if link status set successfully + * FALSE - if link status not set + */ +static uchar dm9161a_AutoNegotiate (AT91PS_EMAC p_mac, int *status) +{ + unsigned short value; + unsigned short PhyAnar; + unsigned short PhyAnalpar; + + /* Set dm9161 control register */ + if (!at91_EmacReadPhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_BMCR, &value)) + return FALSE; + value &= ~DM9161_AUTONEG; /* remove autonegotiation enable */ + value |= DM9161_ISOLATE; /* Electrically isolate PHY */ + if (!at91_EmacWritePhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_BMCR, &value)) + return FALSE; + + /* Set the Auto_negotiation Advertisement Register */ + /* MII advertising for Next page, 100BaseTxFD and HD, 10BaseTFD and HD, IEEE 802.3 */ + PhyAnar = DM9161_NP | DM9161_TX_FDX | DM9161_TX_HDX | + DM9161_10_FDX | DM9161_10_HDX | DM9161_AN_IEEE_802_3; + if (!at91_EmacWritePhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_ANAR, &PhyAnar)) + return FALSE; + + /* Read the Control Register */ + if (!at91_EmacReadPhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_BMCR, &value)) + return FALSE; + + value |= DM9161_SPEED_SELECT | DM9161_AUTONEG | DM9161_DUPLEX_MODE; + if (!at91_EmacWritePhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_BMCR, &value)) + return FALSE; + /* Restart Auto_negotiation */ + value |= DM9161_RESTART_AUTONEG; + if (!at91_EmacWritePhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_BMCR, &value)) + return FALSE; + + /*check AutoNegotiate complete */ + udelay (10000); + at91_EmacReadPhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_BMSR, &value); + if (!(value & DM9161_AUTONEG_COMP)) + return FALSE; + + /* Get the AutoNeg Link partner base page */ + if (!at91_EmacReadPhy (p_mac, SAM9260EK_PHY_ADDRESS, DM9161_ANLPAR, &PhyAnalpar)) + return FALSE; + + if ((PhyAnar & DM9161_TX_FDX) && (PhyAnalpar & DM9161_TX_FDX)) { + /*set MII for 100BaseTX and Full Duplex */ + p_mac->EMAC_NCFGR |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return TRUE; + } + + if ((PhyAnar & DM9161_10_FDX) && (PhyAnalpar & DM9161_10_FDX)) { + /*set MII for 10BaseT and Full Duplex */ + p_mac->EMAC_NCFGR = (p_mac->EMAC_NCFGR & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_FD; + return TRUE; + } + return FALSE; +} + + +/* + * Name: + * at91_GetPhyInterface + * Description: + * Initialise the interface functions to the PHY + * Arguments: + * None + * Return value: + * None + */ +void at91_GetPhyInterface(AT91PS_PhyOps p_phyops) +{ + p_phyops->Init = dm9161a_InitPhy; + p_phyops->IsPhyConnected = dm9161a_IsPhyConnected; + p_phyops->GetLinkSpeed = dm9161a_GetLinkSpeed; + p_phyops->AutoNegotiate = dm9161a_AutoNegotiate; + p_phyops->Reset = dm9161a_ResetPhy; +} + +#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ + +#endif /* CONFIG_DRIVER_ETHER */ + diff --git a/board/at91sam9260ek/nand.c b/board/at91sam9260ek/nand.c new file mode 100644 index 0000000000..2a339a9ed7 --- /dev/null +++ b/board/at91sam9260ek/nand.c @@ -0,0 +1,107 @@ +/* + * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/hardware.h> + +#if (CONFIG_COMMANDS & CFG_CMD_NAND) + +#include <nand.h> + +/* + * hardware specific access to control-lines + */ +#define MASK_ALE (1 << 21) /* our ALE is AD21 */ +#define MASK_CLE (1 << 22) /* our CLE is AD22 */ + +/* + * Disk On Chip (NAND) Millenium initialization. + * The NAND lives in the CS3 space + */ +void at91sam9260ek_nand_init (struct nand_chip *nand) +{ + /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */ + AT91C_BASE_CCFG->CCFG_EBICSA |= AT91C_EBI_CS3A_SM; + + /* Configure SMC CS3 */ + AT91C_BASE_SMC->SMC_SETUP3 = (AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | + AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP); + + AT91C_BASE_SMC->SMC_PULSE3 = (AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE); + + AT91C_BASE_SMC->SMC_CYCLE3 = (AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE); + + if ((nand->options & NAND_BUSWIDTH_16) == NAND_BUSWIDTH_16) + { + AT91C_BASE_SMC->SMC_CTRL3 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | + AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF); + } else { + AT91C_BASE_SMC->SMC_CTRL3 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | + AT91C_SMC_DBW_WIDTH_EIGTH_BITS | AT91C_SM_TDF); + } + + /* Configure RDY/BSY input signal */ + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOC; + + AT91C_BASE_PIOC->PIO_ODR = AT91C_PIO_PC13; + AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC13; + + AT91C_BASE_PIOC->PIO_PPUER = AT91C_PIO_PC13; /* Enable pull-up */ + + /* Enable NandFlash */ + AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC14; + AT91C_BASE_PIOC->PIO_OER = AT91C_PIO_PC14; +} + +static void at91sam9260ek_nand_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + + IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); + switch (cmd) { + case NAND_CTL_SETCLE: IO_ADDR_W |= MASK_CLE; break; + case NAND_CTL_SETALE: IO_ADDR_W |= MASK_ALE; break; + case NAND_CTL_CLRNCE: *AT91C_PIOC_SODR = AT91C_PIO_PC14; break; + case NAND_CTL_SETNCE: *AT91C_PIOC_CODR = AT91C_PIO_PC14; break; + } + this->IO_ADDR_W = (void *) IO_ADDR_W; +} + +/* + * chip R/B detection + */ +static int at91sam9260ek_nand_ready(struct mtd_info *mtd) +{ + return (*AT91C_PIOC_PDSR & AT91C_PIO_PC13); +} + +void board_nand_init(struct nand_chip *nand) +{ + nand->eccmode = NAND_ECC_SOFT; + nand->hwcontrol = at91sam9260ek_nand_hwcontrol; + nand->dev_ready = at91sam9260ek_nand_ready; + nand->chip_delay = 18; + + at91sam9260ek_nand_init(nand); +} +#endif diff --git a/board/at91sam9260ek/u-boot.lds b/board/at91sam9260ek/u-boot.lds new file mode 100644 index 0000000000..d965a03813 --- /dev/null +++ b/board/at91sam9260ek/u-boot.lds @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm926ejs/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/board/at91sam9261ek/Makefile b/board/at91sam9261ek/Makefile new file mode 100644 index 0000000000..33176b2cfd --- /dev/null +++ b/board/at91sam9261ek/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := at91sam9261ek.o nand.o +SOBJS := + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff --git a/board/at91sam9261ek/at91sam9261ek.c b/board/at91sam9261ek/at91sam9261ek.c new file mode 100644 index 0000000000..003f846b82 --- /dev/null +++ b/board/at91sam9261ek/at91sam9261ek.c @@ -0,0 +1,142 @@ +/* + * (C) Copyright 2005 + * M. Amine SAYA ATMEL Rousset, France. + * Added AT91SAM9261EK support. + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/hardware.h> + +#include <net.h> + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ +#ifdef CONFIG_DRIVER_DM9000 + +void at91sam9261ek_dm9000_init(void) { + + /* Configure SMC CS2 for DM9000 */ + AT91C_BASE_SMC->SMC_SETUP2 = (AT91C_DM9000_NWE_SETUP | AT91C_DM9000_NCS_WR_SETUP | + AT91C_DM9000_NRD_SETUP | AT91C_DM9000_NCS_RD_SETUP); + + AT91C_BASE_SMC->SMC_PULSE2 = (AT91C_DM9000_NWE_PULSE | AT91C_DM9000_NCS_WR_PULSE | AT91C_DM9000_NRD_PULSE | AT91C_DM9000_NCS_RD_PULSE); + + AT91C_BASE_SMC->SMC_CYCLE2 = (AT91C_DM9000_NWE_CYCLE | AT91C_DM9000_NRD_CYCLE); + +#ifdef CONFIG_DM9000_USE_8BIT + AT91C_BASE_SMC->SMC_CTRL2 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_ENABLE_READY | + AT91C_SMC_DBW_WIDTH_EIGTH_BITS | AT91C_DM9000_TDF); +#endif + +#ifdef CONFIG_DM9000_USE_16BIT + AT91C_BASE_SMC->SMC_CTRL2 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | + AT91C_SMC_BAT_BYTE_WRITE | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_DM9000_TDF); +#endif + + /* Configure NWAIT signal */ + /* AT91F_PIO_CfgPeriph(AT91C_BASE_PIOC,AT91C_PC2_NWAIT,0); */ + + /* Configure Reset signal in output */ + AT91F_PIO_CfgOutput(AT91C_BASE_PIOC,AT91C_PIO_PC10); + AT91F_PIO_ClearOutput(AT91C_BASE_PIOC,AT91C_PIO_PC10); +} +#endif + +int board_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* Enable Ctrlc */ + console_init_f (); + + /* Enable clocks for SMC and PIOC */ + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS; + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOC; + + /* memory and cpu-speed are setup before relocation */ + /* so we do _nothing_ here */ + +#ifdef CONFIG_LCD + gd->fb_base = (unsigned long) AT91C_IRAM; +#endif + + /* arch number of AT91SAM9261EK-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9261EK; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int AT91F_Serial_Hardware_Init(void) +{ +#ifdef CONFIG_DBGU + *AT91C_PIOA_PDR = AT91C_PA10_DTXD | AT91C_PA9_DRXD; /* PA 10 & 9 */ + *AT91C_PMC_PCER = 1 << AT91C_ID_SYS; /* enable clock */ +#endif + +#ifdef CONFIG_USART0 + *AT91C_PIOA_PDR = AT91C_PC8_TXD0 | AT91C_PC9_RXD0; + *AT91C_PMC_PCER |= 1 << AT91C_ID_US0; /* enable clock */ +#endif + +#ifdef CONFIG_USART1 + *AT91C_PIOB_PDR = AT91C_PC12_TXD1 | AT91C_PC13_RXD1; + *AT91C_PMC_PCER |= 1 << AT91C_ID_US1; /* enable clock */ +#endif + +#ifdef CONFIG_USART2 + *AT91C_PIOB_PDR = AT91C_PC14_TXD2 | AT91C_PC15_RXD2; + *AT91C_PMC_PCER |= 1 << AT91C_ID_US2; /* enable clock */ +#endif +} + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + + +int board_late_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* Fix Ethernet Initialization Bug when starting Linux from U-Boot */ +#if (CONFIG_COMMANDS & CFG_CMD_NET) +#ifdef CONFIG_DRIVER_DM9000 + /* configure SMC's NCS2 to use it with DM9000 chip */ + at91sam9261ek_dm9000_init(); +#endif + eth_init(gd->bd); +#endif + + return 0; +} diff --git a/board/at91sam9261ek/config.mk b/board/at91sam9261ek/config.mk new file mode 100644 index 0000000000..ff2cfd170b --- /dev/null +++ b/board/at91sam9261ek/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/at91sam9261ek/nand.c b/board/at91sam9261ek/nand.c new file mode 100644 index 0000000000..ee33961000 --- /dev/null +++ b/board/at91sam9261ek/nand.c @@ -0,0 +1,124 @@ +/* + * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/hardware.h> + +#if (CONFIG_COMMANDS & CFG_CMD_NAND) + +#include <nand.h> + +/* + * hardware specific access to control-lines + */ +#define MASK_CLE (1 << 21) /* our ALE is AD22 */ +#define MASK_ALE (1 << 22) /* our CLE is AD21 */ + +/* + * Disk On Chip (NAND) Millenium initialization. + * The NAND lives in the CS3* space + */ +void at91sam9261ek_nand_init (struct nand_chip *nand) +{ + /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */ + AT91C_BASE_MATRIX->MATRIX_EBICSA |= AT91C_MATRIX_CS3A_SM; + + /* Configure SMC CS3 */ + AT91C_BASE_SMC->SMC_SETUP3 = (AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | + AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP); + + AT91C_BASE_SMC->SMC_PULSE3 = (AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE); + + AT91C_BASE_SMC->SMC_CYCLE3 = (AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE); + + if ((nand->options & NAND_BUSWIDTH_16) == NAND_BUSWIDTH_16) + { + AT91C_BASE_SMC->SMC_CTRL3 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | + AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF); + } else { + AT91C_BASE_SMC->SMC_CTRL3 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | + AT91C_SMC_DBW_WIDTH_EIGTH_BITS | AT91C_SM_TDF); + } + + /* Clock PIOC */ + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOC; + + /* Configure Ready/Busy signal */ + AT91C_BASE_PIOC->PIO_ODR = AT91C_PIO_PC15; + AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC15; + /* Configure pull-up */ + AT91C_BASE_PIOC->PIO_PPUER = AT91C_PIO_PC15; + + /* Enable PC0=SMOE line PC1=SMWE, A21=CLE, A22=ALE */ + AT91C_BASE_PIOC->PIO_ASR = (AT91C_PC0_SMOE | AT91C_PC1_SMWE); + AT91C_BASE_PIOC->PIO_PDR = (AT91C_PC0_SMOE | AT91C_PC1_SMWE); /* Set in Periph mode */ + + /* Enable NandFlash */ + AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC14; + AT91C_BASE_PIOC->PIO_OER = AT91C_PIO_PC14; +} + +static void at91sam9261ek_nand_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + + IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); + switch (cmd) { + case NAND_CTL_SETCLE: IO_ADDR_W |= MASK_CLE; break; + case NAND_CTL_SETALE: IO_ADDR_W |= MASK_ALE; break; + case NAND_CTL_CLRNCE: *AT91C_PIOC_SODR = AT91C_PIO_PC14; break; + case NAND_CTL_SETNCE: *AT91C_PIOC_CODR = AT91C_PIO_PC14; break; + } + this->IO_ADDR_W = (void *) IO_ADDR_W; +} + +/* + * chip R/B detection + */ +static int at91sam9261ek_nand_ready(struct mtd_info *mtd) +{ + return (*AT91C_PIOC_PDSR & AT91C_PIO_PC15); +} + +void board_nand_init(struct nand_chip *nand) +{ + /* Init due to switch 8/16 bits mode */ + if (nand->write_byte) + nand->write_byte = NULL; + if (nand->read_byte) + nand->read_byte = NULL; + if (nand->write_buf) + nand->write_buf = NULL; + if (nand->read_buf) + nand->read_buf = NULL; + if (nand->verify_buf) + nand->verify_buf = NULL; + + nand->eccmode = NAND_ECC_SOFT; + nand->hwcontrol = at91sam9261ek_nand_hwcontrol; + nand->dev_ready = at91sam9261ek_nand_ready; + nand->chip_delay = 18; + + at91sam9261ek_nand_init(nand); +} +#endif diff --git a/board/at91sam9261ek/u-boot.lds b/board/at91sam9261ek/u-boot.lds new file mode 100644 index 0000000000..afdc7173c9 --- /dev/null +++ b/board/at91sam9261ek/u-boot.lds @@ -0,0 +1,56 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm926ejs/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/board/at91sam9263ek/Makefile b/board/at91sam9263ek/Makefile new file mode 100644 index 0000000000..66f99ac956 --- /dev/null +++ b/board/at91sam9263ek/Makefile @@ -0,0 +1,46 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := at91sam9263ek.o flash.o dm9161a.o nand.o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff --git a/board/at91sam9263ek/at91sam9263ek.c b/board/at91sam9263ek/at91sam9263ek.c new file mode 100644 index 0000000000..05195adc01 --- /dev/null +++ b/board/at91sam9263ek/at91sam9263ek.c @@ -0,0 +1,224 @@ +/* + * (C) Copyright 2006 + * M. Amine SAYA ATEML Rousset, France. + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/hardware.h> + +#include <net.h> + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ +int board_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* Enable Ctrlc */ + console_init_f (); + + /* Enable clocks for SMC */ + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS; + + /* memory and cpu-speed are setup before relocation */ + /* so we do _nothing_ here */ + +#ifdef CONFIG_LCD + gd->fb_base = (unsigned long) AT91C_IRAM; +#endif + + /* arch number of AT91SAM9263EK-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + +int board_late_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* Fix Ethernet Initialization Bug when starting Linux from U-Boot */ +#if (CONFIG_COMMANDS & CFG_CMD_NET) + eth_init(gd->bd); +#endif + + return 0; +} + + +void hw_flash_init(void){ + + /* Configure SMC CS0 for parallel flash */ + AT91C_BASE_SMC0->SMC_SETUP0 = (AT91C_FLASH_NWE_SETUP | AT91C_FLASH_NCS_WR_SETUP | + AT91C_FLASH_NRD_SETUP | AT91C_FLASH_NCS_RD_SETUP); + + AT91C_BASE_SMC0->SMC_PULSE0 = (AT91C_FLASH_NWE_PULSE | AT91C_FLASH_NCS_WR_PULSE | + AT91C_FLASH_NRD_PULSE | AT91C_FLASH_NCS_RD_PULSE); + + AT91C_BASE_SMC0->SMC_CYCLE0 = AT91C_FLASH_NWE_CYCLE | AT91C_FLASH_NRD_CYCLE; + + AT91C_BASE_SMC0->SMC_CTRL0 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | + AT91C_SMC_NWAITM_NWAIT_DISABLE | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | + AT91C_FLASH_TDF); +} + + +int AT91F_Serial_Hardware_Init(void) +{ + +/* DBGU */ +#ifdef CONFIG_DBGU + *AT91C_PIOC_PDR = AT91C_PC31_DTXD | AT91C_PC30_DRXD; /* PA 31 & 30 */ + *AT91C_PMC_PCER = 1 << AT91C_ID_SYS; /* enable clock */ +#endif + +/* USART 0 */ +#ifdef CONFIG_USART0 + *AT91C_PIOA_PDR = AT91C_PA26_TXD0 | AT91C_PA27_RXD0; + *AT91C_PMC_PCER |= 1 << AT91C_ID_US0; /* enable clock */ +#endif + +#ifdef CONFIG_USART1 + *AT91C_PIOD_PDR = AT91C_PD0_TXD1 | AT91C_PD1_RXD1; + *AT91C_PMC_PCER |= 1 << AT91C_ID_US1; /* enable clock */ +#endif + +#ifdef CONFIG_USART2 + *AT91C_PIOD_PDR = AT91C_PD2_TXD2 | AT91C_PD3_RXD2; + *AT91C_PMC_PCER |= 1 << AT91C_ID_US2; /* enable clock */ +#endif + +} + + +#ifdef CONFIG_DRIVER_ETHER +#if (CONFIG_COMMANDS & CFG_CMD_NET) + +extern AT91PS_EMAC p_mac; + +void AT91F_EMAC_Hardware_Init(void) +{ + unsigned int periphAEnable, periphBEnable; + + p_mac = AT91C_BASE_EMAC; + + /* Disable pull-up on: + RXDV (PA17) => PHY normal mode (not Test mode) + + ERX0 (PE25) => PHY ADDR0 + ERX1 (PE26) => PHY ADDR1 + ERX2 (PA25) => PHY ADDR2 + ERX3 (PA26) => PHY ADDR3 + ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 + + PHY has internal pull-down + */ + AT91C_BASE_PIOC->PIO_PPUDR = AT91C_PC25_E_RXDV; + AT91C_BASE_PIOE->PIO_PPUDR = AT91C_PE25_E_RX0 | AT91C_PE26_E_RX1; + + /* Need to reset PHY -> 500ms reset */ + AT91C_BASE_RSTC->RSTC_RMR = (AT91C_RSTC_KEY & ((unsigned int)0xA5<<24)) | + (AT91C_RSTC_ERSTL & (0x0D << 8)) | AT91C_RSTC_URSTEN; + AT91C_BASE_RSTC->RSTC_RCR = (AT91C_RSTC_KEY & ((unsigned int)0xA5<<24)) | + AT91C_RSTC_EXTRST; + + /* Wait for end hardware reset */ + while (!(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL)); + + /* Re-enable pull-up */ + AT91C_BASE_PIOC->PIO_PPUER = AT91C_PC25_E_RXDV; + AT91C_BASE_PIOE->PIO_PPUER = AT91C_PE25_E_RX0 | AT91C_PE26_E_RX1; + +#ifdef CONFIG_AT91C_USE_RMII + + periphAEnable = 0; + periphBEnable = ((unsigned int) AT91C_PC25_E_RXDV); + + AT91C_BASE_PIOC->PIO_ASR = periphAEnable; + AT91C_BASE_PIOC->PIO_BSR = periphBEnable; + AT91C_BASE_PIOC->PIO_PDR = (periphAEnable | periphBEnable); + + periphAEnable = ((unsigned int) AT91C_PE28_E_TXEN ) | + ((unsigned int) AT91C_PE26_E_RX1 ) | + ((unsigned int) AT91C_PE24_E_TX1 ) | + ((unsigned int) AT91C_PE29_E_MDC ) | + ((unsigned int) AT91C_PE27_E_RXER ) | + ((unsigned int) AT91C_PE23_E_TX0 ) | + ((unsigned int) AT91C_PE25_E_RX0 ) | + ((unsigned int) AT91C_PE21_E_TXCK ) | + ((unsigned int) AT91C_PE30_E_MDIO ); + periphBEnable = 0; + AT91C_BASE_PIOE->PIO_ASR = periphAEnable; + AT91C_BASE_PIOE->PIO_BSR = periphBEnable; + AT91C_BASE_PIOE->PIO_PDR = (periphAEnable | periphBEnable); + +#else + periphAEnable = 0; + periphBEnable = ((unsigned int) AT91C_PC25_E_RXDV) | + ((unsigned int) AT91C_PC20_E_TX2 ) | + ((unsigned int) AT91C_PC24_E_TXER ) | + ((unsigned int) AT91C_PC27_E_RXCK ) | + ((unsigned int) AT91C_PC26_E_COL ) | + ((unsigned int) AT91C_PC21_E_TX3 ) | + ((unsigned int) AT91C_PC22_E_RX2 ) | + ((unsigned int) AT91C_PC23_E_RX3 ); + + AT91C_BASE_PIOC->PIO_ASR = periphAEnable; + AT91C_BASE_PIOC->PIO_BSR = periphBEnable; + AT91C_BASE_PIOC->PIO_PDR = (periphAEnable | periphBEnable); + + periphAEnable = ((unsigned int) AT91C_PE28_E_TXEN ) | + ((unsigned int) AT91C_PE26_E_RX1 ) | + ((unsigned int) AT91C_PE24_E_TX1 ) | + ((unsigned int) AT91C_PE29_E_MDC ) | + ((unsigned int) AT91C_PE27_E_RXER ) | + ((unsigned int) AT91C_PE23_E_TX0 ) | + ((unsigned int) AT91C_PE25_E_RX0 ) | + ((unsigned int) AT91C_PE22_E_CRS ) | + ((unsigned int) AT91C_PE21_E_TXCK ) | + ((unsigned int) AT91C_PE30_E_MDIO ); + periphBEnable = 0; + AT91C_BASE_PIOE->PIO_ASR = periphAEnable; + AT91C_BASE_PIOE->PIO_BSR = periphBEnable; + AT91C_BASE_PIOE->PIO_PDR = (periphAEnable | periphBEnable); +#endif +} + +#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ +#endif /* CONFIG_DRIVER_ETHER */ diff --git a/board/at91sam9263ek/config.mk b/board/at91sam9263ek/config.mk new file mode 100644 index 0000000000..ff2cfd170b --- /dev/null +++ b/board/at91sam9263ek/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/at91sam9263ek/dm9161a.c b/board/at91sam9263ek/dm9161a.c new file mode 100644 index 0000000000..63177d29fc --- /dev/null +++ b/board/at91sam9263ek/dm9161a.c @@ -0,0 +1,300 @@ +/* + * (C) Copyright 2003 + * Author : Hamid Ikdoumi (Atmel) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <at91_net.h> +#include <net.h> +#include <dm9161.h> + +#ifdef CONFIG_DRIVER_ETHER + +#if (CONFIG_COMMANDS & CFG_CMD_NET) + +/* + * Name: + * dm9161a_IsPhyConnected + * Description: + * Reads the 2 PHY ID registers + * Arguments: + * p_mac - pointer to AT91S_EMAC struct + * Return value: + * TRUE - if id read successfully + * FALSE- if error + */ +static unsigned int dm9161a_IsPhyConnected (AT91PS_EMAC p_mac) +{ + unsigned short Id1, Id2; + + at91_EmacEnableMDIO (p_mac); + at91_EmacReadPhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_PHYID1, &Id1); + at91_EmacReadPhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_PHYID2, &Id2); + at91_EmacDisableMDIO (p_mac); + + if ((Id1 == (DM9161_PHYID1_OUI >> 6)) && + ((Id2 >> 10) == (DM9161_PHYID1_OUI & DM9161_LSB_MASK))) { + printf("DM9161A PHY Detected\n\r"); + return TRUE; + } + + return FALSE; +} + +/* + * Name: + * dm9161a_GetLinkSpeed + * Description: + * Link parallel detection status of MAC is checked and set in the + * MAC configuration registers + * Arguments: + * p_mac - pointer to MAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +static uchar dm9161a_GetLinkSpeed (AT91PS_EMAC p_mac) +{ + unsigned short stat1, stat2; + + if (!at91_EmacReadPhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_BMSR, &stat1)) + return FALSE; + + if (!(stat1 & DM9161_LINK_STATUS)) /* link status up? */ + return FALSE; + + if (!at91_EmacReadPhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_DSCSR, &stat2)) + return FALSE; + + if ((stat1 & DM9161_100BASE_TX_FD) && (stat2 & DM9161_100FDX)) { + /*set Emac for 100BaseTX and Full Duplex */ + p_mac->EMAC_NCFGR |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return TRUE; + } + + if ((stat1 & DM9161_10BASE_T_FD) && (stat2 & DM9161_10FDX)) { + /*set MII for 10BaseT and Full Duplex */ + p_mac->EMAC_NCFGR = (p_mac->EMAC_NCFGR & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_FD; + return TRUE; + } + + if ((stat1 & DM9161_100BASE_T4_HD) && (stat2 & DM9161_100HDX)) { + /*set MII for 100BaseTX and Half Duplex */ + p_mac->EMAC_NCFGR = (p_mac->EMAC_NCFGR & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_SPD; + return TRUE; + } + + if ((stat1 & DM9161_10BASE_T_HD) && (stat2 & DM9161_10HDX)) { + /*set MII for 10BaseT and Half Duplex */ + p_mac->EMAC_NCFGR &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); + return TRUE; + } + + return FALSE; +} + + +/* + * Name: + * dm9161a_ResetPhy + * Description: + * Resets PHY + * Arguments: + * p_mac - pointer to struct AT91S_EMAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +static uchar dm9161a_ResetPhy(AT91PS_EMAC p_mac) +{ + unsigned short bmcr; + int timeout = 10; + uchar ret = TRUE; + + + bmcr = DM9161_RESET; + at91_EmacEnableMDIO (p_mac); + at91_EmacWritePhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_BMCR, &bmcr); + + do { + at91_EmacReadPhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_BMCR, &bmcr); + timeout--; + } while ((bmcr & DM9161_RESET) && timeout); + + at91_EmacDisableMDIO (p_mac); + + if (!timeout) + ret = FALSE; + + return ret; +} + + +/* + * Name: + * dm9161a_InitPhy + * Description: + * MAC starts checking its link by using parallel detection and + * Autonegotiation and the same is set in the MAC configuration registers + * Arguments: + * p_mac - pointer to struct AT91S_EMAC + * Return value: + * TRUE - if link status set succesfully + * FALSE - if link status not set + */ +static uchar dm9161a_InitPhy (AT91PS_EMAC p_mac) +{ + unsigned int tick = 0; + unsigned short IntValue; + uchar ret = TRUE; + + at91_EmacEnableMDIO (p_mac); + + do { + /* Link status is latched, so read twice to get current value */ + at91_EmacReadPhy(p_mac, AT91C_PHY_ADDR, DM9161_BMSR, &IntValue); + at91_EmacReadPhy(p_mac, AT91C_PHY_ADDR, DM9161_BMSR, &IntValue); + + tick++; + } while (!(IntValue & DM9161_LINK_STATUS) && (tick < AT91C_ETH_TIMEOUT)); + + if (!(IntValue & DM9161_LINK_STATUS)){ + at91_EmacDisableMDIO (p_mac); + printf ("No link\n\r"); + ret = FALSE; + return ret; + } + + if (!dm9161a_GetLinkSpeed (p_mac)) { + /* Try another time */ + ret = dm9161a_GetLinkSpeed (p_mac); + } + + /* Disable PHY Interrupts */ + at91_EmacReadPhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_MDINTR, &IntValue); + /* clear FDX, SPD, Link, INTR masks */ + IntValue &= ~(DM9161_FDX_MASK | DM9161_SPD_MASK | + DM9161_LINK_MASK | DM9161_INTR_MASK); + at91_EmacWritePhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_MDINTR, &IntValue); + at91_EmacDisableMDIO (p_mac); + + return (ret); +} + + +/* + * Name: + * dm9161a_AutoNegotiate + * Description: + * MAC Autonegotiates with the partner status of same is set in the + * MAC configuration registers + * Arguments: + * dev - pointer to struct net_device + * Return value: + * TRUE - if link status set successfully + * FALSE - if link status not set + */ +static uchar dm9161a_AutoNegotiate (AT91PS_EMAC p_mac, int *status) +{ + unsigned short value; + unsigned short PhyAnar; + unsigned short PhyAnalpar; + + /* Set dm9161 control register */ + if (!at91_EmacReadPhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_BMCR, &value)) + return FALSE; + value &= ~DM9161_AUTONEG; /* remove autonegotiation enable */ + value |= DM9161_ISOLATE; /* Electrically isolate PHY */ + if (!at91_EmacWritePhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_BMCR, &value)) + return FALSE; + + /* Set the Auto_negotiation Advertisement Register */ + /* MII advertising for Next page, 100BaseTxFD and HD, 10BaseTFD and HD, IEEE 802.3 */ + PhyAnar = DM9161_NP | DM9161_TX_FDX | DM9161_TX_HDX | + DM9161_10_FDX | DM9161_10_HDX | DM9161_AN_IEEE_802_3; + if (!at91_EmacWritePhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_ANAR, &PhyAnar)) + return FALSE; + + /* Read the Control Register */ + if (!at91_EmacReadPhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_BMCR, &value)) + return FALSE; + + value |= DM9161_SPEED_SELECT | DM9161_AUTONEG | DM9161_DUPLEX_MODE; + if (!at91_EmacWritePhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_BMCR, &value)) + return FALSE; + /* Restart Auto_negotiation */ + value |= DM9161_RESTART_AUTONEG; + if (!at91_EmacWritePhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_BMCR, &value)) + return FALSE; + + /*check AutoNegotiate complete */ + udelay (10000); + at91_EmacReadPhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_BMSR, &value); + if (!(value & DM9161_AUTONEG_COMP)) + return FALSE; + + /* Get the AutoNeg Link partner base page */ + if (!at91_EmacReadPhy (p_mac, SAM9263EK_PHY_ADDRESS, DM9161_ANLPAR, &PhyAnalpar)) + return FALSE; + + if ((PhyAnar & DM9161_TX_FDX) && (PhyAnalpar & DM9161_TX_FDX)) { + /*set MII for 100BaseTX and Full Duplex */ + p_mac->EMAC_NCFGR |= AT91C_EMAC_SPD | AT91C_EMAC_FD; + return TRUE; + } + + if ((PhyAnar & DM9161_10_FDX) && (PhyAnalpar & DM9161_10_FDX)) { + /*set MII for 10BaseT and Full Duplex */ + p_mac->EMAC_NCFGR = (p_mac->EMAC_NCFGR & + ~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) + | AT91C_EMAC_FD; + return TRUE; + } + return FALSE; +} + + +/* + * Name: + * at91_GetPhyInterface + * Description: + * Initialise the interface functions to the PHY + * Arguments: + * None + * Return value: + * None + */ +void at91_GetPhyInterface(AT91PS_PhyOps p_phyops) +{ + p_phyops->Init = dm9161a_InitPhy; + p_phyops->IsPhyConnected = dm9161a_IsPhyConnected; + p_phyops->GetLinkSpeed = dm9161a_GetLinkSpeed; + p_phyops->AutoNegotiate = dm9161a_AutoNegotiate; + p_phyops->Reset = dm9161a_ResetPhy; +} + +#endif /* CONFIG_COMMANDS & CFG_CMD_NET */ + +#endif /* CONFIG_DRIVER_ETHER */ + diff --git a/board/at91sam9263ek/flash.c b/board/at91sam9263ek/flash.c new file mode 100644 index 0000000000..9e05b47d8e --- /dev/null +++ b/board/at91sam9263ek/flash.c @@ -0,0 +1,567 @@ +/* + * (C) Copyright 2002 + * Lineo, Inc. <www.lineo.com> + * Bernhard Kuhn <bkuhn@lineo.com> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Alex Zuepke <azu@sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#ifndef CFG_NO_FLASH +ulong myflush(void); + + +/* Flash Organization Structure */ +typedef struct OrgDef +{ + unsigned int sector_number; + unsigned int sector_size; +} OrgDef; + + +/* Flash Organizations */ +OrgDef OrgAT49BV16x4[] = +{ + { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ + { 2, 32*1024 }, /* 2 * 32 kBytes sectors */ + { 30, 64*1024 }, /* 30 * 64 kBytes sectors */ +}; + +OrgDef OrgAT49BV16x4A[] = +{ + { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ + { 31, 64*1024 }, /* 31 * 64 kBytes sectors */ +}; + +OrgDef OrgAT49BV6416[] = +{ + { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ + { 127, 64*1024 }, /* 127 * 64 kBytes sectors */ +}; + +OrgDef OrgAT49BV322A[] = +{ + { 8, 8*1024 }, /* 8 * 8 kBytes sectors */ + { 63, 64*1024 }, /* 63 * 64 kBytes sectors */ +}; + +/* AMD/Spansion S29JL032H is the same as AM29DL323GB */ +OrgDef OrgS29JL032H[] = +{ + { 8, 8*1024 }, + { 63, 64*1024 }, +}; + + +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; + +/* AT49BV1614A Codes */ +#define FLASH_CODE1 0xAA +#define FLASH_CODE2 0x55 +#define ID_IN_CODE 0x90 +#define ID_OUT_CODE 0xF0 + + +#define CMD_READ_ARRAY 0x00F0 +#define CMD_UNLOCK1 0x00AA +#define CMD_UNLOCK2 0x0055 +#define CMD_ERASE_SETUP 0x0080 +#define CMD_ERASE_CONFIRM 0x0030 +#define CMD_PROGRAM 0x00A0 +#define CMD_UNLOCK_BYPASS 0x0020 +#define CMD_SECTOR_UNLOCK 0x0070 + +#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00005555<<1))) +#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00002AAA<<1))) + +#define BIT_ERASE_DONE 0x0080 +#define BIT_RDY_MASK 0x0080 +#define BIT_PROGRAM_ERROR 0x0020 +#define BIT_TIMEOUT 0x80000000 /* our flag */ + +#define READY 1 +#define ERR 2 +#define TMO 4 + +/*----------------------------------------------------------------------- + */ +void flash_identification (flash_info_t * info) +{ + volatile u16 manuf_code, device_code, add_device_code; + char *manuf_name, *device_name; + + MEM_FLASH_ADDR1 = FLASH_CODE1; + MEM_FLASH_ADDR2 = FLASH_CODE2; + MEM_FLASH_ADDR1 = ID_IN_CODE; + + manuf_code = *(volatile u16 *) CFG_FLASH_BASE; + device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2); + add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1)); + + MEM_FLASH_ADDR1 = FLASH_CODE1; + MEM_FLASH_ADDR2 = FLASH_CODE2; + MEM_FLASH_ADDR1 = ID_OUT_CODE; + + /* Get the manufacturer code (Is is in 32 bits but mirrored. Only 16 bits, MSB or LSB, count) + info->flash_id contains manuf_code in 16 MSB bits and device_code in 16 LSB bits. */ + info->flash_id = (manuf_code << 16) | manuf_code; + + switch(info->flash_id) { + case ATM_MANUFACT : + manuf_name = "ATMEL"; + + /* Reset 16 LSB bits to store device_code. */ + info->flash_id &= ~FLASH_TYPEMASK; + + if (device_code == (ATM_ID_BV1614 & FLASH_TYPEMASK)) { + + if (add_device_code == (ATM_ID_BV1614A & FLASH_TYPEMASK)) { + info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK; + device_name = "AT49BV1614A (16Mbit)"; + } else { /* AT49BV1614 Flash */ + info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK; + device_name = "AT49BV1614 (16Mbit)"; + } + + } else if (device_code == (ATM_ID_BV6416 & FLASH_TYPEMASK)) { + info->flash_id |= ATM_ID_BV6416 & FLASH_TYPEMASK; + device_name = "AT49BV6416 (64Mbit)"; + } else if (device_code == (ATM_ID_BV322A & FLASH_TYPEMASK)) { + info->flash_id |= ATM_ID_BV322A & FLASH_TYPEMASK; + device_name = "AT49BV322A (32Mbit)"; + } + + break; + + case AMD_MANUFACT : + manuf_name = "AMD"; + + /* Reset 16 LSB bits to store device_code. */ + info->flash_id &= ~FLASH_TYPEMASK; + + if (device_code == (AMD_ID_DL323B & FLASH_TYPEMASK)) { + info->flash_id |= AMD_ID_DL323B & FLASH_TYPEMASK; + device_name = "AM29DL323B (S29JL032H)"; + } + + break; + + default: + manuf_name = "No Manufacturer detected"; + device_name = "No Flash chip detected"; + + break; + } + + printf ("%s : %s\n", manuf_name, device_name); +} + +ushort flash_number_sector(OrgDef *pOrgDef, unsigned int nb_blocks) +{ + int i, nb_sectors = 0; + + for (i=0; i<nb_blocks; i++){ + nb_sectors += pOrgDef[i].sector_number; + } + + return nb_sectors; +} + +void flash_unlock_sector(flash_info_t * info, unsigned int sector) +{ + volatile u16 *addr = (volatile u16 *) (info->start[sector]); + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + *addr = CMD_SECTOR_UNLOCK; +} + + +ulong flash_init (void) +{ + int i, j, k; + unsigned int flash_nb_blocks, sector; + unsigned int start_address; + OrgDef *pOrgDef; + + ulong size = 0; + + /* Perform hardware init for flash (SMC CS0 init) + This function is declared in board dependent files */ + hw_flash_init(); + + for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { + ulong flashbase = 0; + + flash_identification (&flash_info[i]); + + if ((flash_info[i].flash_id & FLASH_TYPEMASK) == + (ATM_ID_BV1614 & FLASH_TYPEMASK)) { + + pOrgDef = OrgAT49BV16x4; + flash_nb_blocks = sizeof (OrgAT49BV16x4) / sizeof (OrgDef); + } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) == + (ATM_ID_BV322A & FLASH_TYPEMASK)){ /* AT49BV322A Flash */ + + pOrgDef = OrgAT49BV322A; + flash_nb_blocks = sizeof (OrgAT49BV322A) / sizeof (OrgDef); + } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) == + (ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */ + + pOrgDef = OrgAT49BV6416; + flash_nb_blocks = sizeof (OrgAT49BV6416) / sizeof (OrgDef); + } else if ((flash_info[i].flash_id & FLASH_TYPEMASK) == + (AMD_ID_DL323B & FLASH_TYPEMASK)){ /* S29JL032H (ex AM29DL323GB) Flash */ + + pOrgDef = OrgS29JL032H; + flash_nb_blocks = sizeof (OrgS29JL032H) / sizeof (OrgDef); + } else { + flash_nb_blocks = 0; + pOrgDef = OrgAT49BV16x4; + } + + flash_info[i].sector_count = flash_number_sector(pOrgDef, flash_nb_blocks); + memset (flash_info[i].protect, 0, flash_info[i].sector_count); + + if (i == 0) + flashbase = PHYS_FLASH_1; + else + panic ("configured too many flash banks!\n"); + + sector = 0; + start_address = flashbase; + flash_info[i].size = 0; + + for (j = 0; j < flash_nb_blocks; j++) { + for (k = 0; k < pOrgDef[j].sector_number; k++) { + flash_info[i].start[sector++] = start_address; + start_address += pOrgDef[j].sector_size; + flash_info[i].size += pOrgDef[j].sector_size; + } + } + + size += flash_info[i].size; + + if (((flash_info[i].flash_id & FLASH_TYPEMASK) == (ATM_ID_BV6416 & FLASH_TYPEMASK))) + { /* AT49BV6416 Flash */ + + /* Unlock all sectors at reset */ + for (j = 0; j < flash_info[i].sector_count; j++){ + flash_unlock_sector(&flash_info[i], j); + } + } + } + + /* Protect binary boot image */ + flash_protect (FLAG_PROTECT_SET, + CFG_FLASH_BASE, + CFG_FLASH_BASE + CFG_BOOT_SIZE - 1, &flash_info[0]); + + /* Protect environment variables */ + flash_protect (FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]); + + /* Protect U-Boot gzipped image */ + flash_protect (FLAG_PROTECT_SET, + CFG_U_BOOT_BASE, + CFG_U_BOOT_BASE + CFG_U_BOOT_SIZE - 1, &flash_info[0]); + + return size; +} + +/*----------------------------------------------------------------------- + */ +void flash_print_info (flash_info_t * info) +{ + int i; + + switch (info->flash_id & FLASH_VENDMASK) { + case (ATM_MANUFACT & FLASH_VENDMASK): + printf ("Atmel: "); + break; + default: + printf ("Unknown Vendor "); + break; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case (ATM_ID_BV1614 & FLASH_TYPEMASK): + printf ("AT49BV1614 (16Mbit)\n"); + break; + case (ATM_ID_BV322A & FLASH_TYPEMASK): + printf ("AT49BV322A (32Mbit)\n"); + break; + case (ATM_ID_BV6416 & FLASH_TYPEMASK): + printf ("AT49BV6416 (64Mbit)\n"); + break; + default: + printf ("Unknown Chip Type\n"); + goto Done; + break; + } + + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; i++) { + if ((i % 5) == 0) { + printf ("\n "); + } + printf (" %08lX%s", info->start[i], + info->protect[i] ? " (RO)" : " "); + } + printf ("\n"); + +Done: ; +} + +/*----------------------------------------------------------------------- + */ + +int flash_erase (flash_info_t * info, int s_first, int s_last) +{ + ulong result; + int iflag, cflag, prot, sect; + int rc = ERR_OK; + int chip1; + + /* first look for protection bits */ + + if (info->flash_id == FLASH_UNKNOWN) + return ERR_UNKNOWN_FLASH_TYPE; + + if ((s_first < 0) || (s_first > s_last)) { + return ERR_INVAL; + } + + if ((info->flash_id & FLASH_VENDMASK) != + (ATM_MANUFACT & FLASH_VENDMASK)) { + return ERR_UNKNOWN_FLASH_VENDOR; + } + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + if (prot) + return ERR_PROTECTED; + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + cflag = icache_status (); + icache_disable (); + iflag = disable_interrupts (); + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { + printf ("Erasing sector %2d ... ", sect); + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + if (info->protect[sect] == 0) { /* not protected */ + volatile u16 *addr = (volatile u16 *) (info->start[sect]); + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + MEM_FLASH_ADDR1 = CMD_ERASE_SETUP; + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + *addr = CMD_ERASE_CONFIRM; + + /* wait until flash is ready */ + chip1 = 0; + + do { + result = *addr; + + /* check timeout */ + if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) { + MEM_FLASH_ADDR1 = CMD_READ_ARRAY; + chip1 = TMO; + break; + } + + /* printf("flash_erase : TIMEOUT = %d\n\r", get_timer_masked() / CFG_HZ); */ + if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE) + chip1 = READY; + + } while (!chip1); + + MEM_FLASH_ADDR1 = CMD_READ_ARRAY; + + if (chip1 == ERR) { + rc = ERR_PROG_ERROR; + goto outahere; + } + if (chip1 == TMO) { + rc = ERR_TIMOUT; + goto outahere; + } + + printf ("ok.\n"); + } else { /* it was protected */ + printf ("protected!\n"); + } + } + + if (ctrlc ()) + printf ("User Interrupt!\n"); + +outahere: + /* allow flash to settle - wait 10 ms */ + udelay_masked (10000); + + if (iflag) + enable_interrupts (); + + if (cflag) + icache_enable (); + + return rc; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash + */ + +volatile static int write_word (flash_info_t * info, ulong dest, + ulong data) +{ + volatile u16 *addr = (volatile u16 *) dest; + ulong result; + int rc = ERR_OK; + int cflag, iflag; + int chip1; + + /* + * Check if Flash is (sufficiently) erased + */ + result = *addr; + if ((result & data) != data) + return ERR_NOT_ERASED; + + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + cflag = icache_status (); + icache_disable (); + iflag = disable_interrupts (); + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + MEM_FLASH_ADDR1 = CMD_PROGRAM; + *addr = data; + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked (); + + /* wait until flash is ready */ + chip1 = 0; + do { + result = *addr; + + /* check timeout */ + if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) { + chip1 = ERR | TMO; + break; + } + if (!chip1 && ((result & 0x80) == (data & 0x80))) + chip1 = READY; + + } while (!chip1); + + *addr = CMD_READ_ARRAY; + + if (chip1 == ERR || *addr != data) + rc = ERR_PROG_ERROR; + + if (iflag) + enable_interrupts (); + + if (cflag) + icache_enable (); + + return rc; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash. + */ + +int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) +{ + ulong wp, data; + int rc; + + if (addr & 1) { + printf ("unaligned destination not supported\n"); + return ERR_ALIGN; + }; + + if ((int) src & 1) { + printf ("unaligned source not supported\n"); + return ERR_ALIGN; + }; + + wp = addr; + + while (cnt >= 2) { + data = *((volatile u16 *) src); + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + src += 2; + wp += 2; + cnt -= 2; + } + + if (cnt == 1) { + data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) << + 8); + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + src += 1; + wp += 1; + cnt -= 1; + }; + + return ERR_OK; +} +#endif diff --git a/board/at91sam9263ek/nand.c b/board/at91sam9263ek/nand.c new file mode 100644 index 0000000000..96c15058c1 --- /dev/null +++ b/board/at91sam9263ek/nand.c @@ -0,0 +1,107 @@ +/* + * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/hardware.h> + +#if (CONFIG_COMMANDS & CFG_CMD_NAND) + +#include <nand.h> + +/* + * hardware specific access to control-lines + */ +#define MASK_ALE (1 << 21) /* our ALE is AD21 */ +#define MASK_CLE (1 << 22) /* our CLE is AD22 */ + +/* + * Disk On Chip (NAND) Millenium initialization. + * The NAND lives in the CS3 space + */ +void at91sam9263ek_nand_init (struct nand_chip *nand) +{ + /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */ + AT91C_BASE_MATRIX->MATRIX_EBI0 |= AT91C_MATRIX_CS3A_SM; + + /* Configure SMC CS3 */ + AT91C_BASE_SMC0->SMC_SETUP3 = (AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | + AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP); + + AT91C_BASE_SMC0->SMC_PULSE3 = (AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE); + + AT91C_BASE_SMC0->SMC_CYCLE3 = (AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE); + + if ((nand->options & NAND_BUSWIDTH_16) == NAND_BUSWIDTH_16) + { + AT91C_BASE_SMC0->SMC_CTRL3 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | + AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF); + } else { + AT91C_BASE_SMC0->SMC_CTRL3 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | + AT91C_SMC_DBW_WIDTH_EIGTH_BITS | AT91C_SM_TDF); + } + + /* Configure RDY/BSY input signal */ + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOA; + + AT91C_BASE_PIOA->PIO_ODR = AT91C_PIO_PA22; + AT91C_BASE_PIOA->PIO_PER = AT91C_PIO_PA22; + + AT91C_BASE_PIOA->PIO_PPUER = AT91C_PIO_PA22; /* Enable pull-up */ + + /* Enable NandFlash */ + AT91C_BASE_PIOD->PIO_PER = AT91C_PIO_PD15; + AT91C_BASE_PIOD->PIO_OER = AT91C_PIO_PD15; +} + +static void at91sam9263ek_nand_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + + IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); + switch (cmd) { + case NAND_CTL_SETCLE: IO_ADDR_W |= MASK_CLE; break; + case NAND_CTL_SETALE: IO_ADDR_W |= MASK_ALE; break; + case NAND_CTL_CLRNCE: *AT91C_PIOD_SODR = AT91C_PIO_PD15; break; + case NAND_CTL_SETNCE: *AT91C_PIOD_CODR = AT91C_PIO_PD15; break; + } + this->IO_ADDR_W = (void *) IO_ADDR_W; +} + +/* + * chip R/B detection + */ +static int at91sam9263ek_nand_ready(struct mtd_info *mtd) +{ + return (*AT91C_PIOA_PDSR & AT91C_PIO_PA22); +} + +void board_nand_init(struct nand_chip *nand) +{ + nand->eccmode = NAND_ECC_SOFT; + nand->hwcontrol = at91sam9263ek_nand_hwcontrol; + nand->dev_ready = at91sam9263ek_nand_ready; + nand->chip_delay = 18; + + at91sam9263ek_nand_init(nand); +} +#endif diff --git a/board/at91sam9263ek/u-boot.lds b/board/at91sam9263ek/u-boot.lds new file mode 100644 index 0000000000..d965a03813 --- /dev/null +++ b/board/at91sam9263ek/u-boot.lds @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm926ejs/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/board/at91sam9rlek/Makefile b/board/at91sam9rlek/Makefile new file mode 100644 index 0000000000..b1ee5a07f3 --- /dev/null +++ b/board/at91sam9rlek/Makefile @@ -0,0 +1,46 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := at91sam9rlek.o nand.o + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff --git a/board/at91sam9rlek/at91sam9rlek.c b/board/at91sam9rlek/at91sam9rlek.c new file mode 100644 index 0000000000..89020deafd --- /dev/null +++ b/board/at91sam9rlek/at91sam9rlek.c @@ -0,0 +1,89 @@ +/* + * (C) Copyright 2007 + * ATMEL Rousset, France. + * Added AT91SAM9RLEK support. + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/hardware.h> + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +int board_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* Enable Ctrlc */ + console_init_f (); + + /* Enable clocks for SMC and PIOC */ + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS; + + /* memory and cpu-speed are setup before relocation */ + /* so we do _nothing_ here */ + +#ifdef CONFIG_LCD +// gd->fb_base = (unsigned long) AT91C_IRAM; + gd->fb_base = (unsigned long) 0x23000000; +#endif + + /* arch number of AT91SAM9RLEK-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9RLEK; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int AT91F_Serial_Hardware_Init(void) +{ +#ifdef CONFIG_DBGU + *AT91C_PIOA_PDR = AT91C_PA21_DRXD | AT91C_PA22_DTXD; /* PA 21 & 22 */ + *AT91C_PMC_PCER = 1 << AT91C_ID_SYS; /* enable clock */ +#endif + +#ifdef CONFIG_USART0 + *AT91C_PIOA_PDR = AT91C_PA6_TXD0 | AT91C_PA7_RXD0; + *AT91C_PMC_PCER |= 1 << AT91C_ID_US0; /* enable clock */ +#endif +} + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + + +int board_late_init(void) +{ + return 0; +} diff --git a/board/at91sam9rlek/config.mk b/board/at91sam9rlek/config.mk new file mode 100644 index 0000000000..ff2cfd170b --- /dev/null +++ b/board/at91sam9rlek/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/at91sam9rlek/nand.c b/board/at91sam9rlek/nand.c new file mode 100644 index 0000000000..62623f5fbe --- /dev/null +++ b/board/at91sam9rlek/nand.c @@ -0,0 +1,118 @@ +/* + * (C) Copyright 2007 ATMEL Rousset, Nicolas Ferre + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/hardware.h> + +#if (CONFIG_COMMANDS & CFG_CMD_NAND) + +#include <nand.h> + +/* + * hardware specific access to control-lines + */ +#define MASK_ALE (1 << 21) /* our ALE is AD21 */ +#define MASK_CLE (1 << 22) /* our CLE is AD22 */ + +/* + * Disk On Chip (NAND) Millenium initialization. + * The NAND lives in the CS3 space + */ +void at91sam9RLek_nand_init (struct nand_chip *nand) +{ + /* Setup nand flash, first enable the address range of CS3 in user interface */ + AT91C_BASE_CCFG->CCFG_EBICSA |= AT91C_EBI_CS3A_SM; + + /* Configure SMC CS3 */ + AT91C_BASE_SMC->SMC_SETUP3 = (AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | + AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP); + + AT91C_BASE_SMC->SMC_PULSE3 = (AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE); + + AT91C_BASE_SMC->SMC_CYCLE3 = (AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE); + + AT91C_BASE_SMC->SMC_CTRL3 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | + AT91C_SMC_DBW_WIDTH_EIGTH_BITS | AT91C_SM_TDF); + + /* Clock PIOD */ + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOD; + + /* Configure Ready/Busy signal */ + AT91C_BASE_PIOD->PIO_ODR = AT91C_PIO_PD17; + AT91C_BASE_PIOD->PIO_PER = AT91C_PIO_PD17; + /* Configure pull-up */ + AT91C_BASE_PIOD->PIO_PPUER = AT91C_PIO_PD17; + + /* Enable PB4=SMOE line PB5=SMWE, A22=CLE, A21=ALE */ + AT91C_BASE_PIOB->PIO_ASR = (AT91C_PB4_NANDOE | AT91C_PB5_NANDWE); + AT91C_BASE_PIOB->PIO_PDR = (AT91C_PB4_NANDOE | AT91C_PB5_NANDWE); /* Set in Periph mode */ + + /* Enable NandFlash */ + AT91C_BASE_PIOB->PIO_PER = AT91C_PIO_PB6; + AT91C_BASE_PIOB->PIO_OER = AT91C_PIO_PB6; +} + +static void at91sam9RLek_nand_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + + IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); + switch (cmd) { + case NAND_CTL_SETCLE: IO_ADDR_W |= MASK_CLE; break; + case NAND_CTL_SETALE: IO_ADDR_W |= MASK_ALE; break; + case NAND_CTL_CLRNCE: *AT91C_PIOC_SODR = AT91C_PIO_PC14; break; + case NAND_CTL_SETNCE: *AT91C_PIOC_CODR = AT91C_PIO_PC14; break; + } + this->IO_ADDR_W = (void *) IO_ADDR_W; +} + +/* + * chip R/B detection + */ +static int at91sam9RLek_nand_ready(struct mtd_info *mtd) +{ + return (*AT91C_PIOD_PDSR & AT91C_PIO_PD17); +} + +void board_nand_init(struct nand_chip *nand) +{ + /* Init due to switch 8/16 bits mode */ + if (nand->write_byte) + nand->write_byte = NULL; + if (nand->read_byte) + nand->read_byte = NULL; + if (nand->write_buf) + nand->write_buf = NULL; + if (nand->read_buf) + nand->read_buf = NULL; + if (nand->verify_buf) + nand->verify_buf = NULL; + + nand->eccmode = NAND_ECC_SOFT; + nand->hwcontrol = at91sam9RLek_nand_hwcontrol; + nand->dev_ready = at91sam9RLek_nand_ready; + nand->chip_delay = 18; + + at91sam9RLek_nand_init(nand); +} +#endif diff --git a/board/at91sam9rlek/u-boot.lds b/board/at91sam9rlek/u-boot.lds new file mode 100644 index 0000000000..afdc7173c9 --- /dev/null +++ b/board/at91sam9rlek/u-boot.lds @@ -0,0 +1,56 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm926ejs/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} |