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-rw-r--r--board/ti/dra7xx/evm.c31
-rw-r--r--board/ti/dra7xx/mux_data.h1
2 files changed, 32 insertions, 0 deletions
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index ae50d88c579..5592fc5defe 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -13,6 +13,8 @@
#include <common.h>
#include <palmas.h>
#include <sata.h>
+#include <asm/gpio.h>
+#include <asm/arch/gpio.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sata.h>
@@ -26,6 +28,9 @@
DECLARE_GLOBAL_DATA_PTR;
+/* GPIO 7_11 */
+#define GPIO_DDR_VTT_EN 203
+
const struct omap_sysinfo sysinfo = {
"Board: DRA7xx\n"
};
@@ -272,3 +277,29 @@ int board_eth_init(bd_t *bis)
return ret;
}
#endif
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+/* VTT regulator enable */
+static inline void vtt_regulator_enable(void)
+{
+ if (omap_hw_init_context() == OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)
+ return;
+
+ /* Do not enable VTT for DRA722 */
+ if (omap_revision() == DRA722_ES1_0)
+ return;
+
+ /*
+ * EVM Rev G and later use gpio7_11 for DDR3 termination.
+ * This is safe enough to do on older revs.
+ */
+ gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en");
+ gpio_direction_output(GPIO_DDR_VTT_EN, 1);
+}
+
+int board_early_init_f(void)
+{
+ vtt_regulator_enable();
+ return 0;
+}
+#endif
diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h
index 5bc4fc9bf16..7276014f1db 100644
--- a/board/ti/dra7xx/mux_data.h
+++ b/board/ti/dra7xx/mux_data.h
@@ -139,5 +139,6 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
{GPMC_CS3, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS1*/
#endif /* CONFIG_NAND || CONFIG_NOR */
{USB2_DRVVBUS, (M0 | IEN | FSC) },
+ {SPI1_CS1, (PEN | IDIS | M14) },
};
#endif /* _MUX_DATA_DRA7XX_H_ */