diff options
Diffstat (limited to 'board/terasic/sockit/qts/pll_config.h')
| -rw-r--r-- | board/terasic/sockit/qts/pll_config.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/board/terasic/sockit/qts/pll_config.h b/board/terasic/sockit/qts/pll_config.h index 0ecccbf062..820b9fff65 100644 --- a/board/terasic/sockit/qts/pll_config.h +++ b/board/terasic/sockit/qts/pll_config.h @@ -10,13 +10,13 @@ #define CONFIG_HPS_DBCTRL_STAYOSC1 1 #define CONFIG_HPS_MAINPLLGRP_VCO_DENOM 0 -#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER 73 +#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER 63 #define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT 0 #define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT 0 #define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT 0 -#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT 4 +#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT 3 #define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT 511 -#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT 14 +#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT 15 #define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK 1 #define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK 1 #define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK 1 @@ -61,7 +61,7 @@ #define CONFIG_HPS_CLK_OSC2_HZ 25000000 #define CONFIG_HPS_CLK_F2S_SDR_REF_HZ 0 #define CONFIG_HPS_CLK_F2S_PER_REF_HZ 0 -#define CONFIG_HPS_CLK_MAINVCO_HZ 1850000000 +#define CONFIG_HPS_CLK_MAINVCO_HZ 1600000000 #define CONFIG_HPS_CLK_PERVCO_HZ 1000000000 #define CONFIG_HPS_CLK_SDRVCO_HZ 800000000 #define CONFIG_HPS_CLK_EMAC0_HZ 1953125 @@ -69,7 +69,7 @@ #define CONFIG_HPS_CLK_USBCLK_HZ 200000000 #define CONFIG_HPS_CLK_NAND_HZ 50000000 #define CONFIG_HPS_CLK_SDMMC_HZ 200000000 -#define CONFIG_HPS_CLK_QSPI_HZ 370000000 +#define CONFIG_HPS_CLK_QSPI_HZ 400000000 #define CONFIG_HPS_CLK_SPIM_HZ 200000000 #define CONFIG_HPS_CLK_CAN0_HZ 12500000 #define CONFIG_HPS_CLK_CAN1_HZ 12500000 @@ -78,8 +78,8 @@ #define CONFIG_HPS_CLK_L4_SP_HZ 100000000 #define CONFIG_HPS_ALTERAGRP_MPUCLK 1 -#define CONFIG_HPS_ALTERAGRP_MAINCLK 4 -#define CONFIG_HPS_ALTERAGRP_DBGATCLK 4 +#define CONFIG_HPS_ALTERAGRP_MAINCLK 3 +#define CONFIG_HPS_ALTERAGRP_DBGATCLK 3 #endif /* __SOCFPGA_PLL_CONFIG_H__ */ |