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-rw-r--r--board/terasic/de10-nano/Makefile5
-rw-r--r--board/terasic/de10-nano/qts/iocsr_config.h3
-rw-r--r--board/terasic/de10-nano/qts/pinmux_config.h3
-rw-r--r--board/terasic/de10-nano/qts/pll_config.h3
-rw-r--r--board/terasic/de10-nano/qts/sdram_config.h3
-rw-r--r--board/terasic/de10-nano/socfpga.c3
6 files changed, 6 insertions, 14 deletions
diff --git a/board/terasic/de10-nano/Makefile b/board/terasic/de10-nano/Makefile
index ab38f4264f..2cf9240846 100644
--- a/board/terasic/de10-nano/Makefile
+++ b/board/terasic/de10-nano/Makefile
@@ -1,9 +1,6 @@
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
+# SPDX-License-Identifier: GPL-2.0+
# Copyright (C) 2017, Intel Corporation
#
-# SPDX-License-Identifier: GPL-2.0+
#
obj-y := socfpga.o
diff --git a/board/terasic/de10-nano/qts/iocsr_config.h b/board/terasic/de10-nano/qts/iocsr_config.h
index 7e049bf81e..bc5b7a07c7 100644
--- a/board/terasic/de10-nano/qts/iocsr_config.h
+++ b/board/terasic/de10-nano/qts/iocsr_config.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Altera SoCFPGA IOCSR configuration
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SOCFPGA_IOCSR_CONFIG_H__
diff --git a/board/terasic/de10-nano/qts/pinmux_config.h b/board/terasic/de10-nano/qts/pinmux_config.h
index b8f5ea1413..6a9c415029 100644
--- a/board/terasic/de10-nano/qts/pinmux_config.h
+++ b/board/terasic/de10-nano/qts/pinmux_config.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Altera SoCFPGA PinMux configuration
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SOCFPGA_PINMUX_CONFIG_H__
diff --git a/board/terasic/de10-nano/qts/pll_config.h b/board/terasic/de10-nano/qts/pll_config.h
index 3a46047d1c..854936b2a3 100644
--- a/board/terasic/de10-nano/qts/pll_config.h
+++ b/board/terasic/de10-nano/qts/pll_config.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Altera SoCFPGA Clock and PLL configuration
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SOCFPGA_PLL_CONFIG_H__
diff --git a/board/terasic/de10-nano/qts/sdram_config.h b/board/terasic/de10-nano/qts/sdram_config.h
index 34dacc717e..26910ef348 100644
--- a/board/terasic/de10-nano/qts/sdram_config.h
+++ b/board/terasic/de10-nano/qts/sdram_config.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Altera SoCFPGA SDRAM configuration
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SOCFPGA_SDRAM_CONFIG_H__
diff --git a/board/terasic/de10-nano/socfpga.c b/board/terasic/de10-nano/socfpga.c
index c5852e7cb4..f9173f1921 100644
--- a/board/terasic/de10-nano/socfpga.c
+++ b/board/terasic/de10-nano/socfpga.c
@@ -1,6 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017, Intel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>