diff options
Diffstat (limited to 'board/snmc/qs850')
-rw-r--r-- | board/snmc/qs850/Makefile | 40 | ||||
-rw-r--r-- | board/snmc/qs850/config.mk | 29 | ||||
-rw-r--r-- | board/snmc/qs850/flash.c | 617 | ||||
-rw-r--r-- | board/snmc/qs850/qs850.c | 253 | ||||
-rw-r--r-- | board/snmc/qs850/u-boot.lds | 141 |
5 files changed, 1080 insertions, 0 deletions
diff --git a/board/snmc/qs850/Makefile b/board/snmc/qs850/Makefile new file mode 100644 index 00000000000..e5d84463133 --- /dev/null +++ b/board/snmc/qs850/Makefile @@ -0,0 +1,40 @@ +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS = $(BOARD).o flash.o + +$(LIB): .depend $(OBJS) + $(AR) crv $@ $(OBJS) + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +sinclude .depend + +######################################################################### diff --git a/board/snmc/qs850/config.mk b/board/snmc/qs850/config.mk new file mode 100644 index 00000000000..905f6926982 --- /dev/null +++ b/board/snmc/qs850/config.mk @@ -0,0 +1,29 @@ +# +# (C) Copyright 2002-2003 +# Simple Network Magic Corporation, dnevil@snmc.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# QS850 +# Start address of Bootloader in Flash +# + +TEXT_BASE = 0xFFF00000 diff --git a/board/snmc/qs850/flash.c b/board/snmc/qs850/flash.c new file mode 100644 index 00000000000..d4e2cbb2c85 --- /dev/null +++ b/board/snmc/qs850/flash.c @@ -0,0 +1,617 @@ +/* + * (C) Copyright 2003 + * MuLogic B.V. + * + * (C) Copyright 2001 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <ppc4xx.h> +#include <asm/u-boot.h> +#include <asm/processor.h> + +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ + + +#define FLASH_WORD_SIZE unsigned long +#define FLASH_ID_MASK 0xFFFFFFFF + +/*----------------------------------------------------------------------- + * Functions + */ +/* stolen from esteem192e/flash.c */ +ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info); + +static int write_word (flash_info_t *info, ulong dest, ulong data); +static void flash_get_offsets (ulong base, flash_info_t *info); + + +/*----------------------------------------------------------------------- + */ + +unsigned long flash_init (void) +{ + unsigned long size_b0, size_b1; + int i; + uint pbcr; + unsigned long base_b0, base_b1; + volatile FLASH_WORD_SIZE* flash_base; + + /* Init: no FLASHes known */ + for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) { + flash_info[i].flash_id = FLASH_UNKNOWN; + } + + /* Static FLASH Bank configuration here */ + /* Test for 8M Flash first */ + debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_8M_PRELIM); + flash_base = (volatile FLASH_WORD_SIZE*)(FLASH_BASE0_8M_PRELIM); + size_b0 = flash_get_size(flash_base, &flash_info[0]); + + if (flash_info[0].flash_id == FLASH_UNKNOWN) { + printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", + size_b0, size_b0<<20); + return 0; + } + + if (size_b0 < 8*1024*1024) { + /* Not quite 8M, try 4M Flash base address */ + debug ("\n## Get flash bank 1 size @ 0x%08x\n",FLASH_BASE0_4M_PRELIM); + flash_base = (volatile FLASH_WORD_SIZE*)(FLASH_BASE0_4M_PRELIM); + size_b0 = flash_get_size(flash_base, &flash_info[0]); + } + + if (flash_info[0].flash_id == FLASH_UNKNOWN) { + printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", + size_b0, size_b0<<20); + return 0; + } + + /* Only one bank */ + if (CFG_MAX_FLASH_BANKS == 1) { + /* Setup offsets */ + flash_get_offsets ((ulong)flash_base, &flash_info[0]); + + /* Monitor protection ON by default */ + (void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE, + CFG_MONITOR_BASE+CFG_MONITOR_LEN-1, &flash_info[0]); + size_b1 = 0 ; + flash_info[0].size = size_b0; + return(size_b0); + } + + /* We have 2 banks */ + size_b1 = flash_get_size(flash_base, &flash_info[1]); + + /* Re-do sizing to get full correct info */ + if (size_b1) { + mtdcr(ebccfga, pb0cr); + pbcr = mfdcr(ebccfgd); + mtdcr(ebccfga, pb0cr); + base_b1 = -size_b1; + pbcr = (pbcr & 0x0001ffff) | base_b1 | (((size_b1/1024/1024)-1)<<17); + mtdcr(ebccfgd, pbcr); + } + + if (size_b0) { + mtdcr(ebccfga, pb1cr); + pbcr = mfdcr(ebccfgd); + mtdcr(ebccfga, pb1cr); + base_b0 = base_b1 - size_b0; + pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17); + mtdcr(ebccfgd, pbcr); + } + + size_b0 = flash_get_size((volatile FLASH_WORD_SIZE *)base_b0, &flash_info[0]); + flash_get_offsets (base_b0, &flash_info[0]); + + /* monitor protection ON by default */ + (void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE, + CFG_MONITOR_BASE+CFG_MONITOR_LEN-1, &flash_info[0]); + + if (size_b1) { + /* Re-do sizing to get full correct info */ + size_b1 = flash_get_size((volatile FLASH_WORD_SIZE *)base_b1, &flash_info[1]); + flash_get_offsets (base_b1, &flash_info[1]); + + /* monitor protection ON by default */ + (void)flash_protect(FLAG_PROTECT_SET, base_b1+size_b1-CFG_MONITOR_LEN, + base_b1+size_b1-1, &flash_info[1]); + + /* monitor protection OFF by default (one is enough) */ + (void)flash_protect(FLAG_PROTECT_CLEAR, base_b0+size_b0-CFG_MONITOR_LEN, + base_b0+size_b0-1, &flash_info[0]); + } else { + flash_info[1].flash_id = FLASH_UNKNOWN; + flash_info[1].sector_count = -1; + } + + flash_info[0].size = size_b0; + flash_info[1].size = size_b1; + return (size_b0 + size_b1); +} + + + +/*----------------------------------------------------------------------- + This code is specific to the AM29DL163/AM29DL232 for the QS850/QS823. + */ + +static void flash_get_offsets (ulong base, flash_info_t *info) +{ + int i; + long large_sect_size; + long small_sect_size; + + /* set up sector start adress table */ + large_sect_size = info->size / (info->sector_count - 8 + 1); + small_sect_size = large_sect_size / 8; + + if (info->flash_id & FLASH_BTYPE) { + + /* set sector offsets for bottom boot block type */ + for (i = 0; i < 7; i++) { + info->start[i] = base; + base += small_sect_size; + } + + for (; i < info->sector_count; i++) { + info->start[i] = base; + base += large_sect_size; + } + } + else + { + /* set sector offsets for top boot block type */ + for (i = 0; i < (info->sector_count - 8); i++) { + info->start[i] = base; + base += large_sect_size; + } + + for (; i < info->sector_count; i++) { + info->start[i] = base; + base += small_sect_size; + } + } +} + +/*----------------------------------------------------------------------- + */ + +void flash_print_info (flash_info_t *info) +{ + int i; + uchar *boottype; + uchar botboot[]=", bottom boot sect)\n"; + uchar topboot[]=", top boot sector)\n"; + + if (info->flash_id == FLASH_UNKNOWN) { + printf ("missing or unknown FLASH type\n"); + return; + } + + switch (info->flash_id & FLASH_VENDMASK) { + case FLASH_MAN_AMD: + printf ("AMD "); + break; + case FLASH_MAN_FUJ: + printf ("FUJITSU "); + break; + case FLASH_MAN_SST: + printf ("SST "); + break; + case FLASH_MAN_STM: + printf ("STM "); + break; + case FLASH_MAN_INTEL: + printf ("INTEL "); + break; + default: + printf ("Unknown Vendor "); + break; + } + + if (info->flash_id & 0x0001 ) { + boottype = botboot; + } else { + boottype = topboot; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_AM160B: + printf ("AM29LV160B (16 Mbit%s",boottype); + break; + case FLASH_AM160T: + printf ("AM29LV160T (16 Mbit%s",boottype); + break; + case FLASH_AMDL163T: + printf ("AM29DL163T (16 Mbit%s",boottype); + break; + case FLASH_AMDL163B: + printf ("AM29DL163B (16 Mbit%s",boottype); + break; + case FLASH_AM320B: + printf ("AM29LV320B (32 Mbit%s",boottype); + break; + case FLASH_AM320T: + printf ("AM29LV320T (32 Mbit%s",boottype); + break; + case FLASH_AMDL323T: + printf ("AM29DL323T (32 Mbit%s",boottype); + break; + case FLASH_AMDL323B: + printf ("AM29DL323B (32 Mbit%s",boottype); + break; + case FLASH_AMDL322T: + printf ("AM29DL322T (32 Mbit%s",boottype); + break; + default: + printf ("Unknown Chip Type\n"); + break; + } + + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i=0; i<info->sector_count; ++i) { + if ((i % 5) == 0) + printf ("\n "); + printf (" %08lX%s", info->start[i], + info->protect[i] ? " (RO)" : " "); + } + printf ("\n"); + return; +} + + +/*----------------------------------------------------------------------- + * The following code cannot be run from FLASH! + */ +ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info) +{ + short i; + ulong base = (ulong)addr; + FLASH_WORD_SIZE value; + + /* Write auto select command: read Manufacturer ID */ + + /* + * Note: if it is an AMD flash and the word at addr[0000] + * is 0x00890089 this routine will think it is an Intel + * flash device and may(most likely) cause trouble. + */ + + addr[0x0000] = 0x00900090; + if(addr[0x0000] != 0x00890089){ + addr[0x0555] = 0x00AA00AA; + addr[0x02AA] = 0x00550055; + addr[0x0555] = 0x00900090; + } + value = addr[0]; + + switch (value) { + case (AMD_MANUFACT & FLASH_ID_MASK): + info->flash_id = FLASH_MAN_AMD; + break; + case (FUJ_MANUFACT & FLASH_ID_MASK): + info->flash_id = FLASH_MAN_FUJ; + break; + case (STM_MANUFACT & FLASH_ID_MASK): + info->flash_id = FLASH_MAN_STM; + break; + case (SST_MANUFACT & FLASH_ID_MASK): + info->flash_id = FLASH_MAN_SST; + break; + case (INTEL_MANUFACT & FLASH_ID_MASK): + info->flash_id = FLASH_MAN_INTEL; + break; + default: + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + return (0); /* no or unknown flash */ + } + + value = addr[1]; /* device ID */ + + switch (value) { + case (AMD_ID_LV160T & FLASH_ID_MASK): + info->flash_id += FLASH_AM160T; + info->sector_count = 35; + info->size = 0x00400000; + break; /* => 4 MB */ + + case (AMD_ID_LV160B & FLASH_ID_MASK): + info->flash_id += FLASH_AM160B; + info->sector_count = 35; + info->size = 0x00400000; + break; /* => 4 MB */ + + case (AMD_ID_DL163T & FLASH_ID_MASK): + info->flash_id += FLASH_AMDL163T; + info->sector_count = 39; + info->size = 0x00400000; + break; /* => 4 MB */ + + case (AMD_ID_DL163B & FLASH_ID_MASK): + info->flash_id += FLASH_AMDL163B; + info->sector_count = 39; + info->size = 0x00400000; + break; /* => 4 MB */ + + case (AMD_ID_DL323T & FLASH_ID_MASK): + info->flash_id += FLASH_AMDL323T; + info->sector_count = 71; + info->size = 0x00800000; + break; /* => 8 MB */ + + case (AMD_ID_DL323B & FLASH_ID_MASK): + info->flash_id += FLASH_AMDL323B; + info->sector_count = 71; + info->size = 0x00800000; + break; /* => 8 MB */ + + case (AMD_ID_DL322T & FLASH_ID_MASK): + info->flash_id += FLASH_AMDL322T; + info->sector_count = 71; + info->size = 0x00800000; + break; /* => 8 MB */ + + default: + /* FIXME*/ + info->flash_id = FLASH_UNKNOWN; + return (0); /* => no or unknown flash */ + } + + flash_get_offsets(base, info); + + /* check for protected sectors */ + for (i = 0; i < info->sector_count; i++) { + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ + addr = (volatile FLASH_WORD_SIZE *)(info->start[i]); + info->protect[i] = addr[2] & 1; + } + + /* + * Prevent writes to uninitialized FLASH. + */ + if (info->flash_id != FLASH_UNKNOWN) { + addr = (volatile FLASH_WORD_SIZE *)info->start[0]; + *addr = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */ + } + + return (info->size); +} + + +/*----------------------------------------------------------------------- + */ + +int flash_erase (flash_info_t *info, int s_first, int s_last) +{ + volatile FLASH_WORD_SIZE *addr=(volatile FLASH_WORD_SIZE*)(info->start[0]); + int flag, prot, sect, l_sect; + ulong start, now, last; + int rcode = 0; + + if ((s_first < 0) || (s_first > s_last)) { + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return 1; + } + + if ((info->flash_id == FLASH_UNKNOWN) || + (info->flash_id > FLASH_AMD_COMP) ) { + printf ("Can't erase unknown flash type - aborted\n"); + return 1; + } + + prot = 0; + for (sect=s_first; sect<=s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + + if (prot) { + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); + } else { + printf ("\n"); + } + + l_sect = -1; + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + addr[0x0555] = 0x00AA00AA; + addr[0x02AA] = 0x00550055; + addr[0x0555] = 0x00800080; + addr[0x0555] = 0x00AA00AA; + addr[0x02AA] = 0x00550055; + /* Start erase on unprotected sectors */ + for (sect = s_first; sect<=s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ + addr = (volatile FLASH_WORD_SIZE *)(info->start[sect]); + addr[0] = (0x00300030 & FLASH_ID_MASK); + l_sect = sect; + } + } + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* wait at least 80us - let's wait 1 ms */ + udelay (1000); + + /* + * We wait for the last triggered sector + */ + if (l_sect < 0) + goto DONE; + + start = get_timer (0); + last = start; + addr = (volatile FLASH_WORD_SIZE*)(info->start[l_sect]); + while ((addr[0] & (0x00800080&FLASH_ID_MASK)) != + (0x00800080&FLASH_ID_MASK) ) + { + if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return 1; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + serial_putc ('.'); + last = now; + } + } + +DONE: + /* reset to read mode */ + addr = (volatile FLASH_WORD_SIZE *)info->start[0]; + addr[0] = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */ + + printf (" done\n"); + return rcode; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ + +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +{ + ulong cp, wp, data; + int l; + int i, rc; + + wp = (addr & ~3); /* get lower word aligned address */ + + /* + * handle unaligned start bytes + */ + if ((l = addr - wp) != 0) { + data = 0; + for (i=0, cp=wp; i<l; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } + for (; i<4 && cnt>0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt==0 && i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } + + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + } + + /* + * handle word aligned part + */ + while (cnt >= 4) { + data = 0; + for (i=0; i<4; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + cnt -= 4; + } + + if (cnt == 0) { + return (0); + } + + /* + * handle unaligned tail bytes + */ + data = 0; + for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { + data = (data << 8) | *src++; + --cnt; + } + for (; i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } + + return (write_word(info, wp, data)); +} + +/*----------------------------------------------------------------------- + * Write a word to Flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ +static int write_word (flash_info_t *info, ulong dest, ulong data) +{ + vu_long *addr = (vu_long*)(info->start[0]); + ulong start; + int flag; + + /* Check if Flash is (sufficiently) erased */ + if ((*((vu_long *)dest) & data) != data) { + return (2); + } + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + /* AMD stuff */ + addr[0x0555] = 0x00AA00AA; + addr[0x02AA] = 0x00550055; + addr[0x0555] = 0x00A000A0; + + *((vu_long *)dest) = data; + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* data polling for D7 */ + start = get_timer(0); + + while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) { + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + return (1); + } + } + + return (0); +} diff --git a/board/snmc/qs850/qs850.c b/board/snmc/qs850/qs850.c new file mode 100644 index 00000000000..7448eb112e1 --- /dev/null +++ b/board/snmc/qs850/qs850.c @@ -0,0 +1,253 @@ +/* + * (C) Copyright 2003 + * MuLogic B.V. + * + * (C) Copyright 2002 + * Simple Network Magic Corporation, dnevil@snmc.com + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/u-boot.h> +#include <commproc.h> +#include "mpc8xx.h" + +/* ------------------------------------------------------------------------- */ + +static long int dram_size (long int, long int *, long int); + +/* ------------------------------------------------------------------------- */ + +const uint sdram_table[] = +{ + /* + * Single Read. (Offset 0 in UPMA RAM) + */ + 0x0f07cc04, 0x00adcc04, 0x00a74c00, 0x00bfcc04, + 0x1fffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05, + /* + * Burst Read. (Offset 8 in UPMA RAM) + */ + 0x0ff7fc04, 0x0ffffc04, 0x00bdfc04, 0x00fffc00, + 0x00fffc00, 0x00fffc00, 0x0ff77c00, 0x1ffffc05, + 0x1ffffc05, 0x1ffffc05, 0x1ffffc05, 0x1ffffc05, + 0x1ffffc05, 0x1ffffc05, 0x1ffffc05, 0x1ffffc05, + /* + * Single Write. (Offset 18 in UPMA RAM) + */ + 0x0f07cc04, 0x0fafcc00, 0x01ad0c04, 0x1ff74c07, + 0xffffcc05, 0xffffcc05, 0xffffcc05, 0xffffcc05, + /* + * Burst Write. (Offset 20 in UPMA RAM) + */ + 0x0ff7fc04, 0x0ffffc00, 0x00bd7c00, 0x00fffc00, + 0x00fffc00, 0x00fffc00, 0x0ffffc04, 0x0ff77c04, + 0x1ffffc05, 0x1ffffc05, 0x1ffffc05, 0x1ffffc05, + 0x1ffffc05, 0x1ffffc05, 0x1ffffc05, 0x1ffffc05, + /* + * Refresh (Offset 30 in UPMA RAM) + */ + 0xffffcc04, 0x1ff5cc84, 0xffffcc04, 0xffffcc04, + 0xffffcc84, 0xffffcc05, 0xffffcc04, 0xffffcc04, + 0xffffcc04, 0xffffcc04, 0xffffcc04, 0xffffcc04, + /* + * Exception. (Offset 3c in UPMA RAM) + */ + 0x1ff74c04, 0xffffcc07, 0xffffaa34, 0x1fb54a37 +}; + +/* ------------------------------------------------------------------------- */ + + +/* + * Check Board Identity: + * + * Test ID string (QS850, QS823, ...) + * + * Always return 1 + */ + +int checkboard (void) +{ + unsigned char *s, *e; + unsigned char buf[64]; + int i; + + i = getenv_r("serial#", buf, sizeof(buf)); + s = (i>0) ? buf : NULL; + +#ifdef CONFIG_QS850 + if (!s || strncmp(s, "QS850", 5)) { + puts ("### No HW ID - assuming QS850"); +#endif +#ifdef CONFIG_QS823 + if (!s || strncmp(s, "QS823", 5)) { + puts ("### No HW ID - assuming QS823"); +#endif + } else { + for (e=s; *e; ++e) { + if (*e == ' ') + break; + } + + for ( ; s<e; ++s) { + putc (*s); + } + } + putc ('\n'); + + return (0); +} + +/* ------------------------------------------------------------------------- */ +/* SDRAM Mode Register Definitions */ + +/* Set SDRAM Burst Length to 4 (010) */ +/* See Motorola MPC850 User Manual, Page 13-14 */ +#define SDRAM_BURST_LENGTH (2) + +/* Set Wrap Type to Sequential (0) */ +/* See Motorola MPC850 User Manual, Page 13-14 */ +#define SDRAM_WRAP_TYPE (0 << 3) + +/* Set /CAS Latentcy to 2 clocks */ +#define SDRAM_CAS_LATENTCY (2 << 4) + +/* The Mode Register value must be shifted left by 2, since it is */ +/* placed on the address bus, and the 2 LSBs are ignored for 32-bit accesses */ +#define SDRAM_MODE_REG ((SDRAM_BURST_LENGTH|SDRAM_WRAP_TYPE|SDRAM_CAS_LATENTCY) << 2) + +#define UPMA_RUN(loops,index) (0x80002000 + (loops<<8) + index) + +/* Please note a value of zero = 16 loops */ +#define REFRESH_INIT_LOOPS (0) + + +long int initdram (int board_type) +{ + volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile memctl8xx_t *memctl = &immap->im_memctl; + long int size; + + upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint)); + + /* + * Prescaler for refresh + */ + memctl->memc_mptpr = CFG_MPTPR; + + /* + * Map controller bank 1 to the SDRAM address + */ + memctl->memc_or1 = CFG_OR1; + memctl->memc_br1 = CFG_BR1; + udelay(1000); + + /* perform SDRAM initialization sequence */ + memctl->memc_mamr = CFG_16M_MAMR; + udelay(100); + + /* Program the SDRAM's Mode Register */ + memctl->memc_mar = SDRAM_MODE_REG; + + /* Run the Prechard Pattern at 0x3C */ + memctl->memc_mcr = UPMA_RUN(1,0x3c); + udelay(1); + + /* Run the Refresh program residing at MAD index 0x30 */ + /* This contains the CBR Refresh command with a loop */ + /* The SDRAM must be refreshed at least 2 times */ + /* Please note a value of zero = 16 loops */ + memctl->memc_mcr = UPMA_RUN(REFRESH_INIT_LOOPS,0x30); + udelay(1); + + /* Run the Exception program residing at MAD index 0x3E */ + /* This contains the Write Mode Register command */ + /* The Write Mode Register command uses the value written to MAR */ + memctl->memc_mcr = UPMA_RUN(1,0x3e); + + udelay (1000); + + /* + * Check for 32M SDRAM Memory Size + */ + size = dram_size(CFG_32M_MAMR|MAMR_PTAE, + (ulong *)SDRAM_BASE, SDRAM_32M_MAX_SIZE); + udelay (1000); + + /* + * Check for 16M SDRAM Memory Size + */ + if (size != SDRAM_32M_MAX_SIZE) { + size = dram_size(CFG_16M_MAMR|MAMR_PTAE, + (ulong *)SDRAM_BASE, SDRAM_16M_MAX_SIZE); + udelay (1000); + } + + udelay(10000); + return (size); +} + +/* ------------------------------------------------------------------------- */ + +/* + * Check memory range for valid RAM. A simple memory test determines + * the actually available RAM size between addresses `base' and + * `base + maxsize'. Some (not all) hardware errors are detected: + * - short between address lines + * - short between data lines + */ + +static long int dram_size (long int mamr_value, long int *base, long int maxsize) +{ + volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile memctl8xx_t *memctl = &immap->im_memctl; + volatile long int *addr; + long int cnt, val; + + memctl->memc_mamr = mamr_value; + + for (cnt = maxsize/sizeof(long); cnt > 0; cnt >>= 1) { + addr = base + cnt; /* pointer arith! */ + *addr = ~cnt; + } + + /* write 0 to base address */ + addr = base; + *addr = 0; + + /* check at base address */ + if ((val = *addr) != 0) { + return (0); + } + + for (cnt = 1; ; cnt <<= 1) { + addr = base + cnt; /* pointer arith! */ + val = *addr; + + if (val != (~cnt)) { + return (cnt * sizeof(long)); + } + } + /* NOTREACHED */ +} diff --git a/board/snmc/qs850/u-boot.lds b/board/snmc/qs850/u-boot.lds new file mode 100644 index 00000000000..61e10849e53 --- /dev/null +++ b/board/snmc/qs850/u-boot.lds @@ -0,0 +1,141 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + cpu/mpc8xx/start.o (.text) + cpu/mpc8xx/traps.o (.text) + common/dlmalloc.o (.text) + lib_ppc/ppcstring.o (.text) + lib_generic/vsprintf.o (.text) + lib_generic/crc32.o (.text) + lib_generic/zlib.o (.text) + lib_ppc/cache.o (.text) + lib_ppc/time.o (.text) + + . = DEFINED(env_offset) ? env_offset : .; + common/environment.o (.ppcenv) + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} |