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-rw-r--r--board/freescale/ls1012ardb/ls1012ardb.c35
1 files changed, 35 insertions, 0 deletions
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index 65fa94c618..e3a8a7631b 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -9,6 +9,9 @@
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/fsl_serdes.h>
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/arch/ppa.h>
+#endif
#include <asm/arch/soc.h>
#include <hwconfig.h>
#include <ahci.h>
@@ -110,6 +113,9 @@ int board_init(void)
gd->env_addr = (ulong)&default_environment[0];
#endif
+#ifdef CONFIG_FSL_LS_PPA
+ ppa_init();
+#endif
return 0;
}
@@ -159,3 +165,32 @@ int ft_board_setup(void *blob, bd_t *bd)
return 0;
}
+
+void dram_init_banksize(void)
+{
+ /*
+ * gd->secure_ram tracks the location of secure memory.
+ * It was set as if the memory starts from 0.
+ * The address needs to add the offset of its bank.
+ */
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ if (gd->ram_size > CONFIG_SYS_DDR_BLOCK1_SIZE) {
+ gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE;
+ gd->bd->bi_dram[1].start = CONFIG_SYS_DDR_BLOCK2_BASE;
+ gd->bd->bi_dram[1].size = gd->ram_size -
+ CONFIG_SYS_DDR_BLOCK1_SIZE;
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+ gd->arch.secure_ram = gd->bd->bi_dram[1].start +
+ gd->arch.secure_ram -
+ CONFIG_SYS_DDR_BLOCK1_SIZE;
+ gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+#endif
+ } else {
+ gd->bd->bi_dram[0].size = gd->ram_size;
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+ gd->arch.secure_ram = gd->bd->bi_dram[0].start +
+ gd->arch.secure_ram;
+ gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+#endif
+ }
+}