diff options
Diffstat (limited to 'board/at91sam9261ek')
-rw-r--r-- | board/at91sam9261ek/Makefile | 47 | ||||
-rw-r--r-- | board/at91sam9261ek/at91sam9261ek.c | 142 | ||||
-rw-r--r-- | board/at91sam9261ek/config.mk | 1 | ||||
-rw-r--r-- | board/at91sam9261ek/nand.c | 124 | ||||
-rw-r--r-- | board/at91sam9261ek/u-boot.lds | 56 |
5 files changed, 370 insertions, 0 deletions
diff --git a/board/at91sam9261ek/Makefile b/board/at91sam9261ek/Makefile new file mode 100644 index 00000000000..33176b2cfd4 --- /dev/null +++ b/board/at91sam9261ek/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := at91sam9261ek.o nand.o +SOBJS := + +$(LIB): $(OBJS) $(SOBJS) + $(AR) crv $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff --git a/board/at91sam9261ek/at91sam9261ek.c b/board/at91sam9261ek/at91sam9261ek.c new file mode 100644 index 00000000000..003f846b826 --- /dev/null +++ b/board/at91sam9261ek/at91sam9261ek.c @@ -0,0 +1,142 @@ +/* + * (C) Copyright 2005 + * M. Amine SAYA ATMEL Rousset, France. + * Added AT91SAM9261EK support. + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/hardware.h> + +#include <net.h> + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ +#ifdef CONFIG_DRIVER_DM9000 + +void at91sam9261ek_dm9000_init(void) { + + /* Configure SMC CS2 for DM9000 */ + AT91C_BASE_SMC->SMC_SETUP2 = (AT91C_DM9000_NWE_SETUP | AT91C_DM9000_NCS_WR_SETUP | + AT91C_DM9000_NRD_SETUP | AT91C_DM9000_NCS_RD_SETUP); + + AT91C_BASE_SMC->SMC_PULSE2 = (AT91C_DM9000_NWE_PULSE | AT91C_DM9000_NCS_WR_PULSE | AT91C_DM9000_NRD_PULSE | AT91C_DM9000_NCS_RD_PULSE); + + AT91C_BASE_SMC->SMC_CYCLE2 = (AT91C_DM9000_NWE_CYCLE | AT91C_DM9000_NRD_CYCLE); + +#ifdef CONFIG_DM9000_USE_8BIT + AT91C_BASE_SMC->SMC_CTRL2 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_ENABLE_READY | + AT91C_SMC_DBW_WIDTH_EIGTH_BITS | AT91C_DM9000_TDF); +#endif + +#ifdef CONFIG_DM9000_USE_16BIT + AT91C_BASE_SMC->SMC_CTRL2 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | + AT91C_SMC_BAT_BYTE_WRITE | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_DM9000_TDF); +#endif + + /* Configure NWAIT signal */ + /* AT91F_PIO_CfgPeriph(AT91C_BASE_PIOC,AT91C_PC2_NWAIT,0); */ + + /* Configure Reset signal in output */ + AT91F_PIO_CfgOutput(AT91C_BASE_PIOC,AT91C_PIO_PC10); + AT91F_PIO_ClearOutput(AT91C_BASE_PIOC,AT91C_PIO_PC10); +} +#endif + +int board_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* Enable Ctrlc */ + console_init_f (); + + /* Enable clocks for SMC and PIOC */ + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS; + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOC; + + /* memory and cpu-speed are setup before relocation */ + /* so we do _nothing_ here */ + +#ifdef CONFIG_LCD + gd->fb_base = (unsigned long) AT91C_IRAM; +#endif + + /* arch number of AT91SAM9261EK-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9261EK; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int AT91F_Serial_Hardware_Init(void) +{ +#ifdef CONFIG_DBGU + *AT91C_PIOA_PDR = AT91C_PA10_DTXD | AT91C_PA9_DRXD; /* PA 10 & 9 */ + *AT91C_PMC_PCER = 1 << AT91C_ID_SYS; /* enable clock */ +#endif + +#ifdef CONFIG_USART0 + *AT91C_PIOA_PDR = AT91C_PC8_TXD0 | AT91C_PC9_RXD0; + *AT91C_PMC_PCER |= 1 << AT91C_ID_US0; /* enable clock */ +#endif + +#ifdef CONFIG_USART1 + *AT91C_PIOB_PDR = AT91C_PC12_TXD1 | AT91C_PC13_RXD1; + *AT91C_PMC_PCER |= 1 << AT91C_ID_US1; /* enable clock */ +#endif + +#ifdef CONFIG_USART2 + *AT91C_PIOB_PDR = AT91C_PC14_TXD2 | AT91C_PC15_RXD2; + *AT91C_PMC_PCER |= 1 << AT91C_ID_US2; /* enable clock */ +#endif +} + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + + +int board_late_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* Fix Ethernet Initialization Bug when starting Linux from U-Boot */ +#if (CONFIG_COMMANDS & CFG_CMD_NET) +#ifdef CONFIG_DRIVER_DM9000 + /* configure SMC's NCS2 to use it with DM9000 chip */ + at91sam9261ek_dm9000_init(); +#endif + eth_init(gd->bd); +#endif + + return 0; +} diff --git a/board/at91sam9261ek/config.mk b/board/at91sam9261ek/config.mk new file mode 100644 index 00000000000..ff2cfd170bb --- /dev/null +++ b/board/at91sam9261ek/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/at91sam9261ek/nand.c b/board/at91sam9261ek/nand.c new file mode 100644 index 00000000000..ee33961000b --- /dev/null +++ b/board/at91sam9261ek/nand.c @@ -0,0 +1,124 @@ +/* + * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/hardware.h> + +#if (CONFIG_COMMANDS & CFG_CMD_NAND) + +#include <nand.h> + +/* + * hardware specific access to control-lines + */ +#define MASK_CLE (1 << 21) /* our ALE is AD22 */ +#define MASK_ALE (1 << 22) /* our CLE is AD21 */ + +/* + * Disk On Chip (NAND) Millenium initialization. + * The NAND lives in the CS3* space + */ +void at91sam9261ek_nand_init (struct nand_chip *nand) +{ + /* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */ + AT91C_BASE_MATRIX->MATRIX_EBICSA |= AT91C_MATRIX_CS3A_SM; + + /* Configure SMC CS3 */ + AT91C_BASE_SMC->SMC_SETUP3 = (AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | + AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP); + + AT91C_BASE_SMC->SMC_PULSE3 = (AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE); + + AT91C_BASE_SMC->SMC_CYCLE3 = (AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE); + + if ((nand->options & NAND_BUSWIDTH_16) == NAND_BUSWIDTH_16) + { + AT91C_BASE_SMC->SMC_CTRL3 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | + AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF); + } else { + AT91C_BASE_SMC->SMC_CTRL3 = (AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | + AT91C_SMC_DBW_WIDTH_EIGTH_BITS | AT91C_SM_TDF); + } + + /* Clock PIOC */ + AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOC; + + /* Configure Ready/Busy signal */ + AT91C_BASE_PIOC->PIO_ODR = AT91C_PIO_PC15; + AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC15; + /* Configure pull-up */ + AT91C_BASE_PIOC->PIO_PPUER = AT91C_PIO_PC15; + + /* Enable PC0=SMOE line PC1=SMWE, A21=CLE, A22=ALE */ + AT91C_BASE_PIOC->PIO_ASR = (AT91C_PC0_SMOE | AT91C_PC1_SMWE); + AT91C_BASE_PIOC->PIO_PDR = (AT91C_PC0_SMOE | AT91C_PC1_SMWE); /* Set in Periph mode */ + + /* Enable NandFlash */ + AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC14; + AT91C_BASE_PIOC->PIO_OER = AT91C_PIO_PC14; +} + +static void at91sam9261ek_nand_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + + IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); + switch (cmd) { + case NAND_CTL_SETCLE: IO_ADDR_W |= MASK_CLE; break; + case NAND_CTL_SETALE: IO_ADDR_W |= MASK_ALE; break; + case NAND_CTL_CLRNCE: *AT91C_PIOC_SODR = AT91C_PIO_PC14; break; + case NAND_CTL_SETNCE: *AT91C_PIOC_CODR = AT91C_PIO_PC14; break; + } + this->IO_ADDR_W = (void *) IO_ADDR_W; +} + +/* + * chip R/B detection + */ +static int at91sam9261ek_nand_ready(struct mtd_info *mtd) +{ + return (*AT91C_PIOC_PDSR & AT91C_PIO_PC15); +} + +void board_nand_init(struct nand_chip *nand) +{ + /* Init due to switch 8/16 bits mode */ + if (nand->write_byte) + nand->write_byte = NULL; + if (nand->read_byte) + nand->read_byte = NULL; + if (nand->write_buf) + nand->write_buf = NULL; + if (nand->read_buf) + nand->read_buf = NULL; + if (nand->verify_buf) + nand->verify_buf = NULL; + + nand->eccmode = NAND_ECC_SOFT; + nand->hwcontrol = at91sam9261ek_nand_hwcontrol; + nand->dev_ready = at91sam9261ek_nand_ready; + nand->chip_delay = 18; + + at91sam9261ek_nand_init(nand); +} +#endif diff --git a/board/at91sam9261ek/u-boot.lds b/board/at91sam9261ek/u-boot.lds new file mode 100644 index 00000000000..afdc7173c9a --- /dev/null +++ b/board/at91sam9261ek/u-boot.lds @@ -0,0 +1,56 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm926ejs/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} |