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-rw-r--r--board/altera/socfpga/pll_config.h3
-rw-r--r--board/altera/socfpga/socfpga_cyclone5.c6
2 files changed, 7 insertions, 2 deletions
diff --git a/board/altera/socfpga/pll_config.h b/board/altera/socfpga/pll_config.h
index 9bd044230b..f0f59a9519 100644
--- a/board/altera/socfpga/pll_config.h
+++ b/board/altera/socfpga/pll_config.h
@@ -94,6 +94,9 @@
/* Info for driver */
#define CONFIG_HPS_CLK_OSC1_HZ (25000000)
+#define CONFIG_HPS_CLK_OSC2_HZ 0
+#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ 0
+#define CONFIG_HPS_CLK_F2S_PER_REF_HZ 0
#define CONFIG_HPS_CLK_MAINVCO_HZ (1600000000)
#define CONFIG_HPS_CLK_PERVCO_HZ (1000000000)
#ifdef CONFIG_SOCFPGA_ARRIA5
diff --git a/board/altera/socfpga/socfpga_cyclone5.c b/board/altera/socfpga/socfpga_cyclone5.c
index fb92852d5f..0f81d899a6 100644
--- a/board/altera/socfpga/socfpga_cyclone5.c
+++ b/board/altera/socfpga/socfpga_cyclone5.c
@@ -17,7 +17,7 @@ DECLARE_GLOBAL_DATA_PTR;
*/
int checkboard(void)
{
- puts("BOARD : Altera SOCFPGA Cyclone5 Board\n");
+ puts("BOARD: Altera SoCFPGA Cyclone5 Board\n");
return 0;
}
@@ -34,6 +34,8 @@ int board_early_init_f(void)
*/
int board_init(void)
{
- icache_enable();
+ /* Address of boot parameters for ATAG (if ATAG is used) */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
return 0;
}