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-rw-r--r--arch/riscv/cpu/nx25/Makefile4
-rw-r--r--arch/riscv/cpu/nx25/cpu.c3
-rw-r--r--arch/riscv/cpu/nx25/start.S3
-rw-r--r--arch/riscv/cpu/nx25/u-boot.lds3
4 files changed, 4 insertions, 9 deletions
diff --git a/arch/riscv/cpu/nx25/Makefile b/arch/riscv/cpu/nx25/Makefile
index 5fcf1007c2..c3f164c122 100644
--- a/arch/riscv/cpu/nx25/Makefile
+++ b/arch/riscv/cpu/nx25/Makefile
@@ -1,9 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2017 Andes Technology Corporation
# Rick Chen, Andes Technology Corporation <rick@andestech.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
extra-y = start.o
diff --git a/arch/riscv/cpu/nx25/cpu.c b/arch/riscv/cpu/nx25/cpu.c
index 5478f4f2de..091e9ef59e 100644
--- a/arch/riscv/cpu/nx25/cpu.c
+++ b/arch/riscv/cpu/nx25/cpu.c
@@ -1,8 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Andes Technology Corporation
* Rick Chen, Andes Technology Corporation <rick@andestech.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/* CPU specific code */
diff --git a/arch/riscv/cpu/nx25/start.S b/arch/riscv/cpu/nx25/start.S
index cd0a66360d..7cd7755190 100644
--- a/arch/riscv/cpu/nx25/start.S
+++ b/arch/riscv/cpu/nx25/start.S
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Startup Code for RISC-V Core
*
@@ -6,8 +7,6 @@
*
* Copyright (C) 2017 Andes Technology Corporation
* Rick Chen, Andes Technology Corporation <rick@andestech.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <asm-offsets.h>
diff --git a/arch/riscv/cpu/nx25/u-boot.lds b/arch/riscv/cpu/nx25/u-boot.lds
index 936fd779aa..86ebc9f4bb 100644
--- a/arch/riscv/cpu/nx25/u-boot.lds
+++ b/arch/riscv/cpu/nx25/u-boot.lds
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2017 Andes Technology Corporation
* Rick Chen, Andes Technology Corporation <rick@andestech.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
OUTPUT_ARCH("riscv")
ENTRY(_start)