5 files changed, 11 insertions, 10 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
index c386e4ed3fd..d2b6b05bdaf 100644
--- a/arch/powerpc/cpu/mpc83xx/pcie.c
+++ b/arch/powerpc/cpu/mpc83xx/pcie.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <pci.h>
 #include <mpc83xx.h>
 #include <asm/global_data.h>
@@ -46,7 +47,7 @@ int get_pcie_clk(int index)
 
 	clkin_div = ((im->clk.spmr & SPMR_CKID) >> SPMR_CKID_SHIFT);
 	sccr = im->clk.sccr;
-	pci_sync_in = CONFIG_SYS_CLK_FREQ / (1 + clkin_div);
+	pci_sync_in = get_board_sys_clk() / (1 + clkin_div);
 	spmf = (im->clk.spmr & SPMR_SPMF) >> SPMR_SPMF_SHIFT;
 	csb_clk = pci_sync_in * (1 + clkin_div) * spmf;
 
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index e5db96b328d..f835263f25d 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -137,8 +137,8 @@ int get_clocks(void)
 	clkin_div = ((im->clk.spmr & SPMR_CKID) >> SPMR_CKID_SHIFT);
 
 	if (im->reset.rcwh & HRCWH_PCI_HOST) {
-#if defined(CONFIG_SYS_CLK_FREQ)
-		pci_sync_in = CONFIG_SYS_CLK_FREQ / (1 + clkin_div);
+#if CONFIG_SYS_CLK_FREQ != 0
+		pci_sync_in = get_board_sys_clk() / (1 + clkin_div);
 #else
 		pci_sync_in = 0xDEADBEEF;
 #endif
diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
index 00cb2bd044e..11b1e613fb9 100644
--- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c
+++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
@@ -102,5 +102,5 @@ ulong get_bus_freq(ulong dummy)
 	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
 	u8 spmf = (im->clk.spmr & SPMR_SPMF) >> SPMR_SPMF_SHIFT;
 
-	return CONFIG_SYS_CLK_FREQ * spmf;
+	return get_board_sys_clk() * spmf;
 }
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 3f2fc062b2b..d4b828e3824 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -662,9 +662,9 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
 
 #ifdef CONFIG_FSL_CORENET
 	do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
-		"clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
+		"clock-frequency", get_board_sys_clk(), 1);
 	do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0",
-		"clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
+		"clock-frequency", get_board_sys_clk(), 1);
 	do_fixup_by_compat_u32(blob, "fsl,mpic",
 		"clock-frequency", get_bus_freq(0)/2, 1);
 #else
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 1fe914a4e43..5a9cd281617 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -75,7 +75,7 @@ void get_sys_info(sys_info_t *sys_info)
 	uint rcw_tmp;
 #endif
 	uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS];
-	unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
+	unsigned long sysclk = get_board_sys_clk();
 	uint mem_pll_rat;
 
 	sys_info->freq_systembus = sysclk;
@@ -102,7 +102,7 @@ void get_sys_info(sys_info_t *sys_info)
 	 * are driven by differential sysclock.
 	 */
 	if (ddr_refclk_sel == FSL_CORENET2_RCWSR5_DDR_REFCLK_SINGLE_CLK)
-		sys_info->freq_ddrbus = CONFIG_SYS_CLK_FREQ;
+		sys_info->freq_ddrbus = get_board_sys_clk();
 	else
 #endif
 #if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
@@ -526,7 +526,7 @@ void get_sys_info(sys_info_t *sys_info)
 
 	plat_ratio = (gur->porpllsr) & 0x0000003e;
 	plat_ratio >>= 1;
-	sys_info->freq_systembus = plat_ratio * CONFIG_SYS_CLK_FREQ;
+	sys_info->freq_systembus = plat_ratio * get_board_sys_clk();
 
 	/* Divide before multiply to avoid integer
 	 * overflow for processor speeds above 2GHz */
@@ -554,7 +554,7 @@ void get_sys_info(sys_info_t *sys_info)
 #else
 	qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO)
 			>> MPC85xx_PORPLLSR_QE_RATIO_SHIFT;
-	sys_info->freq_qe = qe_ratio * CONFIG_SYS_CLK_FREQ;
+	sys_info->freq_qe = qe_ratio * get_board_sys_clk();
 #endif
 #endif