diff options
Diffstat (limited to 'arch/mips/dts/mrvl,cn73xx.dtsi')
| -rw-r--r-- | arch/mips/dts/mrvl,cn73xx.dtsi | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/mips/dts/mrvl,cn73xx.dtsi b/arch/mips/dts/mrvl,cn73xx.dtsi index 27cdfd0a2c..2a17f7a6a6 100644 --- a/arch/mips/dts/mrvl,cn73xx.dtsi +++ b/arch/mips/dts/mrvl,cn73xx.dtsi @@ -97,6 +97,7 @@ uart0: serial@1180000000800 { compatible = "cavium,octeon-3860-uart","ns16550"; reg = <0x11800 0x00000800 0x0 0x400>; + clocks = <&clk OCTEON_CLK_IO>; clock-frequency = <0>; current-speed = <115200>; reg-shift = <3>; @@ -106,6 +107,7 @@ uart1: serial@1180000000c00 { compatible = "cavium,octeon-3860-uart","ns16550"; reg = <0x11800 0x00000c00 0x0 0x400>; + clocks = <&clk OCTEON_CLK_IO>; clock-frequency = <0>; current-speed = <115200>; reg-shift = <3>; @@ -230,5 +232,40 @@ dr_mode = "host"; }; }; + + /* PCIe 0 */ + pcie0: pcie@1180069000000 { + compatible = "marvell,pcie-host-octeon"; + reg = <0 0xf2600000 0 0x10000>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + dma-coherent; + + bus-range = <0 0xff>; + marvell,pcie-port = <0>; + ranges = <0x81000000 0x00000000 0xd0000000 0x00011a00 0xd0000000 0x00000000 0x01000000 /* IO */ + 0x02000000 0x00000000 0xe0000000 0x00011b00 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */ + 0x43000000 0x00011c00 0x00000000 0x00011c00 0x00000000 0x00000010 0x00000000>;/* prefetchable memory */ + }; + + uctl@118006c000000 { + compatible = "cavium,octeon-7130-sata-uctl", "simple-bus"; + reg = <0x11800 0x6c000000 0x0 0x100>; + ranges; /* Direct mapping */ + #address-cells = <2>; + #size-cells = <2>; + portmap = <0x3>; + staggered-spinup; + cavium,qlm-trim = "4,sata"; + + sata: sata@16c0000000000 { + compatible = "cavium,octeon-7130-ahci"; + reg = <0x16c00 0x00000000 0x0 0x200>; + #address-cells = <2>; + #size-cells = <2>; + interrupts = <0x6c010 4>; + }; + }; }; }; |