summaryrefslogtreecommitdiff
path: root/arch/microblaze/cpu
diff options
context:
space:
mode:
Diffstat (limited to 'arch/microblaze/cpu')
-rw-r--r--arch/microblaze/cpu/cache.c28
-rw-r--r--arch/microblaze/cpu/interrupts.c41
-rw-r--r--arch/microblaze/cpu/irq.S182
-rw-r--r--arch/microblaze/cpu/timer.c3
4 files changed, 103 insertions, 151 deletions
diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c
index 3b7c4d4f7f..d258a69382 100644
--- a/arch/microblaze/cpu/cache.c
+++ b/arch/microblaze/cpu/cache.c
@@ -50,6 +50,8 @@ void icache_enable (void) {
}
void icache_disable(void) {
+ /* we are not generate ICACHE size -> flush whole cache */
+ flush_cache(0, 32768);
MSRCLR(0x20);
}
@@ -58,5 +60,31 @@ void dcache_enable (void) {
}
void dcache_disable(void) {
+#ifdef XILINX_USE_DCACHE
+#ifdef XILINX_DCACHE_BYTE_SIZE
+ flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
+#else
+#warning please rebuild BSPs and update configuration
+ flush_cache(0, 32768);
+#endif
+#endif
MSRCLR(0x80);
}
+
+void flush_cache (ulong addr, ulong size)
+{
+ int i;
+ for (i = 0; i < size; i += 4)
+ asm volatile (
+#ifdef CONFIG_ICACHE
+ "wic %0, r0;"
+#endif
+ "nop;"
+#ifdef CONFIG_DCACHE
+ "wdc.flush %0, r0;"
+#endif
+ "nop;"
+ :
+ : "r" (addr + i)
+ : "memory");
+}
diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c
index a6021c99c3..7a9d022eee 100644
--- a/arch/microblaze/cpu/interrupts.c
+++ b/arch/microblaze/cpu/interrupts.c
@@ -46,13 +46,6 @@ int disable_interrupts (void)
}
#ifdef CONFIG_SYS_INTC_0
-#ifdef CONFIG_SYS_TIMER_0
-extern void timer_init (void);
-#endif
-#ifdef CONFIG_SYS_FSL_2
-extern void fsl_init2 (void);
-#endif
-
static struct irq_action vecs[CONFIG_SYS_INTC_0_NUM];
@@ -142,20 +135,14 @@ int interrupts_init (void)
}
/* initialize intc controller */
intc_init ();
-#ifdef CONFIG_SYS_TIMER_0
- timer_init ();
-#endif
-#ifdef CONFIG_SYS_FSL_2
- fsl_init2 ();
-#endif
enable_interrupts ();
return 0;
}
void interrupt_handler (void)
{
- int irqs = (intc->isr & intc->ier); /* find active interrupt */
- int i = 1;
+ int irqs = intc->ivr; /* find active interrupt */
+ int mask = 1;
#ifdef DEBUG_INT
int value;
printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
@@ -163,23 +150,17 @@ void interrupt_handler (void)
R14(value);
printf ("Interrupt handler on %x line, r14 %x\n", irqs, value);
#endif
- struct irq_action *act = vecs;
- while (irqs) {
- if (irqs & 1) {
+ struct irq_action *act = vecs + irqs;
+
+ intc->iar = mask << irqs;
+
#ifdef DEBUG_INT
- printf
- ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
- act->handler, act->count, act->arg);
+ printf
+ ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
+ act->handler, act->count, act->arg);
#endif
- act->handler (act->arg);
- act->count++;
- intc->iar = i;
- return;
- }
- irqs >>= 1;
- act++;
- i <<= 1;
- }
+ act->handler (act->arg);
+ act->count++;
#ifdef DEBUG_INT
printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
diff --git a/arch/microblaze/cpu/irq.S b/arch/microblaze/cpu/irq.S
index e1fc19046c..47bba36f21 100644
--- a/arch/microblaze/cpu/irq.S
+++ b/arch/microblaze/cpu/irq.S
@@ -27,129 +27,71 @@
.text
.global _interrupt_handler
_interrupt_handler:
- addi r1, r1, -4
- swi r2, r1, 0
- addi r1, r1, -4
- swi r3, r1, 0
- addi r1, r1, -4
- swi r4, r1, 0
- addi r1, r1, -4
- swi r5, r1, 0
- addi r1, r1, -4
- swi r6, r1, 0
- addi r1, r1, -4
- swi r7, r1, 0
- addi r1, r1, -4
- swi r8, r1, 0
- addi r1, r1, -4
- swi r9, r1, 0
- addi r1, r1, -4
- swi r10, r1, 0
- addi r1, r1, -4
- swi r11, r1, 0
- addi r1, r1, -4
- swi r12, r1, 0
- addi r1, r1, -4
- swi r13, r1, 0
- addi r1, r1, -4
- swi r14, r1, 0
- addi r1, r1, -4
- swi r15, r1, 0
- addi r1, r1, -4
- swi r16, r1, 0
- addi r1, r1, -4
- swi r17, r1, 0
- addi r1, r1, -4
- swi r18, r1, 0
- addi r1, r1, -4
- swi r19, r1, 0
- addi r1, r1, -4
- swi r20, r1, 0
- addi r1, r1, -4
- swi r21, r1, 0
- addi r1, r1, -4
- swi r22, r1, 0
- addi r1, r1, -4
- swi r23, r1, 0
- addi r1, r1, -4
- swi r24, r1, 0
- addi r1, r1, -4
- swi r25, r1, 0
- addi r1, r1, -4
- swi r26, r1, 0
- addi r1, r1, -4
- swi r27, r1, 0
- addi r1, r1, -4
- swi r28, r1, 0
- addi r1, r1, -4
- swi r29, r1, 0
- addi r1, r1, -4
- swi r30, r1, 0
- addi r1, r1, -4
- swi r31, r1, 0
+ swi r2, r1, -4
+ swi r3, r1, -8
+ swi r4, r1, -12
+ swi r5, r1, -16
+ swi r6, r1, -20
+ swi r7, r1, -24
+ swi r8, r1, -28
+ swi r9, r1, -32
+ swi r10, r1, -36
+ swi r11, r1, -40
+ swi r12, r1, -44
+ swi r13, r1, -48
+ swi r14, r1, -52
+ swi r15, r1, -56
+ swi r16, r1, -60
+ swi r17, r1, -64
+ swi r18, r1, -68
+ swi r19, r1, -72
+ swi r20, r1, -76
+ swi r21, r1, -80
+ swi r22, r1, -84
+ swi r23, r1, -88
+ swi r24, r1, -92
+ swi r25, r1, -96
+ swi r26, r1, -100
+ swi r27, r1, -104
+ swi r28, r1, -108
+ swi r29, r1, -112
+ swi r30, r1, -116
+ swi r31, r1, -120
+ addik r1, r1, -124
brlid r15, interrupt_handler
nop
nop
- lwi r31, r1, 0
- addi r1, r1, 4
- lwi r30, r1, 0
- addi r1, r1, 4
- lwi r29, r1, 0
- addi r1, r1, 4
- lwi r28, r1, 0
- addi r1, r1, 4
- lwi r27, r1, 0
- addi r1, r1, 4
- lwi r26, r1, 0
- addi r1, r1, 4
- lwi r25, r1, 0
- addi r1, r1, 4
- lwi r24, r1, 0
- addi r1, r1, 4
- lwi r23, r1, 0
- addi r1, r1, 4
- lwi r22, r1, 0
- addi r1, r1, 4
- lwi r21, r1, 0
- addi r1, r1, 4
- lwi r20, r1, 0
- addi r1, r1, 4
- lwi r19, r1, 0
- addi r1, r1, 4
- lwi r18, r1, 0
- addi r1, r1, 4
- lwi r17, r1, 0
- addi r1, r1, 4
- lwi r16, r1, 0
- addi r1, r1, 4
- lwi r15, r1, 0
- addi r1, r1, 4
- lwi r14, r1, 0
- addi r1, r1, 4
- lwi r13, r1, 0
- addi r1, r1, 4
- lwi r12, r1, 0
- addi r1, r1, 4
- lwi r11, r1, 0
- addi r1, r1, 4
- lwi r10, r1, 0
- addi r1, r1, 4
- lwi r9, r1, 0
- addi r1, r1, 4
- lwi r8, r1, 0
- addi r1, r1, 4
- lwi r7, r1, 0
- addi r1, r1, 4
- lwi r6, r1, 0
- addi r1, r1, 4
- lwi r5, r1, 0
- addi r1, r1, 4
- lwi r4, r1, 0
- addi r1, r1, 4
- lwi r3, r1, 0
- addi r1, r1, 4
- lwi r2, r1, 0
- addi r1, r1, 4
+ addik r1, r1, 124
+ lwi r31, r1, -120
+ lwi r30, r1, -116
+ lwi r29, r1, -112
+ lwi r28, r1, -108
+ lwi r27, r1, -104
+ lwi r26, r1, -100
+ lwi r25, r1, -96
+ lwi r24, r1, -92
+ lwi r23, r1, -88
+ lwi r22, r1, -84
+ lwi r21, r1, -80
+ lwi r20, r1, -76
+ lwi r19, r1, -72
+ lwi r18, r1, -68
+ lwi r17, r1, -64
+ lwi r16, r1, -60
+ lwi r15, r1, -56
+ lwi r14, r1, -52
+ lwi r13, r1, -48
+ lwi r12, r1, -44
+ lwi r11, r1, -40
+ lwi r10, r1, -36
+ lwi r9, r1, -32
+ lwi r8, r1, -28
+ lwi r7, r1, -24
+ lwi r6, r1, -20
+ lwi r5, r1, -16
+ lwi r4, r1, -12
+ lwi r3, r1, -8
+ lwi r2, r1, -4
/* enable_interrupt */
#ifdef XILINX_USE_MSR_INSTR
diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c
index a91eabc642..4936c628ab 100644
--- a/arch/microblaze/cpu/timer.c
+++ b/arch/microblaze/cpu/timer.c
@@ -60,7 +60,7 @@ void timer_isr (void *arg)
tmr->control = tmr->control | TIMER_INTERRUPT;
}
-void timer_init (void)
+int timer_init (void)
{
tmr->loadreg = CONFIG_SYS_TIMER_0_PRELOAD;
tmr->control = TIMER_INTERRUPT | TIMER_RESET;
@@ -68,6 +68,7 @@ void timer_init (void)
TIMER_ENABLE | TIMER_ENABLE_INTR | TIMER_RELOAD | TIMER_DOWN_COUNT;
reset_timer ();
install_interrupt_handler (CONFIG_SYS_TIMER_0_IRQ, timer_isr, (void *)tmr);
+ return 0;
}
#endif
#endif
generated by cgit v1.2.3 (git 2.0.4) at 2024-07-02 00:21:19 +0000