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Diffstat (limited to 'arch/m68k/cpu/mcf5445x')
-rw-r--r--arch/m68k/cpu/mcf5445x/cpu_init.c38
-rw-r--r--arch/m68k/cpu/mcf5445x/start.S46
2 files changed, 42 insertions, 42 deletions
diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c
index 9b3f9f0fe13..1ce244872f1 100644
--- a/arch/m68k/cpu/mcf5445x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5445x/cpu_init.c
@@ -29,30 +29,30 @@ void init_fbcs(void)
fbcs_t *fbcs __maybe_unused = (fbcs_t *) MMAP_FBCS;
#if !defined(CONFIG_SERIAL_BOOT)
-#if (defined(CONFIG_SYS_CS0_BASE) && defined(CONFIG_SYS_CS0_MASK) && defined(CONFIG_SYS_CS0_CTRL))
- out_be32(&fbcs->csar0, CONFIG_SYS_CS0_BASE);
- out_be32(&fbcs->cscr0, CONFIG_SYS_CS0_CTRL);
- out_be32(&fbcs->csmr0, CONFIG_SYS_CS0_MASK);
+#if (defined(CFG_SYS_CS0_BASE) && defined(CFG_SYS_CS0_MASK) && defined(CFG_SYS_CS0_CTRL))
+ out_be32(&fbcs->csar0, CFG_SYS_CS0_BASE);
+ out_be32(&fbcs->cscr0, CFG_SYS_CS0_CTRL);
+ out_be32(&fbcs->csmr0, CFG_SYS_CS0_MASK);
#endif
#endif
-#if (defined(CONFIG_SYS_CS1_BASE) && defined(CONFIG_SYS_CS1_MASK) && defined(CONFIG_SYS_CS1_CTRL))
+#if (defined(CFG_SYS_CS1_BASE) && defined(CFG_SYS_CS1_MASK) && defined(CFG_SYS_CS1_CTRL))
/* Latch chipselect */
- out_be32(&fbcs->csar1, CONFIG_SYS_CS1_BASE);
- out_be32(&fbcs->cscr1, CONFIG_SYS_CS1_CTRL);
- out_be32(&fbcs->csmr1, CONFIG_SYS_CS1_MASK);
+ out_be32(&fbcs->csar1, CFG_SYS_CS1_BASE);
+ out_be32(&fbcs->cscr1, CFG_SYS_CS1_CTRL);
+ out_be32(&fbcs->csmr1, CFG_SYS_CS1_MASK);
#endif
-#if (defined(CONFIG_SYS_CS2_BASE) && defined(CONFIG_SYS_CS2_MASK) && defined(CONFIG_SYS_CS2_CTRL))
- out_be32(&fbcs->csar2, CONFIG_SYS_CS2_BASE);
- out_be32(&fbcs->cscr2, CONFIG_SYS_CS2_CTRL);
- out_be32(&fbcs->csmr2, CONFIG_SYS_CS2_MASK);
+#if (defined(CFG_SYS_CS2_BASE) && defined(CFG_SYS_CS2_MASK) && defined(CFG_SYS_CS2_CTRL))
+ out_be32(&fbcs->csar2, CFG_SYS_CS2_BASE);
+ out_be32(&fbcs->cscr2, CFG_SYS_CS2_CTRL);
+ out_be32(&fbcs->csmr2, CFG_SYS_CS2_MASK);
#endif
-#if (defined(CONFIG_SYS_CS3_BASE) && defined(CONFIG_SYS_CS3_MASK) && defined(CONFIG_SYS_CS3_CTRL))
- out_be32(&fbcs->csar3, CONFIG_SYS_CS3_BASE);
- out_be32(&fbcs->cscr3, CONFIG_SYS_CS3_CTRL);
- out_be32(&fbcs->csmr3, CONFIG_SYS_CS3_MASK);
+#if (defined(CFG_SYS_CS3_BASE) && defined(CFG_SYS_CS3_MASK) && defined(CFG_SYS_CS3_CTRL))
+ out_be32(&fbcs->csar3, CFG_SYS_CS3_BASE);
+ out_be32(&fbcs->cscr3, CFG_SYS_CS3_CTRL);
+ out_be32(&fbcs->csmr3, CFG_SYS_CS3_MASK);
#endif
#if (defined(CONFIG_SYS_CS4_BASE) && defined(CONFIG_SYS_CS4_MASK) && defined(CONFIG_SYS_CS4_CTRL))
@@ -208,14 +208,14 @@ void cpu_init_f(void)
/* FlexBus Chipselect */
init_fbcs();
-#ifdef CONFIG_SYS_CS0_BASE
+#ifdef CFG_SYS_CS0_BASE
/*
* now the flash base address is no longer at 0 (Newer ColdFire family
* boot at address 0 instead of 0xFFnn_nnnn). The vector table must
* also move to the new location.
*/
- if (CONFIG_SYS_CS0_BASE != 0)
- setvbr(CONFIG_SYS_CS0_BASE);
+ if (CFG_SYS_CS0_BASE != 0)
+ setvbr(CFG_SYS_CS0_BASE);
#endif
icache_enable();
diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S
index aea8f3090fe..a083c3d45d2 100644
--- a/arch/m68k/cpu/mcf5445x/start.S
+++ b/arch/m68k/cpu/mcf5445x/start.S
@@ -27,10 +27,10 @@
#if defined(CONFIG_SERIAL_BOOT)
#define ASM_DRAMINIT (asm_dram_init - CONFIG_TEXT_BASE + \
- CONFIG_SYS_INIT_RAM_ADDR)
+ CFG_SYS_INIT_RAM_ADDR)
#define ASM_DRAMINIT_N (asm_dram_init - CONFIG_TEXT_BASE)
#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_TEXT_BASE + \
- CONFIG_SYS_INIT_RAM_ADDR)
+ CFG_SYS_INIT_RAM_ADDR)
#endif
.text
@@ -123,18 +123,18 @@ asm_dram_init:
#ifdef CONFIG_SYS_NAND_BOOT
/* for assembly stack */
- move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
+ move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
movec %d0, %RAMBAR1
- move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
+ move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_SP_OFFSET), %sp
clr.l %sp@-
#endif
#ifdef CONFIG_CF_SBF
- move.l #CONFIG_SYS_INIT_RAM_ADDR, %d0
+ move.l #CFG_SYS_INIT_RAM_ADDR, %d0
movec %d0, %VBR
- move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
+ move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
movec %d0, %RAMBAR1
/* initialize general use internal ram */
@@ -145,7 +145,7 @@ asm_dram_init:
move.l %d0, (%a2)
/* invalidate and disable cache */
- move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
+ move.l #(CFG_SYS_ICACHE_INV + CFG_SYS_DCACHE_INV), %d0
movec %d0, %CACR /* Invalidate cache */
move.l #0, %d0
movec %d0, %ACR0
@@ -153,17 +153,17 @@ asm_dram_init:
movec %d0, %ACR2
movec %d0, %ACR3
- move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
+ move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_SP_OFFSET), %sp
clr.l %sp@-
-#ifdef CONFIG_SYS_CS0_BASE
+#ifdef CFG_SYS_CS0_BASE
/* Must disable global address */
move.l #0xFC008000, %a1
- move.l #(CONFIG_SYS_CS0_BASE), (%a1)
+ move.l #(CFG_SYS_CS0_BASE), (%a1)
move.l #0xFC008008, %a1
- move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
+ move.l #(CFG_SYS_CS0_CTRL), (%a1)
move.l #0xFC008004, %a1
- move.l #(CONFIG_SYS_CS0_MASK), (%a1)
+ move.l #(CFG_SYS_CS0_MASK), (%a1)
#endif
#endif /* CONFIG_CF_SBF */
@@ -216,8 +216,8 @@ asm_dspi_init:
move.l (%a1)+, %d5
move.l (%a1), %a4
- move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
- move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
+ move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_SBFHDR_DATA_OFFSET), %a0
+ move.l #(CFG_SYS_SBFHDR_SIZE), %d4
move.l #0xFC05C02C, %a1 /* dspi status */
@@ -334,14 +334,14 @@ asm_nand_init:
movec %d0, %ACR2
movec %d0, %ACR3
-#ifdef CONFIG_SYS_CS0_BASE
+#ifdef CFG_SYS_CS0_BASE
/* Must disable global address */
move.l #0xFC008000, %a1
- move.l #(CONFIG_SYS_CS0_BASE), (%a1)
+ move.l #(CFG_SYS_CS0_BASE), (%a1)
move.l #0xFC008008, %a1
- move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
+ move.l #(CFG_SYS_CS0_CTRL), (%a1)
move.l #0xFC008004, %a1
- move.l #(CONFIG_SYS_CS0_MASK), (%a1)
+ move.l #(CFG_SYS_CS0_MASK), (%a1)
#endif
/* NAND port configuration */
@@ -442,10 +442,10 @@ _start:
move.w #0x2700,%sr /* Mask off Interrupt */
/* Set vector base register at the beginning of the Flash */
- move.l #CONFIG_SYS_FLASH_BASE, %d0
+ move.l #CFG_SYS_FLASH_BASE, %d0
movec %d0, %VBR
- move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
+ move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
movec %d0, %RAMBAR1
/* initialize general use internal ram */
@@ -456,7 +456,7 @@ _start:
move.l %d0, (%a2)
/* invalidate and disable cache */
- move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
+ move.l #(CFG_SYS_ICACHE_INV + CFG_SYS_DCACHE_INV), %d0
movec %d0, %CACR /* Invalidate cache */
move.l #0, %d0
movec %d0, %ACR0
@@ -464,7 +464,7 @@ _start:
movec %d0, %ACR2
movec %d0, %ACR3
#else
- move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
+ move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
movec %d0, %RAMBAR1
#endif
@@ -472,7 +472,7 @@ _start:
move.l #__got_start, %a5
/* setup stack initially on top of internal static ram */
- move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
+ move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE), %sp
/*
* if configured, malloc_f arena will be reserved first,
generated by cgit v1.2.3 (git 2.0.4) at 2024-10-02 22:43:42 +0000