3 files changed, 49 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs-imx8mm.h b/arch/arm/include/asm/arch-imx8m/imx-regs-imx8mm.h
index 457c618812..1fe316e19d 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs-imx8mm.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs-imx8mm.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2018 NXP
+ * Copyright 2018-2019 NXP
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -229,6 +229,17 @@ struct fuse_bank1_regs {
 	u32 rsvd3[3];
 };
 
+struct fuse_bank3_regs {
+	u32 mem_trim0;
+	u32 rsvd0[3];
+	u32 mem_trim1;
+	u32 rsvd1[3];
+	u32 mem_trim2;
+	u32 rsvd2[3];
+	u32 ana0;
+	u32 rsvd3[3];
+};
+
 struct fuse_bank9_regs {
 	u32 mac_addr0;
 	u32 rsvd0[3];
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs-imx8mq.h b/arch/arm/include/asm/arch-imx8m/imx-regs-imx8mq.h
index 60ef163a60..50116d638e 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs-imx8mq.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs-imx8mq.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2017-2018 NXP
+ * Copyright 2017-2019 NXP
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -217,6 +217,17 @@ struct fuse_bank1_regs {
 	u32 rsvd3[3];
 };
 
+struct fuse_bank3_regs {
+	u32 mem_trim0;
+	u32 rsvd0[3];
+	u32 mem_trim1;
+	u32 rsvd1[3];
+	u32 ana0;
+	u32 rsvd2[3];
+	u32 ana1;
+	u32 rsvd3[3];
+};
+
 struct anamix_pll {
 	u32 audio_pll1_cfg0;
 	u32 audio_pll1_cfg1;
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 640f503b9e..ff7b16e086 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2017-2018 NXP
+ * Copyright 2017-2019 NXP
  *
  * Peng Fan <peng.fan@nxp.com>
  *
@@ -712,3 +712,27 @@ int imx8m_usb_power(int usb_id, bool on)
 #endif
 	return 0;
 }
+
+void nxp_tmu_arch_init(void *reg_base)
+{
+	if (is_imx8mm()) {
+		/* Load TCALIV and TASR from fuses */
+		struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+		struct fuse_bank *bank = &ocotp->bank[3];
+		struct fuse_bank3_regs *fuse =
+			(struct fuse_bank3_regs *)bank->fuse_regs;
+
+		u32 tca_rt, tca_hr, tca_en;
+		u32 buf_vref, buf_slope;
+
+		tca_rt = fuse->ana0 & 0xFF;
+		tca_hr = (fuse->ana0 & 0xFF00) >> 8;
+		tca_en = (fuse->ana0 & 0x2000000) >> 25;
+
+		buf_vref = (fuse->ana0 & 0x1F00000) >> 20;
+		buf_slope = (fuse->ana0 & 0xF0000) >> 16;
+
+		writel(buf_vref | (buf_slope << 16), (ulong)reg_base + 0x28);
+		writel((tca_en << 31) |(tca_hr <<16) | tca_rt,  (ulong)reg_base + 0x30);
+	}
+}