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-rw-r--r--arch/arm/include/asm/arch-imx/cpu.h7
-rw-r--r--arch/arm/include/asm/mach-imx/sys_proto.h11
-rw-r--r--arch/arm/mach-imx/cpu.c16
-rw-r--r--arch/arm/mach-imx/imx8m/soc.c41
4 files changed, 66 insertions, 9 deletions
diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h
index 3b7c1c6a5e..05d48f6564 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -36,7 +36,12 @@
#define MXC_CPU_IMX8MMDL 0x88 /* dummy ID */
#define MXC_CPU_IMX8MMS 0x89 /* dummy ID */
#define MXC_CPU_IMX8MMSL 0x8a /* dummy ID */
-#define MXC_CPU_IMX8MN 0x8b /* dummy ID */
+#define MXC_CPU_IMX8MN 0x8b /* dummy ID */
+#define MXC_CPU_IMX8MND 0x8c /* dummy ID */
+#define MXC_CPU_IMX8MNS 0x8d /* dummy ID */
+#define MXC_CPU_IMX8MNL 0x8e /* dummy ID */
+#define MXC_CPU_IMX8MNDL 0x8f /* dummy ID */
+#define MXC_CPU_IMX8MNSL 0x181 /* dummy ID */
#define MXC_CPU_IMX8QM 0x91 /* dummy ID */
#define MXC_CPU_IMX8QXP 0x92 /* dummy ID */
diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
index 42dcdda967..5895a66233 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -18,7 +18,7 @@
#define is_soc_rev(rev) (soc_rev() == rev)
/* returns MXC_CPU_ value */
-#define cpu_type(rev) (((rev) >> 12) & 0xff)
+#define cpu_type(rev) (((rev) >> 12) & 0x1ff)
#define soc_type(rev) (((rev) >> 12) & 0xf0)
/* both macros return/take MXC_CPU_ constants */
#define get_cpu_type() (cpu_type(get_cpu_rev()))
@@ -55,7 +55,14 @@
#define is_imx8mmdl() (is_cpu_type(MXC_CPU_IMX8MMDL))
#define is_imx8mms() (is_cpu_type(MXC_CPU_IMX8MMS))
#define is_imx8mmsl() (is_cpu_type(MXC_CPU_IMX8MMSL))
-#define is_imx8mn() (is_cpu_type(MXC_CPU_IMX8MN))
+#define is_imx8mn() (is_cpu_type(MXC_CPU_IMX8MN) || is_cpu_type(MXC_CPU_IMX8MND) || \
+ is_cpu_type(MXC_CPU_IMX8MNS) || is_cpu_type(MXC_CPU_IMX8MNL) || \
+ is_cpu_type(MXC_CPU_IMX8MNDL) || is_cpu_type(MXC_CPU_IMX8MNSL))
+#define is_imx8mnd() (is_cpu_type(MXC_CPU_IMX8MND))
+#define is_imx8mns() (is_cpu_type(MXC_CPU_IMX8MNS))
+#define is_imx8mnl() (is_cpu_type(MXC_CPU_IMX8MNL))
+#define is_imx8mndl() (is_cpu_type(MXC_CPU_IMX8MNDL))
+#define is_imx8mnsl() (is_cpu_type(MXC_CPU_IMX8MNSL))
#define is_imx8qm() (is_cpu_type(MXC_CPU_IMX8QM))
#define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))
#define is_imx8dx() (is_cpu_type(MXC_CPU_IMX8DX))
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 002f7157d3..060dadb88e 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -168,7 +168,17 @@ const char *get_imx_type(u32 imxtype)
{
switch (imxtype) {
case MXC_CPU_IMX8MN:
- return "8MNano";/* Quad-core version of the imx8mn */
+ return "8MNano Quad";/* Quad-core version of the imx8mn */
+ case MXC_CPU_IMX8MND:
+ return "8MNano Dual";/* Dual-core version of the imx8mn */
+ case MXC_CPU_IMX8MNS:
+ return "8MNano Solo";/* Single-core version of the imx8mn */
+ case MXC_CPU_IMX8MNL:
+ return "8MNano QuadLite";/* Quad-core Lite version of the imx8mn */
+ case MXC_CPU_IMX8MNDL:
+ return "8MNano DualLite";/* Dual-core Lite version of the imx8mn */
+ case MXC_CPU_IMX8MNSL:
+ return "8MNano SoloLite";/* Single-core Lite version of the imx8mn */
case MXC_CPU_IMX8MM:
return "8MMQ"; /* Quad-core version of the imx8mm */
case MXC_CPU_IMX8MML:
@@ -240,7 +250,7 @@ int print_cpuinfo(void)
int cpu_tmp, minc, maxc, ret;
printf("CPU: Freescale i.MX%s rev%d.%d",
- get_imx_type((cpurev & 0xFF000) >> 12),
+ get_imx_type((cpurev & 0x1FF000) >> 12),
(cpurev & 0x000F0) >> 4,
(cpurev & 0x0000F) >> 0);
max_freq = get_cpu_speed_grade_hz();
@@ -252,7 +262,7 @@ int print_cpuinfo(void)
}
#else
printf("CPU: Freescale i.MX%s rev%d.%d at %d MHz\n",
- get_imx_type((cpurev & 0xFF000) >> 12),
+ get_imx_type((cpurev & 0x1FF000) >> 12),
(cpurev & 0x000F0) >> 4,
(cpurev & 0x0000F) >> 0,
mxc_get_clock(MXC_ARM_CLK) / 1000000);
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index c4144f8140..ab138f3ed9 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -197,6 +197,23 @@ static u32 get_cpu_variant_type(u32 type)
return MXC_CPU_IMX8MML;
break;
}
+ } else if (type == MXC_CPU_IMX8MN) {
+ switch (value & 0x3) {
+ case 2:
+ if (value & 0x1000000)
+ return MXC_CPU_IMX8MNDL;
+ else
+ return MXC_CPU_IMX8MND;
+ case 3:
+ if (value & 0x1000000)
+ return MXC_CPU_IMX8MNSL;
+ else
+ return MXC_CPU_IMX8MNS;
+ default:
+ if (value & 0x1000000)
+ return MXC_CPU_IMX8MNL;
+ break;
+ }
}
return type;
@@ -214,7 +231,8 @@ u32 get_cpu_rev(void)
/* iMX8MN */
if (major_low == 0x42) {
- return (MXC_CPU_IMX8MN << 12) | reg;
+ type = get_cpu_variant_type(MXC_CPU_IMX8MN);
+ return (type << 12) | reg;
} else if (major_low == 0x41) {
/* iMX8MM */
type = get_cpu_variant_type(MXC_CPU_IMX8MM);
@@ -273,7 +291,8 @@ int arch_cpu_init(void)
clock_init();
imx_set_wdog_powerdown(false);
- if (is_imx8md() || is_imx8mmd() || is_imx8mmdl() || is_imx8mms() || is_imx8mmsl()) {
+ if (is_imx8md() || is_imx8mmd() || is_imx8mmdl() || is_imx8mms() || is_imx8mmsl() ||
+ is_imx8mnd() || is_imx8mndl() || is_imx8mns() || is_imx8mnsl()) {
/* Power down cpu core 1, 2 and 3 for iMX8M Dual core or Single core */
struct pgc_reg *pgc_core1 = (struct pgc_reg *)(GPC_BASE_ADDR + 0x840);
struct pgc_reg *pgc_core2 = (struct pgc_reg *)(GPC_BASE_ADDR + 0x880);
@@ -282,7 +301,7 @@ int arch_cpu_init(void)
writel(0x1, &pgc_core2->pgcr);
writel(0x1, &pgc_core3->pgcr);
- if (is_imx8mms() || is_imx8mmsl()) {
+ if (is_imx8mms() || is_imx8mmsl() || is_imx8mns() || is_imx8mnsl()) {
writel(0x1, &pgc_core1->pgcr);
writel(0xE, &gpc->cpu_pgc_dn_trg);
} else {
@@ -589,6 +608,15 @@ int disable_vpu_nodes(void *blob)
}
+int disable_gpu_nodes(void *blob)
+{
+ const char *nodes_path_8mn[] = {
+ "/gpu@38000000"
+ };
+
+ return disable_fdt_nodes(blob, nodes_path_8mn, ARRAY_SIZE(nodes_path_8mn));
+}
+
int disable_cpu_nodes(void *blob, u32 disabled_cores)
{
const char *nodes_path[] = {
@@ -712,6 +740,13 @@ usb_modify_speed:
disable_cpu_nodes(blob, 3);
#elif defined(CONFIG_IMX8MN)
+ if (is_imx8mnl() || is_imx8mndl() || is_imx8mnsl())
+ disable_gpu_nodes(blob);
+
+ if (is_imx8mnd() || is_imx8mndl())
+ disable_cpu_nodes(blob, 2);
+ else if (is_imx8mns() || is_imx8mnsl())
+ disable_cpu_nodes(blob, 3);
#ifdef CONFIG_IMX8MN_FORCE_NOM_SOC
/* Disable the DVFS by removing 1.4Ghz and 1.5Ghz operating-points*/