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-rw-r--r--arch/arm/cpu/arm1136/mx31/timer.c2
-rw-r--r--arch/arm/cpu/arm1136/mx35/timer.c2
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/soc.c2
-rw-r--r--arch/arm/cpu/armv8/s32v234/cpu.c2
-rw-r--r--arch/arm/cpu/pxa/timer.c2
-rw-r--r--arch/arm/include/asm/arch-omap4/sys_proto.h2
-rw-r--r--arch/arm/include/asm/arch-omap5/sys_proto.h2
-rw-r--r--arch/arm/lib/cmd_boot.c2
-rw-r--r--arch/arm/mach-at91/spl_atmel.c2
-rw-r--r--arch/arm/mach-davinci/spl.c2
-rw-r--r--arch/arm/mach-exynos/clock_init_exynos5.c2
-rw-r--r--arch/arm/mach-exynos/mmu-arm64.c2
-rw-r--r--arch/arm/mach-imx/cmd_dek.c2
-rw-r--r--arch/arm/mach-imx/mx7ulp/pcc.c2
-rw-r--r--arch/arm/mach-imx/mx7ulp/scg.c2
-rw-r--r--arch/arm/mach-imx/mx8m/clock.c2
-rw-r--r--arch/arm/mach-imx/mx8m/clock_slice.c2
-rw-r--r--arch/arm/mach-imx/timer.c2
-rw-r--r--arch/arm/mach-mvebu/armada3700/cpu.c2
-rw-r--r--arch/arm/mach-mvebu/armada8k/cpu.c2
-rw-r--r--arch/arm/mach-mvebu/sata.c2
-rw-r--r--arch/arm/mach-mvebu/timer.c2
-rw-r--r--arch/arm/mach-omap2/omap3/board.c2
-rw-r--r--arch/arm/mach-omap2/omap4/hwinit.c2
-rw-r--r--arch/arm/mach-omap2/omap5/hwinit.c2
-rw-r--r--arch/arm/mach-rockchip/rk3036-board-spl.c2
-rw-r--r--arch/arm/mach-rockchip/rk3188-board.c2
-rw-r--r--arch/arm/mach-rockchip/rk322x-board-spl.c2
-rw-r--r--arch/arm/mach-rockchip/rk3288-board-tpl.c2
-rw-r--r--arch/arm/mach-rockchip/rk3368-board-spl.c2
-rw-r--r--arch/arm/mach-rockchip/rk3368-board-tpl.c2
-rw-r--r--arch/arm/mach-rockchip/rk3399-board-spl.c2
-rw-r--r--arch/arm/mach-socfpga/clock_manager_arria10.c2
-rw-r--r--arch/arm/mach-socfpga/clock_manager_gen5.c2
-rw-r--r--arch/arm/mach-socfpga/fpga_manager.c2
-rw-r--r--arch/arm/mach-socfpga/freeze_controller.c2
-rw-r--r--arch/arm/mach-socfpga/misc_arria10.c2
-rw-r--r--arch/arm/mach-socfpga/reset_manager.c2
-rw-r--r--arch/arm/mach-socfpga/reset_manager_gen5.c2
-rw-r--r--arch/arm/mach-socfpga/scan_manager.c2
-rw-r--r--arch/arm/mach-socfpga/system_manager_gen5.c2
-rw-r--r--arch/arm/mach-sunxi/board.c1
-rw-r--r--arch/arm/mach-sunxi/dram_sun9i.c2
-rw-r--r--arch/arm/mach-tegra/board186.c2
-rw-r--r--arch/arm/mach-tegra/tegra186/nvtboot_board.c2
-rw-r--r--arch/arm/mach-zynq/ddrc.c2
-rw-r--r--arch/arm/mach-zynq/spl.c2
47 files changed, 0 insertions, 93 deletions
diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c
index 3a81ce427ca..ea9eca1dbff 100644
--- a/arch/arm/cpu/arm1136/mx31/timer.c
+++ b/arch/arm/cpu/arm1136/mx31/timer.c
@@ -23,8 +23,6 @@
#define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */
#define GPTCR_TEN 1 /* Timer enable */
-DECLARE_GLOBAL_DATA_PTR;
-
/* The 32768Hz 32-bit timer overruns in 131072 seconds */
int timer_init(void)
{
diff --git a/arch/arm/cpu/arm1136/mx35/timer.c b/arch/arm/cpu/arm1136/mx35/timer.c
index 4edf533e2a2..c396e15ec09 100644
--- a/arch/arm/cpu/arm1136/mx35/timer.c
+++ b/arch/arm/cpu/arm1136/mx35/timer.c
@@ -12,8 +12,6 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
-DECLARE_GLOBAL_DATA_PTR;
-
/* General purpose timers bitfields */
#define GPTCR_SWR (1<<15) /* Software reset */
#define GPTCR_FRR (1<<9) /* Freerun / restart */
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 18fb937a3a4..2fdc0eb8d15 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -26,8 +26,6 @@
#endif
#include <fsl_immap.h>
-DECLARE_GLOBAL_DATA_PTR;
-
bool soc_has_dp_ddr(void)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
diff --git a/arch/arm/cpu/armv8/s32v234/cpu.c b/arch/arm/cpu/armv8/s32v234/cpu.c
index 5c97e0eee43..282cd02f590 100644
--- a/arch/arm/cpu/armv8/s32v234/cpu.c
+++ b/arch/arm/cpu/armv8/s32v234/cpu.c
@@ -12,8 +12,6 @@
#include <asm/arch/mc_me_regs.h>
#include "cpu.h"
-DECLARE_GLOBAL_DATA_PTR;
-
u32 cpu_mask(void)
{
return readl(MC_ME_CS);
diff --git a/arch/arm/cpu/pxa/timer.c b/arch/arm/cpu/pxa/timer.c
index 7c25e67fea7..ba332716e86 100644
--- a/arch/arm/cpu/pxa/timer.c
+++ b/arch/arm/cpu/pxa/timer.c
@@ -9,8 +9,6 @@
#include <common.h>
#include <asm/io.h>
-DECLARE_GLOBAL_DATA_PTR;
-
int timer_init(void)
{
writel(0, CONFIG_SYS_TIMER_COUNTER);
diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h
index c9f0b3a14b5..c8298c57e11 100644
--- a/arch/arm/include/asm/arch-omap4/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap4/sys_proto.h
@@ -16,8 +16,6 @@
#include <asm/arch/mux_omap4.h>
#include <asm/ti-common/sys_proto.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
extern const struct emif_regs emif_regs_elpida_200_mhz_2cs;
extern const struct emif_regs emif_regs_elpida_380_mhz_1cs;
diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h
index d43cd7f2e72..e99bf77e839 100644
--- a/arch/arm/include/asm/arch-omap5/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap5/sys_proto.h
@@ -16,8 +16,6 @@
#include <asm/arch/clock.h>
#include <asm/ti-common/sys_proto.h>
-DECLARE_GLOBAL_DATA_PTR;
-
/*
* Structure for Iodelay configuration registers.
* Theoretical max for g_delay is 21560 ps.
diff --git a/arch/arm/lib/cmd_boot.c b/arch/arm/lib/cmd_boot.c
index 37bb6a567e8..781a6eaf52d 100644
--- a/arch/arm/lib/cmd_boot.c
+++ b/arch/arm/lib/cmd_boot.c
@@ -21,8 +21,6 @@
#include <common.h>
#include <command.h>
-DECLARE_GLOBAL_DATA_PTR;
-
/*
* ARMv7M does not support ARM instruction mode. However, the
* interworking BLX and BX instructions do encode the ARM/Thumb
diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c
index ce16ef3bdb7..ae008d5501e 100644
--- a/arch/arm/mach-at91/spl_atmel.c
+++ b/arch/arm/mach-at91/spl_atmel.c
@@ -15,8 +15,6 @@
#include <asm/arch/clk.h>
#include <spl.h>
-DECLARE_GLOBAL_DATA_PTR;
-
static void switch_to_main_crystal_osc(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
diff --git a/arch/arm/mach-davinci/spl.c b/arch/arm/mach-davinci/spl.c
index 4c74db9ed03..f4553160027 100644
--- a/arch/arm/mach-davinci/spl.c
+++ b/arch/arm/mach-davinci/spl.c
@@ -16,8 +16,6 @@
#include <spi_flash.h>
#include <mmc.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#ifndef CONFIG_SPL_LIBCOMMON_SUPPORT
void puts(const char *str)
{
diff --git a/arch/arm/mach-exynos/clock_init_exynos5.c b/arch/arm/mach-exynos/clock_init_exynos5.c
index 1b7498d9d5f..2c55e4031f5 100644
--- a/arch/arm/mach-exynos/clock_init_exynos5.c
+++ b/arch/arm/mach-exynos/clock_init_exynos5.c
@@ -21,8 +21,6 @@
#define FSYS1_MMC0_DIV_MASK 0xff0f
#define FSYS1_MMC0_DIV_VAL 0x0701
-DECLARE_GLOBAL_DATA_PTR;
-
struct arm_clk_ratios arm_clk_ratios[] = {
#ifdef CONFIG_EXYNOS5420
{
diff --git a/arch/arm/mach-exynos/mmu-arm64.c b/arch/arm/mach-exynos/mmu-arm64.c
index 23814222d82..e0dd94ce24e 100644
--- a/arch/arm/mach-exynos/mmu-arm64.c
+++ b/arch/arm/mach-exynos/mmu-arm64.c
@@ -8,8 +8,6 @@
#include <common.h>
#include <asm/armv8/mmu.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#ifdef CONFIG_EXYNOS7420
static struct mm_region exynos7420_mem_map[] = {
{
diff --git a/arch/arm/mach-imx/cmd_dek.c b/arch/arm/mach-imx/cmd_dek.c
index ada8adf2f4f..62cd56e096e 100644
--- a/arch/arm/mach-imx/cmd_dek.c
+++ b/arch/arm/mach-imx/cmd_dek.c
@@ -16,8 +16,6 @@
#include <asm/arch/clock.h>
#include <mapmem.h>
-DECLARE_GLOBAL_DATA_PTR;
-
/**
* blob_dek() - Encapsulate the DEK as a blob using CAM's Key
* @src: - Address of data to be encapsulated
diff --git a/arch/arm/mach-imx/mx7ulp/pcc.c b/arch/arm/mach-imx/mx7ulp/pcc.c
index edd84e51b98..1d39c5b1ee0 100644
--- a/arch/arm/mach-imx/mx7ulp/pcc.c
+++ b/arch/arm/mach-imx/mx7ulp/pcc.c
@@ -12,8 +12,6 @@
#include <asm/arch/pcc.h>
#include <asm/arch/sys_proto.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#define PCC_CLKSRC_TYPES 2
#define PCC_CLKSRC_NUM 7
diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c
index c117af0a0ec..341f8cc119a 100644
--- a/arch/arm/mach-imx/mx7ulp/scg.c
+++ b/arch/arm/mach-imx/mx7ulp/scg.c
@@ -12,8 +12,6 @@
#include <asm/arch/pcc.h>
#include <asm/arch/sys_proto.h>
-DECLARE_GLOBAL_DATA_PTR;
-
scg_p scg1_regs = (scg_p)SCG1_RBASE;
static u32 scg_src_get_rate(enum scg_clk clksrc)
diff --git a/arch/arm/mach-imx/mx8m/clock.c b/arch/arm/mach-imx/mx8m/clock.c
index c56ba99d5c6..04811173432 100644
--- a/arch/arm/mach-imx/mx8m/clock.c
+++ b/arch/arm/mach-imx/mx8m/clock.c
@@ -14,8 +14,6 @@
#include <errno.h>
#include <linux/iopoll.h>
-DECLARE_GLOBAL_DATA_PTR;
-
static struct anamix_pll *ana_pll = (struct anamix_pll *)ANATOP_BASE_ADDR;
static u32 decode_frac_pll(enum clk_root_src frac_pll)
diff --git a/arch/arm/mach-imx/mx8m/clock_slice.c b/arch/arm/mach-imx/mx8m/clock_slice.c
index e734498b947..b851d59c131 100644
--- a/arch/arm/mach-imx/mx8m/clock_slice.c
+++ b/arch/arm/mach-imx/mx8m/clock_slice.c
@@ -12,8 +12,6 @@
#include <asm/io.h>
#include <errno.h>
-DECLARE_GLOBAL_DATA_PTR;
-
static struct ccm_reg *ccm_reg = (struct ccm_reg *)CCM_BASE_ADDR;
static struct clk_root_map root_array[] = {
diff --git a/arch/arm/mach-imx/timer.c b/arch/arm/mach-imx/timer.c
index 69dbf3c2ceb..60f706fbe3b 100644
--- a/arch/arm/mach-imx/timer.c
+++ b/arch/arm/mach-imx/timer.c
@@ -38,8 +38,6 @@ static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;
#define GPTPR_PRESCALER24M_SHIFT 12
#define GPTPR_PRESCALER24M_MASK (0xF << GPTPR_PRESCALER24M_SHIFT)
-DECLARE_GLOBAL_DATA_PTR;
-
static inline int gpt_has_clk_source_osc(void)
{
#if defined(CONFIG_MX6)
diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-mvebu/armada3700/cpu.c
index ab4164cbe00..37ef13484c9 100644
--- a/arch/arm/mach-mvebu/armada3700/cpu.c
+++ b/arch/arm/mach-mvebu/armada3700/cpu.c
@@ -14,8 +14,6 @@
#include <asm/arch/soc.h>
#include <asm/armv8/mmu.h>
-DECLARE_GLOBAL_DATA_PTR;
-
/* Armada 3700 */
#define MVEBU_GPIO_NB_REG_BASE (MVEBU_REGISTER(0x13800))
diff --git a/arch/arm/mach-mvebu/armada8k/cpu.c b/arch/arm/mach-mvebu/armada8k/cpu.c
index ce7e913b708..2b3419be038 100644
--- a/arch/arm/mach-mvebu/armada8k/cpu.c
+++ b/arch/arm/mach-mvebu/armada8k/cpu.c
@@ -14,8 +14,6 @@
#include <asm/arch/soc.h>
#include <asm/armv8/mmu.h>
-DECLARE_GLOBAL_DATA_PTR;
-
/* Armada 7k/8k */
#define MVEBU_RFU_BASE (MVEBU_REGISTER(0x6f0000))
#define RFU_GLOBAL_SW_RST (MVEBU_RFU_BASE + 0x84)
diff --git a/arch/arm/mach-mvebu/sata.c b/arch/arm/mach-mvebu/sata.c
index 5d8032bd894..526c4a61ef9 100644
--- a/arch/arm/mach-mvebu/sata.c
+++ b/arch/arm/mach-mvebu/sata.c
@@ -8,8 +8,6 @@
#include <ahci.h>
#include <dm.h>
-DECLARE_GLOBAL_DATA_PTR;
-
/*
* Dummy implementation that can be overwritten by a board
* specific function
diff --git a/arch/arm/mach-mvebu/timer.c b/arch/arm/mach-mvebu/timer.c
index f5c2eaa808a..a86128e871c 100644
--- a/arch/arm/mach-mvebu/timer.c
+++ b/arch/arm/mach-mvebu/timer.c
@@ -11,8 +11,6 @@
#include <asm/io.h>
#include <asm/arch/soc.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#define TIMER_LOAD_VAL 0xffffffff
static int init_done __attribute__((section(".data"))) = 0;
diff --git a/arch/arm/mach-omap2/omap3/board.c b/arch/arm/mach-omap2/omap3/board.c
index a61b9331450..b4c9af1290b 100644
--- a/arch/arm/mach-omap2/omap3/board.c
+++ b/arch/arm/mach-omap2/omap3/board.c
@@ -28,8 +28,6 @@
#include <asm/omap_common.h>
#include <linux/compiler.h>
-DECLARE_GLOBAL_DATA_PTR;
-
/* Declarations */
extern omap3_sysinfo sysinfo;
#ifndef CONFIG_SYS_L2CACHE_OFF
diff --git a/arch/arm/mach-omap2/omap4/hwinit.c b/arch/arm/mach-omap2/omap4/hwinit.c
index 67ab1ccd75b..4bda162903b 100644
--- a/arch/arm/mach-omap2/omap4/hwinit.c
+++ b/arch/arm/mach-omap2/omap4/hwinit.c
@@ -21,8 +21,6 @@
#include <asm/arch/gpio.h>
#include <asm/omap_common.h>
-DECLARE_GLOBAL_DATA_PTR;
-
u32 *const omap_si_rev = (u32 *)OMAP_SRAM_SCRATCH_OMAP_REV;
static const struct gpio_bank gpio_bank_44xx[6] = {
diff --git a/arch/arm/mach-omap2/omap5/hwinit.c b/arch/arm/mach-omap2/omap5/hwinit.c
index 57f2a8664c8..e7a3f57b67e 100644
--- a/arch/arm/mach-omap2/omap5/hwinit.c
+++ b/arch/arm/mach-omap2/omap5/hwinit.c
@@ -24,8 +24,6 @@
#include <asm/emif.h>
#include <asm/omap_common.h>
-DECLARE_GLOBAL_DATA_PTR;
-
u32 *const omap_si_rev = (u32 *)OMAP_SRAM_SCRATCH_OMAP_REV;
#ifndef CONFIG_DM_GPIO
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c
index 550e3a15214..4501cd17e33 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036-board-spl.c
@@ -14,8 +14,6 @@
#include <asm/arch/timer.h>
#include <asm/arch/uart.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#define GRF_BASE 0x20008000
#define DEBUG_UART_BASE 0x20068000
diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c
index 916d18fc329..9005705db10 100644
--- a/arch/arm/mach-rockchip/rk3188-board.c
+++ b/arch/arm/mach-rockchip/rk3188-board.c
@@ -18,8 +18,6 @@
#include <asm/gpio.h>
#include <dm/pinctrl.h>
-DECLARE_GLOBAL_DATA_PTR;
-
int board_late_init(void)
{
struct rk3188_grf *grf;
diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c
index d3d04465744..4d8e8bdeb27 100644
--- a/arch/arm/mach-rockchip/rk322x-board-spl.c
+++ b/arch/arm/mach-rockchip/rk322x-board-spl.c
@@ -21,8 +21,6 @@ u32 spl_boot_device(void)
{
return BOOT_DEVICE_MMC1;
}
-DECLARE_GLOBAL_DATA_PTR;
-
#define GRF_BASE 0x11000000
#define SGRF_BASE 0x10140000
diff --git a/arch/arm/mach-rockchip/rk3288-board-tpl.c b/arch/arm/mach-rockchip/rk3288-board-tpl.c
index 150beea02e1..6f7097dbdbb 100644
--- a/arch/arm/mach-rockchip/rk3288-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-tpl.c
@@ -19,8 +19,6 @@
#include <asm/arch/sys_proto.h>
#include <asm/arch/timer.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#define GRF_BASE 0xff770000
void board_init_f(ulong dummy)
{
diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c
index 8055ae538f1..a1d504bbd27 100644
--- a/arch/arm/mach-rockchip/rk3368-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-spl.c
@@ -17,8 +17,6 @@
#include <asm/arch/periph.h>
#include <asm/arch/timer.h>
-DECLARE_GLOBAL_DATA_PTR;
-
void board_debug_uart_init(void)
{
}
diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c
index 60d5aeade99..f5bc0d4cd53 100644
--- a/arch/arm/mach-rockchip/rk3368-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c
@@ -18,8 +18,6 @@
#include <asm/arch/timer.h>
#include <syscon.h>
-DECLARE_GLOBAL_DATA_PTR;
-
/*
* The SPL (and also the full U-Boot stage on the RK3368) will run in
* secure mode (i.e. EL3) and an ATF will eventually be booted before
diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index d35990efd65..4eb7f01c15e 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -19,8 +19,6 @@
#include <spl.h>
#include <syscon.h>
-DECLARE_GLOBAL_DATA_PTR;
-
void board_return_to_bootrom(void)
{
back_to_bootrom(BROM_BOOT_NEXTSTAGE);
diff --git a/arch/arm/mach-socfpga/clock_manager_arria10.c b/arch/arm/mach-socfpga/clock_manager_arria10.c
index 623a266f80f..4bc4acb9bfe 100644
--- a/arch/arm/mach-socfpga/clock_manager_arria10.c
+++ b/arch/arm/mach-socfpga/clock_manager_arria10.c
@@ -10,8 +10,6 @@
#include <dm.h>
#include <asm/arch/clock_manager.h>
-DECLARE_GLOBAL_DATA_PTR;
-
static u32 eosc1_hz;
static u32 cb_intosc_hz;
static u32 f2s_free_hz;
diff --git a/arch/arm/mach-socfpga/clock_manager_gen5.c b/arch/arm/mach-socfpga/clock_manager_gen5.c
index 4e5b6d16937..1b3914ba7dc 100644
--- a/arch/arm/mach-socfpga/clock_manager_gen5.c
+++ b/arch/arm/mach-socfpga/clock_manager_gen5.c
@@ -10,8 +10,6 @@
#include <asm/arch/clock_manager.h>
#include <wait_bit.h>
-DECLARE_GLOBAL_DATA_PTR;
-
static const struct socfpga_clock_manager *clock_manager_base =
(struct socfpga_clock_manager *)SOCFPGA_CLKMGR_ADDRESS;
diff --git a/arch/arm/mach-socfpga/fpga_manager.c b/arch/arm/mach-socfpga/fpga_manager.c
index f9095739b0f..16e4a7821b3 100644
--- a/arch/arm/mach-socfpga/fpga_manager.c
+++ b/arch/arm/mach-socfpga/fpga_manager.c
@@ -15,8 +15,6 @@
#include <asm/arch/reset_manager.h>
#include <asm/arch/system_manager.h>
-DECLARE_GLOBAL_DATA_PTR;
-
/* Timeout count */
#define FPGA_TIMEOUT_CNT 0x1000000
diff --git a/arch/arm/mach-socfpga/freeze_controller.c b/arch/arm/mach-socfpga/freeze_controller.c
index 71d5d99e9c1..62fa854082e 100644
--- a/arch/arm/mach-socfpga/freeze_controller.c
+++ b/arch/arm/mach-socfpga/freeze_controller.c
@@ -11,8 +11,6 @@
#include <asm/arch/freeze_controller.h>
#include <linux/errno.h>
-DECLARE_GLOBAL_DATA_PTR;
-
static const struct socfpga_freeze_controller *freeze_controller_base =
(void *)(SOCFPGA_SYSMGR_ADDRESS + SYSMGR_FRZCTRL_ADDRESS);
diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c
index 9d751f6b2f2..475fd59a45b 100644
--- a/arch/arm/mach-socfpga/misc_arria10.c
+++ b/arch/arm/mach-socfpga/misc_arria10.c
@@ -28,8 +28,6 @@
#define PINMUX_UART1_TX_SHARED_IO_OFFSET_Q3_7 0x78
#define PINMUX_UART1_TX_SHARED_IO_OFFSET_Q4_3 0x98
-DECLARE_GLOBAL_DATA_PTR;
-
#if defined(CONFIG_SPL_BUILD)
static struct pl310_regs *const pl310 =
(struct pl310_regs *)CONFIG_SYS_PL310_BASE;
diff --git a/arch/arm/mach-socfpga/reset_manager.c b/arch/arm/mach-socfpga/reset_manager.c
index 29438ed533d..484b295cd3f 100644
--- a/arch/arm/mach-socfpga/reset_manager.c
+++ b/arch/arm/mach-socfpga/reset_manager.c
@@ -9,8 +9,6 @@
#include <asm/io.h>
#include <asm/arch/reset_manager.h>
-DECLARE_GLOBAL_DATA_PTR;
-
static const struct socfpga_reset_manager *reset_manager_base =
(void *)SOCFPGA_RSTMGR_ADDRESS;
diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c
index aa88adb4147..c59127456ce 100644
--- a/arch/arm/mach-socfpga/reset_manager_gen5.c
+++ b/arch/arm/mach-socfpga/reset_manager_gen5.c
@@ -11,8 +11,6 @@
#include <asm/arch/reset_manager.h>
#include <asm/arch/system_manager.h>
-DECLARE_GLOBAL_DATA_PTR;
-
static const struct socfpga_reset_manager *reset_manager_base =
(void *)SOCFPGA_RSTMGR_ADDRESS;
static const struct socfpga_system_manager *sysmgr_regs =
diff --git a/arch/arm/mach-socfpga/scan_manager.c b/arch/arm/mach-socfpga/scan_manager.c
index 566b33f2b6a..8b271b1f454 100644
--- a/arch/arm/mach-socfpga/scan_manager.c
+++ b/arch/arm/mach-socfpga/scan_manager.c
@@ -28,8 +28,6 @@
#define SCANMGR_STAT_ACTIVE (1 << 31)
#define SCANMGR_STAT_WFIFOCNT_MASK 0x70000000
-DECLARE_GLOBAL_DATA_PTR;
-
static const struct socfpga_scan_manager *scan_manager_base =
(void *)(SOCFPGA_SCANMGR_ADDRESS);
static const struct socfpga_freeze_controller *freeze_controller_base =
diff --git a/arch/arm/mach-socfpga/system_manager_gen5.c b/arch/arm/mach-socfpga/system_manager_gen5.c
index 3588a570a7f..e0af7753b0e 100644
--- a/arch/arm/mach-socfpga/system_manager_gen5.c
+++ b/arch/arm/mach-socfpga/system_manager_gen5.c
@@ -9,8 +9,6 @@
#include <asm/arch/system_manager.h>
#include <asm/arch/fpga_manager.h>
-DECLARE_GLOBAL_DATA_PTR;
-
static struct socfpga_system_manager *sysmgr_regs =
(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 1753faec1d9..ac456ca0c69 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -209,7 +209,6 @@ void s_init(void)
}
#ifdef CONFIG_SPL_BUILD
-DECLARE_GLOBAL_DATA_PTR;
#endif
/* The sunxi internal brom will try to loader external bootloader
diff --git a/arch/arm/mach-sunxi/dram_sun9i.c b/arch/arm/mach-sunxi/dram_sun9i.c
index 8c681f35413..e7d423f861e 100644
--- a/arch/arm/mach-sunxi/dram_sun9i.c
+++ b/arch/arm/mach-sunxi/dram_sun9i.c
@@ -20,8 +20,6 @@
#include <asm/arch/dram.h>
#include <asm/arch/sys_proto.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#define DRAM_CLK (CONFIG_DRAM_CLK * 1000000)
/*
diff --git a/arch/arm/mach-tegra/board186.c b/arch/arm/mach-tegra/board186.c
index 691c3fd98da..9e95123c55c 100644
--- a/arch/arm/mach-tegra/board186.c
+++ b/arch/arm/mach-tegra/board186.c
@@ -7,8 +7,6 @@
#include <common.h>
#include <asm/arch/tegra.h>
-DECLARE_GLOBAL_DATA_PTR;
-
int board_early_init_f(void)
{
return 0;
diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/tegra186/nvtboot_board.c
index 8ecb4544434..bef3ce8fc83 100644
--- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c
+++ b/arch/arm/mach-tegra/tegra186/nvtboot_board.c
@@ -11,8 +11,6 @@
#include <asm/arch/tegra.h>
#include <asm/armv8/mmu.h>
-DECLARE_GLOBAL_DATA_PTR;
-
extern unsigned long nvtboot_boot_x0;
/*
diff --git a/arch/arm/mach-zynq/ddrc.c b/arch/arm/mach-zynq/ddrc.c
index 047a7b4d9c2..795e2bd003f 100644
--- a/arch/arm/mach-zynq/ddrc.c
+++ b/arch/arm/mach-zynq/ddrc.c
@@ -10,8 +10,6 @@
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#ifndef CONFIG_ZYNQ_DDRC_INIT
void zynq_ddrc_init(void) {}
#else
diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c
index 0a303f41ebd..d1e61aab116 100644
--- a/arch/arm/mach-zynq/spl.c
+++ b/arch/arm/mach-zynq/spl.c
@@ -13,8 +13,6 @@
#include <asm/arch/sys_proto.h>
#include <asm/arch/ps7_init_gpl.h>
-DECLARE_GLOBAL_DATA_PTR;
-
void board_init_f(ulong dummy)
{
ps7_init();