diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/Makefile | 3 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-mini-emmc0.dts (renamed from arch/arm/dts/zynqmp-mini-emmc.dts) | 20 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-mini-emmc1.dts | 67 |
3 files changed, 75 insertions, 15 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 078c21b401..493652ea8c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -147,7 +147,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-zturn.dtb \ zynq-zybo.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += \ - zynqmp-mini-emmc.dtb \ + zynqmp-mini-emmc0.dtb \ + zynqmp-mini-emmc1.dtb \ zynqmp-mini-nand.dtb \ zynqmp-zcu100-revC.dtb \ zynqmp-zcu102-revA.dtb \ diff --git a/arch/arm/dts/zynqmp-mini-emmc.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts index e5b3c5fc78..24dd1ab9df 100644 --- a/arch/arm/dts/zynqmp-mini-emmc.dts +++ b/arch/arm/dts/zynqmp-mini-emmc0.dts @@ -18,7 +18,6 @@ aliases { serial0 = &dcc; mmc0 = &sdhci0; - mmc1 = &sdhci1; }; chosen { @@ -36,6 +35,12 @@ u-boot,dm-pre-reloc; }; + clk_xin: clk_xin { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + amba: amba { compatible = "simple-bus"; #address-cells = <2>; @@ -50,15 +55,6 @@ clock-names = "clk_xin", "clk_ahb"; xlnx,device_id = <0>; }; - - sdhci1: sdhci@ff170000 { - u-boot,dm-pre-reloc; - compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; - status = "disabled"; - reg = <0x0 0xff170000 0x0 0x1000>; - clock-names = "clk_xin", "clk_ahb"; - xlnx,device_id = <1>; - }; }; }; @@ -69,7 +65,3 @@ &sdhci0 { status = "okay"; }; - -&sdhci1 { - status = "okay"; -}; diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts new file mode 100644 index 0000000000..d1549b6dc6 --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-emmc1.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Xilinx ZynqMP Mini Configuration + * + * (C) Copyright 2018, Xilinx, Inc. + * + * Siva Durga Prasad <siva.durga.paladugu@xilinx.com> + */ + +/dts-v1/; + +/ { + model = "ZynqMP MINI EMMC"; + compatible = "xlnx,zynqmp"; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &dcc; + mmc0 = &sdhci1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x20000000>; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "disabled"; + u-boot,dm-pre-reloc; + }; + + clk_xin: clk_xin { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + amba: amba { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + sdhci1: sdhci@ff170000 { + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; + status = "disabled"; + reg = <0x0 0xff170000 0x0 0x1000>; + clock-names = "clk_xin", "clk_xin"; + xlnx,device_id = <1>; + }; + }; +}; + +&dcc { + status = "okay"; +}; + +&sdhci1 { + status = "okay"; +}; |