diff options
Diffstat (limited to 'arch/arm')
48 files changed, 640 insertions, 509 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 376851ef7a..a047552ed3 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -169,7 +169,7 @@ config ARM_ERRATA_833471 bool config ARM_ERRATA_845369 - bool + bool config ARM_ERRATA_852421 bool @@ -219,25 +219,25 @@ config CPU_ARM1176 config CPU_V7A bool - select HAS_VBAR select HAS_THUMB2 + select HAS_VBAR select SYS_CACHE_SHIFT_6 imply SYS_ARM_MMU config CPU_V7M bool select HAS_THUMB2 - select THUMB2_KERNEL - select SYS_CACHE_SHIFT_5 select SYS_ARM_MPU + select SYS_CACHE_SHIFT_5 select SYS_THUMB_BUILD + select THUMB2_KERNEL config CPU_V7R bool select HAS_THUMB2 - select SYS_CACHE_SHIFT_6 - select SYS_ARM_MPU select SYS_ARM_CACHE_CP15 + select SYS_ARM_MPU + select SYS_CACHE_SHIFT_6 config CPU_PXA bool @@ -427,20 +427,21 @@ config ARCH_DAVINCI config KIRKWOOD bool "Marvell Kirkwood" - select CPU_ARM926EJS - select BOARD_EARLY_INIT_F select ARCH_MISC_INIT + select BOARD_EARLY_INIT_F + select CPU_ARM926EJS config ARCH_MVEBU bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)" - select OF_CONTROL - select OF_SEPARATE select DM select DM_ETH select DM_SERIAL select DM_SPI select DM_SPI_FLASH + select OF_CONTROL + select OF_SEPARATE select SPI + imply CMD_DM config TARGET_DEVKIT3250 bool "Support devkit3250" @@ -463,31 +464,31 @@ config ORION5X config TARGET_SPEAR300 bool "Support spear300" - select CPU_ARM926EJS select BOARD_EARLY_INIT_F - imply CMD_SAVES + select CPU_ARM926EJS select PL011_SERIAL + imply CMD_SAVES config TARGET_SPEAR310 bool "Support spear310" - select CPU_ARM926EJS select BOARD_EARLY_INIT_F - imply CMD_SAVES + select CPU_ARM926EJS select PL011_SERIAL + imply CMD_SAVES config TARGET_SPEAR320 bool "Support spear320" - select CPU_ARM926EJS select BOARD_EARLY_INIT_F - imply CMD_SAVES + select CPU_ARM926EJS select PL011_SERIAL + imply CMD_SAVES config TARGET_SPEAR600 bool "Support spear600" - select CPU_ARM926EJS select BOARD_EARLY_INIT_F - imply CMD_SAVES + select CPU_ARM926EJS select PL011_SERIAL + imply CMD_SAVES config TARGET_STV0991 bool "Support stv0991" @@ -496,16 +497,17 @@ config TARGET_STV0991 select DM_SERIAL select DM_SPI select DM_SPI_FLASH + select PL01X_SERIAL select SPI select SPI_FLASH - select PL01X_SERIAL + imply CMD_DM config TARGET_X600 bool "Support x600" select BOARD_LATE_INIT select CPU_ARM926EJS - select SUPPORT_SPL select PL011_SERIAL + select SUPPORT_SPL config TARGET_WOODBURN bool "Support woodburn" @@ -528,11 +530,12 @@ config TARGET_MX35PDK config ARCH_BCM283X bool "Broadcom BCM283X family" select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL select OF_CONTROL select PL01X_SERIAL select SERIAL_SEARCH_ALL + imply CMD_DM imply FAT_WRITE config TARGET_VEXPRESS_CA15_TC2 @@ -548,6 +551,7 @@ config ARCH_BCMSTB select DM select OF_CONTROL select OF_PRIOR_STAGE + imply CMD_DM help This enables support for Broadcom ARM-based set-top box chipsets, including the 7445 family of chips. @@ -577,13 +581,13 @@ config TARGET_BCM28155_AP config TARGET_BCMCYGNUS bool "Support bcmcygnus" select CPU_V7A - imply CRC32_VERIFY + imply BCM_SF2_ETH + imply BCM_SF2_ETH_GMAC imply CMD_HASH + imply CRC32_VERIFY imply FAT_WRITE imply HASH_VERIFY imply NETDEVICES - imply BCM_SF2_ETH - imply BCM_SF2_ETH_GMAC config TARGET_BCMNSP bool "Support bcmnsp" @@ -600,22 +604,24 @@ config TARGET_BCMNS2 config ARCH_EXYNOS bool "Samsung EXYNOS" select DM + select DM_GPIO select DM_I2C - select DM_SPI_FLASH + select DM_KEYBOARD select DM_SERIAL select DM_SPI - select DM_GPIO - select DM_KEYBOARD + select DM_SPI_FLASH select SPI + imply CMD_DM imply FAT_WRITE config ARCH_S5PC1XX bool "Samsung S5PC1XX" select CPU_V7A select DM - select DM_SERIAL select DM_GPIO select DM_I2C + select DM_SERIAL + imply CMD_DM config ARCH_HIGHBANK bool "Calxeda Highbank" @@ -627,17 +633,18 @@ config ARCH_INTEGRATOR select DM select DM_SERIAL select PL01X_SERIAL + imply CMD_DM config ARCH_KEYSTONE bool "TI Keystone" + select CMD_POWEROFF select CPU_V7A select SUPPORT_SPL - select SYS_THUMB_BUILD - select CMD_POWEROFF select SYS_ARCH_TIMER + select SYS_THUMB_BUILD imply CMD_MTDPARTS - imply FIT imply CMD_SAVES + imply FIT config ARCH_OMAP2PLUS bool "TI OMAP2+" @@ -660,6 +667,7 @@ config ARCH_MX8M select ARM64 select DM select SUPPORT_SPL + imply CMD_DM config ARCH_MX23 bool "NXP i.MX23 family" @@ -683,19 +691,19 @@ config ARCH_MX31 select CPU_ARM1136 config ARCH_MX7ULP - bool "NXP MX7ULP" + bool "NXP MX7ULP" select CPU_V7A select ROM_UNIFIED_SECTIONS imply MXC_GPIO config ARCH_MX7 bool "Freescale MX7" + select ARCH_MISC_INIT + select BOARD_EARLY_INIT_F select CPU_V7A select SYS_FSL_HAS_SEC if SECURE_BOOT select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_LE - select BOARD_EARLY_INIT_F - select ARCH_MISC_INIT imply MXC_GPIO config ARCH_MX6 @@ -709,13 +717,13 @@ config ARCH_MX6 if ARCH_MX6 config SPL_LDSCRIPT - default "arch/arm/mach-omap2/u-boot-spl.lds" + default "arch/arm/mach-omap2/u-boot-spl.lds" endif config ARCH_MX5 bool "Freescale MX5" - select CPU_V7A select BOARD_EARLY_INIT_F + select CPU_V7A imply MXC_GPIO config ARCH_OWL @@ -724,6 +732,7 @@ config ARCH_OWL select DM select DM_SERIAL select OF_CONTROL + imply CMD_DM config ARCH_QEMU bool "QEMU Virtual Platform" @@ -731,12 +740,14 @@ config ARCH_QEMU select DM_SERIAL select OF_CONTROL select PL01X_SERIAL + imply CMD_DM config ARCH_RMOBILE bool "Renesas ARM SoCs" + select BOARD_EARLY_INIT_F select DM select DM_SERIAL - select BOARD_EARLY_INIT_F + imply CMD_DM imply FAT_WRITE imply SYS_THUMB_BUILD @@ -751,30 +762,33 @@ config ARCH_SNAPDRAGON select DM select DM_GPIO select DM_SERIAL - select SPMI + select MSM_SMEM select OF_CONTROL select OF_SEPARATE select SMEM - select MSM_SMEM + select SPMI + imply CMD_DM config ARCH_SOCFPGA bool "Altera SOCFPGA family" select ARCH_EARLY_INIT_R select ARCH_MISC_INIT + select ARM64 if TARGET_SOCFPGA_STRATIX10 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 select DM select DM_SERIAL select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 select OF_CONTROL + select SPL_DM_RESET if DM_RESET + select SPL_DM_SERIAL select SPL_LIBCOMMON_SUPPORT select SPL_LIBDISK_SUPPORT select SPL_LIBGENERIC_SUPPORT select SPL_MMC_SUPPORT if DM_MMC select SPL_NAND_SUPPORT if SPL_NAND_DENALI select SPL_OF_CONTROL + select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 select SPL_SERIAL_SUPPORT - select SPL_DM_SERIAL - select SPL_RESET_SUPPORT select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT select SPL_SPI_SUPPORT if DM_SPI select SPL_WATCHDOG_SUPPORT @@ -782,14 +796,13 @@ config ARCH_SOCFPGA select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE select SYS_NS16550 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 - select ARM64 if TARGET_SOCFPGA_STRATIX10 + imply CMD_DM imply CMD_MTDPARTS imply CRC32_VERIFY imply DM_SPI imply DM_SPI_FLASH imply FAT_WRITE imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION - select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 config ARCH_SUNXI bool "Support sunxi (Allwinner) SoCs" @@ -809,13 +822,14 @@ config ARCH_SUNXI select SPECIFY_CONSOLE_INDEX select SPL_STACK_R if SPL select SPL_SYS_MALLOC_SIMPLE if SPL - select SYS_NS16550 select SPL_SYS_THUMB_BUILD if !ARM64 + select SYS_NS16550 select SYS_THUMB_BUILD if !ARM64 select USB if DISTRO_DEFAULTS - select USB_STORAGE if DISTRO_DEFAULTS select USB_KEYBOARD if DISTRO_DEFAULTS + select USB_STORAGE if DISTRO_DEFAULTS select USE_TINY_PRINTF + imply CMD_DM imply CMD_GPT imply DISTRO_DEFAULTS imply FAT_WRITE @@ -839,51 +853,54 @@ config ARCH_VF610 config ARCH_ZYNQ bool "Xilinx Zynq based platform" + select BOARD_EARLY_INIT_F if WDT select BOARD_LATE_INIT + select CLK + select CLK_ZYNQ select CPU_V7A - select SUPPORT_SPL - select OF_CONTROL - select SPL_BOARD_INIT if SPL - select BOARD_EARLY_INIT_F if WDT - select SPL_OF_CONTROL if SPL select DM select DM_ETH if NET - select SPL_DM if SPL select DM_MMC if MMC - select DM_SPI select DM_SERIAL + select DM_SPI select DM_SPI_FLASH - select SPL_SEPARATE_BSS if SPL select DM_USB if USB - select CLK - select SPL_CLK if SPL - select CLK_ZYNQ + select OF_CONTROL select SPI + select SPL_BOARD_INIT if SPL + select SPL_CLK if SPL + select SPL_DM if SPL + select SPL_OF_CONTROL if SPL + select SPL_SEPARATE_BSS if SPL + select SUPPORT_SPL + imply ARCH_EARLY_INIT_R imply CMD_CLK - imply FAT_WRITE + imply CMD_DM imply CMD_SPL - imply ARCH_EARLY_INIT_R + imply FAT_WRITE config ARCH_ZYNQMP_R5 bool "Xilinx ZynqMP R5 based platform" + select CLK select CPU_V7R - select OF_CONTROL select DM select DM_SERIAL - select CLK + select OF_CONTROL + imply CMD_DM config ARCH_ZYNQMP bool "Xilinx ZynqMP based platform" select ARM64 select BOARD_LATE_INIT + select CLK select DM - select OF_CONTROL select DM_SERIAL - select SUPPORT_SPL - select CLK + select DM_USB if USB + select OF_CONTROL select SPL_BOARD_INIT if SPL select SPL_CLK if SPL - select DM_USB if USB + select SUPPORT_SPL + imply CMD_DM imply FAT_WRITE config TEGRA @@ -899,8 +916,8 @@ config TARGET_VEXPRESS64_AEMV8A config TARGET_VEXPRESS64_BASE_FVP bool "Support Versatile Express ARMv8a FVP BASE model" select ARM64 - select SEMIHOSTING select PL01X_SERIAL + select SEMIHOSTING config TARGET_VEXPRESS64_BASE_FVP_DRAM bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM" @@ -920,9 +937,9 @@ config TARGET_VEXPRESS64_JUNO config TARGET_LS2080A_EMU bool "Support ls2080a_emu" select ARCH_LS2080A + select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY - select ARCH_MISC_INIT help Support for Freescale LS2080A_EMU platform The LS2080A Development System (EMULATOR) is a pre silicon @@ -932,9 +949,9 @@ config TARGET_LS2080A_EMU config TARGET_LS2080A_SIMU bool "Support ls2080a_simu" select ARCH_LS2080A + select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY - select ARCH_MISC_INIT help Support for Freescale LS2080A_SIMU platform The LS2080A Development System (QDS) is a pre silicon @@ -944,9 +961,9 @@ config TARGET_LS2080A_SIMU config TARGET_LS1088AQDS bool "Support ls1088aqds" select ARCH_LS1088A + select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY - select ARCH_MISC_INIT select BOARD_LATE_INIT select SUPPORT_SPL help @@ -958,11 +975,11 @@ config TARGET_LS1088AQDS config TARGET_LS2080AQDS bool "Support ls2080aqds" select ARCH_LS2080A + select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL - select ARCH_MISC_INIT imply SCSI imply SCSI_AHCI help @@ -974,11 +991,11 @@ config TARGET_LS2080AQDS config TARGET_LS2080ARDB bool "Support ls2080ardb" select ARCH_LS2080A + select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL - select ARCH_MISC_INIT imply SCSI imply SCSI_AHCI help @@ -990,11 +1007,11 @@ config TARGET_LS2080ARDB config TARGET_LS2081ARDB bool "Support ls2081ardb" select ARCH_LS2080A + select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL - select ARCH_MISC_INIT help Support for Freescale LS2081ARDB platform. The LS2081A Reference design board (RDB) is a high-performance @@ -1010,6 +1027,7 @@ config TARGET_HIKEY select OF_CONTROL select PL01X_SERIAL select SPECIFY_CONSOLE_INDEX + imply CMD_DM help Support for HiKey 96boards platform. It features a HI6220 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM. @@ -1018,10 +1036,11 @@ config TARGET_POPLAR bool "Support Poplar 96boards Enterprise Edition Platform" select ARM64 select DM - select OF_CONTROL select DM_SERIAL select DM_USB + select OF_CONTROL select PL01X_SERIAL + imply CMD_DM help Support for Poplar 96boards EE platform. It features a HI3798cv200 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU @@ -1067,8 +1086,8 @@ config TARGET_LS1012A2G5RDB config TARGET_LS1012AFRWY bool "Support ls1012afrwy" select ARCH_LS1012A - select BOARD_LATE_INIT select ARM64 + select BOARD_LATE_INIT imply SCSI imply SCSI_AHCI help @@ -1090,9 +1109,9 @@ config TARGET_LS1012AFRDM config TARGET_LS1088ARDB bool "Support ls1088ardb" select ARCH_LS1088A + select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY - select ARCH_MISC_INIT select BOARD_LATE_INIT select SUPPORT_SPL help @@ -1103,40 +1122,40 @@ config TARGET_LS1088ARDB config TARGET_LS1021AQDS bool "Support ls1021aqds" + select ARCH_LS1021A + select ARCH_SUPPORT_PSCI + select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select CPU_V7A select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT - select SUPPORT_SPL - select ARCH_LS1021A - select ARCH_SUPPORT_PSCI select LS1_DEEP_SLEEP + select SUPPORT_SPL select SYS_FSL_DDR - select BOARD_EARLY_INIT_F imply SCSI config TARGET_LS1021ATWR bool "Support ls1021atwr" + select ARCH_LS1021A + select ARCH_SUPPORT_PSCI + select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select CPU_V7A select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT - select SUPPORT_SPL - select ARCH_LS1021A - select ARCH_SUPPORT_PSCI select LS1_DEEP_SLEEP - select BOARD_EARLY_INIT_F + select SUPPORT_SPL imply SCSI config TARGET_LS1021AIOT bool "Support ls1021aiot" + select ARCH_LS1021A + select ARCH_SUPPORT_PSCI select BOARD_LATE_INIT select CPU_V7A select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select SUPPORT_SPL - select ARCH_LS1021A - select ARCH_SUPPORT_PSCI imply SCSI help Support for Freescale LS1021AIOT platform. @@ -1149,9 +1168,9 @@ config TARGET_LS1043AQDS select ARCH_LS1043A select ARM64 select ARMV8_MULTIENTRY + select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select SUPPORT_SPL - select BOARD_EARLY_INIT_F imply SCSI help Support for Freescale LS1043AQDS platform. @@ -1161,9 +1180,9 @@ config TARGET_LS1043ARDB select ARCH_LS1043A select ARM64 select ARMV8_MULTIENTRY + select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select SUPPORT_SPL - select BOARD_EARLY_INIT_F imply SCSI help Support for Freescale LS1043ARDB platform. @@ -1173,10 +1192,10 @@ config TARGET_LS1046AQDS select ARCH_LS1046A select ARM64 select ARMV8_MULTIENTRY + select BOARD_EARLY_INIT_F select BOARD_LATE_INIT - select SUPPORT_SPL select DM_SPI_FLASH if DM_SPI - select BOARD_EARLY_INIT_F + select SUPPORT_SPL imply SCSI help Support for Freescale LS1046AQDS platform. @@ -1189,11 +1208,11 @@ config TARGET_LS1046ARDB select ARCH_LS1046A select ARM64 select ARMV8_MULTIENTRY + select BOARD_EARLY_INIT_F select BOARD_LATE_INIT - select SUPPORT_SPL select DM_SPI_FLASH if DM_SPI select POWER_MC34VR500 - select BOARD_EARLY_INIT_F + select SUPPORT_SPL imply SCSI help Support for Freescale LS1046ARDB platform. @@ -1223,6 +1242,7 @@ config ARCH_UNIPHIER select DM_RESET select DM_SERIAL select DM_USB + select OF_BOARD_SETUP select OF_CONTROL select OF_LIBFDT select PINCTRL @@ -1233,6 +1253,8 @@ config ARCH_UNIPHIER select SPL_OF_CONTROL if SPL select SPL_PINCTRL if SPL select SUPPORT_SPL + imply CMD_DM + imply DISTRO_DEFAULTS imply FAT_WRITE help Support for UniPhier SoC family developed by Socionext Inc. @@ -1244,15 +1266,17 @@ config STM32 select DM select DM_SERIAL select SYS_THUMB_BUILD + imply CMD_DM config ARCH_STI bool "Support STMicrolectronics SoCs" + select BLK select CPU_V7A select DM - select DM_SERIAL - select BLK select DM_MMC select DM_RESET + select DM_SERIAL + imply CMD_DM help Support for STMicroelectronics STiH407/10 SoC family. This SoC is used on Linaro 96Board STiH410-B2260 @@ -1266,15 +1290,16 @@ config ARCH_STM32MP select DM_GPIO select DM_RESET select DM_SERIAL + select MISC select OF_CONTROL select OF_LIBFDT - select MISC select PINCTRL select REGMAP select SUPPORT_SPL select SYSCON select SYSRESET select SYS_THUMB_BUILD + imply CMD_DM help Support for STM32MP SoC family developed by STMicroelectronics, MPUs based on ARM cortex A core @@ -1283,44 +1308,46 @@ config ARCH_STM32MP config ARCH_ROCKCHIP bool "Support Rockchip SoCs" - select OF_CONTROL select BLK select DM - select SPL_DM if SPL - select SYS_MALLOC_F - select SYS_THUMB_BUILD if !ARM64 - select SPL_SYS_MALLOC_SIMPLE if SPL select DM_GPIO select DM_I2C select DM_MMC + select DM_PWM + select DM_REGULATOR select DM_SERIAL select DM_SPI select DM_SPI_FLASH select DM_USB if USB - select DM_PWM - select DM_REGULATOR select ENABLE_ARM_SOC_BOOT0_HOOK + select OF_CONTROL select SPI + select SPL_DM if SPL + select SPL_SYS_MALLOC_SIMPLE if SPL + select SYS_MALLOC_F + select SYS_THUMB_BUILD if !ARM64 + imply ADC + imply CMD_DM imply DISTRO_DEFAULTS imply FAT_WRITE - imply USB_FUNCTION_FASTBOOT - imply SPL_SYSRESET - imply TPL_SYSRESET - imply ADC imply SARADC_ROCKCHIP + imply SPL_SYSRESET imply SYS_NS16550 + imply TPL_SYSRESET + imply USB_FUNCTION_FASTBOOT config TARGET_THUNDERX_88XX bool "Support ThunderX 88xx" select ARM64 select OF_CONTROL - select SYS_CACHE_SHIFT_7 select PL01X_SERIAL + select SYS_CACHE_SHIFT_7 config ARCH_ASPEED bool "Support Aspeed SoCs" - select OF_CONTROL select DM + select OF_CONTROL + imply CMD_DM endchoice @@ -1486,8 +1513,8 @@ source "arch/arm/Kconfig.debug" endmenu config SPL_LDSCRIPT - default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK - default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136 + default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK + default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64 diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 635358e328..5d6a711c14 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -1,5 +1,7 @@ config ARCH_LS1021A bool + select SYS_FSL_DDR_BE if SYS_FSL_DDR + select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR select SYS_FSL_ERRATUM_A008378 select SYS_FSL_ERRATUM_A008407 select SYS_FSL_ERRATUM_A008997 @@ -10,18 +12,16 @@ config ARCH_LS1021A select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_A010315 select SYS_FSL_HAS_CCI400 - select SYS_FSL_SRDS_1 - select SYS_HAS_SERDES - select SYS_FSL_DDR_BE if SYS_FSL_DDR - select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR select SYS_FSL_HAS_DDR3 if SYS_FSL_DDR select SYS_FSL_HAS_DDR4 if SYS_FSL_DDR select SYS_FSL_HAS_SEC select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_LE + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES + imply CMD_PCI imply SCSI imply SCSI_AHCI - imply CMD_PCI menu "LS102xA architecture" depends on ARCH_LS1021A diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 22d2f29548..741e15c773 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -44,8 +44,8 @@ config ARMV8_SPIN_TABLE menu "ARMv8 secure monitor firmware" config ARMV8_SEC_FIRMWARE_SUPPORT bool "Enable ARMv8 secure monitor firmware framework support" - select OF_LIBFDT select FIT + select OF_LIBFDT help This framework is aimed at making secure monitor firmware load process brief. @@ -60,8 +60,8 @@ config ARMV8_SEC_FIRMWARE_SUPPORT config SPL_ARMV8_SEC_FIRMWARE_SUPPORT bool "Enable ARMv8 secure monitor firmware framework support for SPL" - select SPL_OF_LIBFDT select SPL_FIT + select SPL_OF_LIBFDT help Say Y here to support this framework in SPL phase. diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 40c2c3a1cf..052e0708d4 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -9,6 +9,7 @@ #include <asm/io.h> #include <linux/errno.h> #include <asm/system.h> +#include <fm_eth.h> #include <asm/armv8/mmu.h> #include <asm/io.h> #include <asm/arch/fsl_serdes.h> @@ -18,7 +19,6 @@ #include <fsl_immap.h> #include <asm/arch/mp.h> #include <efi_loader.h> -#include <fm_eth.h> #include <fsl-mc/fsl_mc.h> #ifdef CONFIG_FSL_ESDHC #include <fsl_esdhc.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon index a00b5bc9c3..7dae9f03c3 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon +++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon @@ -129,6 +129,16 @@ Example: The "loadables" is not optional. It tells SPL which images to load into memory. +Falcon mode with QSPI boot +-------------------------- +To use falcon mode with QSPI boot, SPL needs to be enabled. Similar to SD or +NAND boot, a RAM version full feature U-Boot is needed. Unlike SD or NAND boot, +SPL with QSPI doesn't need to combine SPL image with RAM version image. Two +separated images are used, u-boot-spl.pbl and u-boot.img. The former is SPL +image with RCW and PBI commands to load the SPL payload into On-Chip RAM. The +latter is RAM version U-Boot in FIT format (or legacy format if FIT is not +used). + Other things to consider ----------------------- Falcon boot skips a lot of initialization in U-Boot. If Linux expects the diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index bfd663942a..8028d5228f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -6,8 +6,6 @@ #include <common.h> #include <fsl_immap.h> #include <fsl_ifc.h> -#include <ahci.h> -#include <scsi.h> #include <asm/arch/fsl_serdes.h> #include <asm/arch/soc.h> #include <asm/io.h> @@ -330,36 +328,6 @@ void fsl_lsch3_early_init_f(void) #endif } -#ifdef CONFIG_SCSI_AHCI_PLAT -int sata_init(void) -{ - struct ccsr_ahci __iomem *ccsr_ahci; - -#ifdef CONFIG_SYS_SATA2 - ccsr_ahci = (void *)CONFIG_SYS_SATA2; - out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); - out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG); - out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG); - out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); - out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG); -#endif - -#ifdef CONFIG_SYS_SATA1 - ccsr_ahci = (void *)CONFIG_SYS_SATA1; - out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); - out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG); - out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG); - out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); - out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG); - - ahci_init((void __iomem *)CONFIG_SYS_SATA1); - scsi_scan(false); -#endif - - return 0; -} -#endif - /* Get VDD in the unit mV from voltage ID */ int get_core_volt_from_fuse(void) { @@ -400,25 +368,6 @@ int get_core_volt_from_fuse(void) } #elif defined(CONFIG_FSL_LSCH2) -#ifdef CONFIG_SCSI_AHCI_PLAT -int sata_init(void) -{ - struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA; - - /* Disable SATA ECC */ - out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x80000000); - out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); - out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG); - out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG); - out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); - out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG); - - ahci_init((void __iomem *)CONFIG_SYS_SATA); - scsi_scan(false); - - return 0; -} -#endif static void erratum_a009929(void) { @@ -719,9 +668,6 @@ int qspi_ahb_init(void) #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { -#ifdef CONFIG_SCSI_AHCI_PLAT - sata_init(); -#endif #ifdef CONFIG_CHAIN_OF_TRUST fsl_setenv_chain_of_trust(); #endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index dba4b40607..3e53084b21 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -11,6 +11,7 @@ #include <fsl_csu.h> #include <asm/arch/fdt.h> #include <asm/arch/ppa.h> +#include <asm/arch/soc.h> DECLARE_GLOBAL_DATA_PTR; @@ -22,6 +23,9 @@ u32 spl_boot_device(void) #ifdef CONFIG_SPL_NAND_SUPPORT return BOOT_DEVICE_NAND; #endif +#ifdef CONFIG_QSPI_BOOT + return BOOT_DEVICE_NOR; +#endif return 0; } @@ -52,6 +56,7 @@ void spl_board_init(void) void board_init_f(ulong dummy) { + icache_enable(); /* Clear global data */ memset((void *)gd, 0, sizeof(gd_t)); board_early_init_f(); @@ -101,6 +106,9 @@ void board_init_f(ulong dummy) gd->arch.tlb_addr = (gd->ram_top - gd->arch.tlb_size) & ~(0x10000 - 1); gd->arch.tlb_allocated = gd->arch.tlb_addr; #endif /* CONFIG_SPL_FSL_LS_PPA */ +#if defined(CONFIG_QSPI_AHB_INIT) && defined(CONFIG_QSPI_BOOT) + qspi_ahb_init(); +#endif } #ifdef CONFIG_SPL_OS_BOOT diff --git a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts index db23cf87ed..cdd4ce45aa 100644 --- a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts +++ b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts @@ -40,3 +40,7 @@ &duart0 { status = "okay"; }; + +&sata { + status = "okay"; +}; diff --git a/arch/arm/dts/fsl-ls1012a-qds.dtsi b/arch/arm/dts/fsl-ls1012a-qds.dtsi index d069b603ab..661af0e49e 100644 --- a/arch/arm/dts/fsl-ls1012a-qds.dtsi +++ b/arch/arm/dts/fsl-ls1012a-qds.dtsi @@ -125,3 +125,7 @@ status = "okay"; phy_type = "ulpi"; }; + +&sata { + status = "okay"; +}; diff --git a/arch/arm/dts/fsl-ls1012a-rdb.dtsi b/arch/arm/dts/fsl-ls1012a-rdb.dtsi index 201e5faead..757e2eb351 100644 --- a/arch/arm/dts/fsl-ls1012a-rdb.dtsi +++ b/arch/arm/dts/fsl-ls1012a-rdb.dtsi @@ -34,3 +34,7 @@ &duart0 { status = "okay"; }; + +&sata { + status = "okay"; +}; diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi index be99076550..f22cbf4b2a 100644 --- a/arch/arm/dts/fsl-ls1012a.dtsi +++ b/arch/arm/dts/fsl-ls1012a.dtsi @@ -134,6 +134,14 @@ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ }; + sata: sata@3200000 { + compatible = "fsl,ls1012a-ahci"; + reg = <0x0 0x3200000 0x0 0x10000>; + interrupts = <0 69 4>; + clocks = <&clockgen 4 0>; + status = "disabled"; + }; + usb0: usb2@8600000 { compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; reg = <0x0 0x8600000 0x0 0x1000>; diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi index b51febda9c..2f935a21e9 100644 --- a/arch/arm/dts/socfpga_arria10.dtsi +++ b/arch/arm/dts/socfpga_arria10.dtsi @@ -637,8 +637,8 @@ #address-cells = <1>; #size-cells = <1>; compatible = "denali,denali-nand-dt", "altr,socfpga-denali-nand"; - reg = <0xffb90000 0x72000>, - <0xffb80000 0x10000>; + reg = <0xffb90000 0x20>, + <0xffb80000 0x1000>; reg-names = "nand_data", "denali_reg"; interrupts = <0 99 4>; dma-mask = <0xffffffff>; diff --git a/arch/arm/dts/tegra30-apalis.dts b/arch/arm/dts/tegra30-apalis.dts index 0852d8dc53..1a9ce2720a 100644 --- a/arch/arm/dts/tegra30-apalis.dts +++ b/arch/arm/dts/tegra30-apalis.dts @@ -119,9 +119,6 @@ vccio-supply = <&sys_3v3_reg>; regulators { - #address-cells = <1>; - #size-cells = <0>; - /* SW1: +V1.35_VDDIO_DDR */ vdd1_reg: vdd1 { regulator-name = "vddio_ddr_1v35"; diff --git a/arch/arm/dts/tegra30-beaver.dts b/arch/arm/dts/tegra30-beaver.dts index c1a15bb4b3..f5fbbe849e 100644 --- a/arch/arm/dts/tegra30-beaver.dts +++ b/arch/arm/dts/tegra30-beaver.dts @@ -102,9 +102,6 @@ vccio-supply = <&vdd_5v_in_reg>; regulators { - #address-cells = <1>; - #size-cells = <0>; - vdd1_reg: vdd1 { regulator-name = "vddio_ddr_1v2"; regulator-min-microvolt = <1200000>; diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 9a219a6a1d..61b6e4bf07 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -85,39 +85,7 @@ struct cpu_type { #define SVR_DEV(svr) ((svr) >> 8) #define IS_SVR_DEV(svr, dev) (((svr) >> 16) == (dev)) -/* ahci port register default value */ -#define AHCI_PORT_PHY_1_CFG 0xa003fffe -#define AHCI_PORT_PHY2_CFG 0x28184d1f -#define AHCI_PORT_PHY3_CFG 0x0e081509 -#define AHCI_PORT_TRANS_CFG 0x08000029 -#define AHCI_PORT_AXICC_CFG 0x3fffffff - #ifndef __ASSEMBLY__ -/* AHCI (sata) register map */ -struct ccsr_ahci { - u32 res1[0xa4/4]; /* 0x0 - 0xa4 */ - u32 pcfg; /* port config */ - u32 ppcfg; /* port phy1 config */ - u32 pp2c; /* port phy2 config */ - u32 pp3c; /* port phy3 config */ - u32 pp4c; /* port phy4 config */ - u32 pp5c; /* port phy5 config */ - u32 axicc; /* AXI cache control */ - u32 paxic; /* port AXI config */ - u32 axipc; /* AXI PROT control */ - u32 ptc; /* port Trans Config */ - u32 pts; /* port Trans Status */ - u32 plc; /* port link config */ - u32 plc1; /* port link config1 */ - u32 plc2; /* port link config2 */ - u32 pls; /* port link status */ - u32 pls1; /* port link status1 */ - u32 pcmdc; /* port CMD config */ - u32 ppcs; /* port phy control status */ - u32 pberr; /* port 0/1 BIST error */ - u32 cmds; /* port 0/1 CMD status error */ -}; - #ifdef CONFIG_FSL_LSCH3 void fsl_lsch3_early_init_f(void); int get_core_volt_from_fuse(void); @@ -130,6 +98,9 @@ int board_setup_core_volt(u32 vdd); void init_pfe_scfg_dcfg_regs(void); #endif #endif +#ifdef CONFIG_QSPI_AHB_INIT +int qspi_ahb_init(void); +#endif void cpu_name(char *name); #ifdef CONFIG_SYS_FSL_ERRATUM_A009635 diff --git a/arch/arm/include/asm/arch-tegra124/flow.h b/arch/arm/include/asm/arch-tegra124/flow.h index a54425692b..62947bf99c 100644 --- a/arch/arm/include/asm/arch-tegra124/flow.h +++ b/arch/arm/include/asm/arch-tegra124/flow.h @@ -29,7 +29,7 @@ struct flow_ctlr { u32 flow_dbg_cnt0; /* offset 0x48 */ u32 flow_dbg_cnt1; /* offset 0x4c */ u32 flow_dbg_qual; /* offset 0x50 */ - u32 flow_ctlr_spare; /* offset 0x54 */ + u32 flow_ctrl_spare; /* offset 0x54 */ u32 ram_repair_cluster1;/* offset 0x58 */ }; @@ -48,10 +48,8 @@ struct flow_ctlr { #define CSR_WAIT_WFI_SHIFT 8 #define CSR_PWR_OFF_STS (1 << 16) -/* RAM_REPAIR, 0x40, 0x58 */ -enum { - RAM_REPAIR_REQ = 0x1 << 0, - RAM_REPAIR_STS = 0x1 << 1, -}; +#define RAM_REPAIR_REQ BIT(0) +#define RAM_REPAIR_STS BIT(1) +#define RAM_REPAIR_BYPASS_EN BIT(2) #endif /* _TEGRA124_FLOW_H_ */ diff --git a/arch/arm/include/asm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h index 71df5a9e25..183b00a087 100644 --- a/arch/arm/include/asm/proc-armv/ptrace.h +++ b/arch/arm/include/asm/proc-armv/ptrace.h @@ -37,6 +37,7 @@ struct pt_regs { #define FIQ_MODE 0x11 #define IRQ_MODE 0x12 #define SVC_MODE 0x13 +#define MON_MODE 0x16 #define ABT_MODE 0x17 #define HYP_MODE 0x1a #define UND_MODE 0x1b diff --git a/arch/arm/lib/psci-dt.c b/arch/arm/lib/psci-dt.c index 825fe1eefb..246f3c7cb8 100644 --- a/arch/arm/lib/psci-dt.c +++ b/arch/arm/lib/psci-dt.c @@ -67,6 +67,8 @@ init_psci_node: psci_ver = sec_firmware_support_psci_version(); #elif defined(CONFIG_ARMV7_PSCI_1_0) || defined(CONFIG_ARMV8_PSCI) psci_ver = ARM_PSCI_VER_1_0; +#elif defined(CONFIG_ARMV7_PSCI_0_2) + psci_ver = ARM_PSCI_VER_0_2; #endif if (psci_ver >= ARM_PSCI_VER_1_0) { tmp = fdt_setprop_string(fdt, nodeoff, @@ -114,6 +116,10 @@ init_psci_node: if (tmp) return tmp; + tmp = fdt_setprop_string(fdt, nodeoff, "status", "okay"); + if (tmp) + return tmp; + #endif return 0; } diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index ce6be3829a..69856c8942 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -76,19 +76,21 @@ config TARGET_SNAPPER9260 bool "Support snapper9260" select AT91SAM9260 select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_GURNARD bool "Support gurnard" select AT91SAM9G45 select BOARD_LATE_INIT select DM + select DM_ETH + select DM_GPIO select DM_SERIAL select DM_SPI - select DM_GPIO - select DM_ETH select SPI + imply CMD_DM config TARGET_AT91SAM9261EK bool "Atmel at91sam9261 reference board" @@ -115,8 +117,8 @@ config TARGET_PM9263 config TARGET_AT91SAM9M10G45EK bool "Atmel AT91SAM9M10G45-EK board" select AT91SAM9M10G45 - select SUPPORT_SPL select BOARD_EARLY_INIT_F + select SUPPORT_SPL config TARGET_PM9G45 bool "Ronetix pm9g45 board" @@ -130,8 +132,8 @@ config TARGET_PICOSAM9G45 config TARGET_AT91SAM9N12EK bool "Atmel AT91SAM9N12-EK board" select AT91SAM9N12 - select SUPPORT_SPL select BOARD_EARLY_INIT_F + select SUPPORT_SPL config TARGET_AT91SAM9RLEK bool "Atmel at91sam9rl reference board" @@ -141,28 +143,28 @@ config TARGET_AT91SAM9RLEK config TARGET_AT91SAM9X5EK bool "Atmel AT91SAM9X5-EK board" select AT91SAM9X5 - select SUPPORT_SPL select BOARD_EARLY_INIT_F select BOARD_LATE_INIT + select SUPPORT_SPL config TARGET_SAMA5D2_PTC_EK bool "SAMA5D2 PTC EK board" - select SAMA5D2 select BOARD_EARLY_INIT_F + select SAMA5D2 config TARGET_SAMA5D2_XPLAINED bool "SAMA5D2 Xplained board" - select SAMA5D2 - select SUPPORT_SPL select BOARD_EARLY_INIT_F select BOARD_LATE_INIT + select SAMA5D2 + select SUPPORT_SPL config TARGET_SAMA5D27_SOM1_EK bool "SAMA5D27 SOM1 EK board" - select CPU_V7A - select SUPPORT_SPL select BOARD_EARLY_INIT_F select BOARD_LATE_INIT + select CPU_V7A + select SUPPORT_SPL help The SAMA5D27 SOM1 embeds SAMA5D2 SiP(System in Package), a 64Mbit QSPI flash, KSZ8081 Phy and a Mac-address EEPROM @@ -172,30 +174,30 @@ config TARGET_SAMA5D27_SOM1_EK config TARGET_SAMA5D3_XPLAINED bool "SAMA5D3 Xplained board" + select BOARD_EARLY_INIT_F select SAMA5D3 select SUPPORT_SPL - select BOARD_EARLY_INIT_F config TARGET_SAMA5D3XEK bool "SAMA5D3X-EK board" - select SAMA5D3 + select BOARD_EARLY_INIT_F select BOARD_LATE_INIT + select SAMA5D3 select SUPPORT_SPL - select BOARD_EARLY_INIT_F config TARGET_SAMA5D4_XPLAINED bool "SAMA5D4 Xplained board" - select SAMA5D4 - select SUPPORT_SPL select BOARD_EARLY_INIT_F select BOARD_LATE_INIT + select SAMA5D4 + select SUPPORT_SPL config TARGET_SAMA5D4EK bool "SAMA5D4 Evaluation Kit" - select SAMA5D4 - select SUPPORT_SPL select BOARD_EARLY_INIT_F select BOARD_LATE_INIT + select SAMA5D4 + select SUPPORT_SPL config TARGET_MEESC bool "Support meesc" @@ -204,39 +206,43 @@ config TARGET_MEESC config TARGET_CORVUS bool "Support corvus" select AT91SAM9M10G45 - select SUPPORT_SPL select DM - select DM_SERIAL - select DM_GPIO select DM_ETH + select DM_GPIO + select DM_SERIAL + select SUPPORT_SPL + imply CMD_DM config TARGET_TAURUS bool "Support taurus" select AT91SAM9G20 - select SUPPORT_SPL select DM + select DM_ETH + select DM_GPIO select DM_SERIAL select DM_SPI - select DM_GPIO - select DM_ETH select SPI + select SUPPORT_SPL + imply CMD_DM config TARGET_SMARTWEB bool "Support smartweb" select AT91SAM9260 - select SUPPORT_SPL select DM - select DM_SERIAL - select DM_GPIO select DM_ETH + select DM_GPIO + select DM_SERIAL + select SUPPORT_SPL + imply CMD_DM config TARGET_VINCO bool "Support VINCO" - select SAMA5D4 - select SUPPORT_SPL select DM select DM_SPI + select SAMA5D4 select SPI + select SUPPORT_SPL + imply CMD_DM config TARGET_WB45N bool "Support Laird WB45N" @@ -245,10 +251,10 @@ config TARGET_WB45N config TARGET_WB50N bool "Support Laird WB50N" + select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select CPU_V7A select SUPPORT_SPL - select BOARD_EARLY_INIT_F endchoice diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 5e7baba3fe..12b1e682e6 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -18,9 +18,9 @@ config TARGET_DA850EVM config TARGET_EA20 bool "EA20 board" + select BOARD_LATE_INIT select MACH_DAVINCI_DA850_EVM select SOC_DA850 - select BOARD_LATE_INIT config TARGET_OMAPL138_LCDK bool "OMAPL138 LCDK" @@ -57,8 +57,8 @@ config SOC_DA850 config SOC_DA8XX bool - select SYS_DA850_PLL_INIT if SUPPORT_SPL || DA850_LOWLEVEL select SYS_DA850_DDR_INIT if SUPPORT_SPL || DA850_LOWLEVEL + select SYS_DA850_PLL_INIT if SUPPORT_SPL || DA850_LOWLEVEL config MACH_DAVINCI_DA850_EVM bool diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 65d9168ae2..ed04369cfa 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -6,8 +6,8 @@ choice config ARCH_EXYNOS4 bool "Exynos4 SoC family" - select CPU_V7A select BOARD_EARLY_INIT_F + select CPU_V7A help Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There are multiple SoCs in this family including Exynos4210, Exynos4412, @@ -15,14 +15,14 @@ config ARCH_EXYNOS4 config ARCH_EXYNOS5 bool "Exynos5 SoC family" - select CPU_V7A select BOARD_EARLY_INIT_F + select CPU_V7A select SHA_HW_ACCEL - imply CRC32_VERIFY imply CMD_HASH + imply CRC32_VERIFY imply HASH_VERIFY - imply USB_ETHER_RTL8152 imply USB_ETHER_ASIX + imply USB_ETHER_RTL8152 imply USB_ETHER_SMSC95XX help Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and @@ -46,9 +46,9 @@ choice prompt "EXYNOS4 board select" config TARGET_SMDKV310 - select SUPPORT_SPL bool "Exynos4210 SMDKV310 board" select OF_CONTROL + select SUPPORT_SPL config TARGET_TRATS bool "Exynos4210 Trats board" @@ -93,39 +93,39 @@ config TARGET_ARNDALE select ARM_ERRATA_774769 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT - select SUPPORT_SPL select OF_CONTROL + select SUPPORT_SPL config TARGET_SMDK5250 bool "SMDK5250 board" - select SUPPORT_SPL select OF_CONTROL + select SUPPORT_SPL config TARGET_SNOW bool "Snow board" - select SUPPORT_SPL select OF_CONTROL + select SUPPORT_SPL config TARGET_SPRING bool "Spring board" - select SUPPORT_SPL select OF_CONTROL select SPL_DISABLE_OF_CONTROL + select SUPPORT_SPL config TARGET_SMDK5420 bool "SMDK5420 board" - select SUPPORT_SPL select OF_CONTROL + select SUPPORT_SPL config TARGET_PEACH_PI bool "Peach Pi board" - select SUPPORT_SPL select OF_CONTROL + select SUPPORT_SPL config TARGET_PEACH_PIT bool "Peach Pit board" - select SUPPORT_SPL select OF_CONTROL + select SUPPORT_SPL endchoice endif @@ -139,12 +139,12 @@ config TARGET_ESPRESSO7420 bool "ESPRESSO7420 board" select ARM64 select ARMV8_MULTIENTRY - select SUPPORT_SPL + select CLK_EXYNOS select OF_CONTROL - select SPL_DISABLE_OF_CONTROL select PINCTRL select PINCTRL_EXYNOS7420 - select CLK_EXYNOS + select SPL_DISABLE_OF_CONTROL + select SUPPORT_SPL endchoice endif diff --git a/arch/arm/mach-imx/mx3/Kconfig b/arch/arm/mach-imx/mx3/Kconfig index 6cc970fc49..5028d5ea56 100644 --- a/arch/arm/mach-imx/mx3/Kconfig +++ b/arch/arm/mach-imx/mx3/Kconfig @@ -9,9 +9,9 @@ choice config TARGET_MX31PDK bool "Support the i.MX31 PDK board from Freescale/NXP" + select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select SUPPORT_SPL - select BOARD_EARLY_INIT_F endchoice diff --git a/arch/arm/mach-imx/mx5/Kconfig b/arch/arm/mach-imx/mx5/Kconfig index 3654670442..051b15dbff 100644 --- a/arch/arm/mach-imx/mx5/Kconfig +++ b/arch/arm/mach-imx/mx5/Kconfig @@ -1,14 +1,14 @@ if ARCH_MX5 config MX5 - select GPT_TIMER bool default y + select GPT_TIMER config MX51 bool - select SYS_FSL_ERRATUM_ESDHC_A001 select ARM_CORTEX_A8_CVE_2017_5715 + select SYS_FSL_ERRATUM_ESDHC_A001 config MX53 bool @@ -21,13 +21,14 @@ choice config TARGET_KP_IMX53 bool "Support K+P imx53 board" select BOARD_LATE_INIT - select MX53 select DM - select DM_SERIAL select DM_ETH - select DM_I2C select DM_GPIO + select DM_I2C select DM_PMIC + select DM_SERIAL + select MX53 + imply CMD_DM config TARGET_MX51EVK bool "Support mx51evk" @@ -41,9 +42,10 @@ config TARGET_MX53ARD config TARGET_MX53CX9020 bool "Support CX9020" select BOARD_LATE_INIT - select MX53 select DM select DM_SERIAL + select MX53 + imply CMD_DM config TARGET_MX53EVK bool "Support mx53evk" diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index d4bc60af45..a2799c436e 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -1,89 +1,91 @@ if ARCH_MX6 config MX6_SMP + bool select ARM_ERRATA_751472 select ARM_ERRATA_761320 select ARM_ERRATA_794072 select ARM_ERRATA_845369 select MP - bool config MX6 - select ARM_ERRATA_743622 if !MX6UL && !MX6ULL - select GPT_TIMER if !MX6UL && !MX6ULL bool default y + select ARM_ERRATA_743622 if !MX6UL && !MX6ULL + select GPT_TIMER if !MX6UL && !MX6ULL imply CMD_FUSE config MX6D + bool select HAS_CAAM select MX6_SMP - bool config MX6DL + bool select HAS_CAAM select MX6_SMP - bool config MX6Q + bool select HAS_CAAM select MX6_SMP - bool config MX6QDL + bool select HAS_CAAM select MX6_SMP - bool config MX6S - select HAS_CAAM bool + select HAS_CAAM config MX6SL bool config MX6SX + bool select HAS_CAAM select ROM_UNIFIED_SECTIONS - bool config MX6SLL - select ROM_UNIFIED_SECTIONS bool + select ROM_UNIFIED_SECTIONS config MX6UL + bool select HAS_CAAM - select SYS_L2CACHE_OFF select ROM_UNIFIED_SECTIONS select SYSCOUNTER_TIMER - bool + select SYS_L2CACHE_OFF config MX6UL_LITESOM bool - select MX6UL select DM select DM_THERMAL + select MX6UL select SUPPORT_SPL + imply CMD_DM config MX6UL_OPOS6UL bool - select MX6UL select BOARD_LATE_INIT select DM select DM_GPIO select DM_MMC select DM_THERMAL - select SUPPORT_SPL + select MX6UL select SPL_DM if SPL select SPL_OF_CONTROL if SPL - select SPL_SEPARATE_BSS if SPL select SPL_PINCTRL if SPL + select SPL_SEPARATE_BSS if SPL + select SUPPORT_SPL + imply CMD_DM config MX6ULL - select SYS_L2CACHE_OFF + bool select ROM_UNIFIED_SECTIONS select SYSCOUNTER_TIMER - bool + select SYS_L2CACHE_OFF config MX6_DDRCAL bool "Include dynamic DDR calibration routines" @@ -106,10 +108,11 @@ config TARGET_ADVANTECH_DMS_BA16 config TARGET_APALIS_IMX6 bool "Toradex Apalis iMX6 board" select BOARD_LATE_INIT - select SUPPORT_SPL select DM select DM_SERIAL select DM_THERMAL + select SUPPORT_SPL + imply CMD_DM imply CMD_SATA config TARGET_ARISTAINETOS @@ -125,28 +128,31 @@ config TARGET_ARISTAINETOS2B config TARGET_CGTQMX6EVAL bool "cgtqmx6eval" - select MX6QDL select BOARD_LATE_INIT - select SUPPORT_SPL select DM select DM_THERMAL + select MX6QDL + select SUPPORT_SPL + imply CMD_DM config TARGET_CM_FX6 bool "CM-FX6" - select SUPPORT_SPL - select MX6QDL select BOARD_LATE_INIT select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + select MX6QDL + select SUPPORT_SPL + imply CMD_DM config TARGET_COLIBRI_IMX6 bool "Toradex Colibri iMX6 board" select BOARD_LATE_INIT - select SUPPORT_SPL select DM select DM_SERIAL select DM_THERMAL + select SUPPORT_SPL + imply CMD_DM config TARGET_COLIBRI_IMX6ULL bool "Toradex Colibri iMX6ULL" @@ -157,19 +163,21 @@ config TARGET_COLIBRI_IMX6ULL config TARGET_DHCOMIMX6 bool "dh_imx6" - select MX6QDL - select BOARD_LATE_INIT select BOARD_EARLY_INIT_F - select SUPPORT_SPL + select BOARD_LATE_INIT select DM select DM_THERMAL + select MX6QDL + select SUPPORT_SPL + imply CMD_DM imply CMD_SPL config TARGET_DISPLAY5 bool "LWN DISPLAY5 board" - select SUPPORT_SPL select DM select DM_SERIAL + select SUPPORT_SPL + imply CMD_DM config TARGET_EMBESTMX6BOARDS bool "embestmx6boards" @@ -199,8 +207,8 @@ config TARGET_MCCMON6 config TARGET_MX6CUBOXI bool "Solid-run mx6 boards" - select MX6QDL select BOARD_LATE_INIT + select MX6QDL select SUPPORT_SPL config TARGET_MX6LOGICPD @@ -216,6 +224,7 @@ config TARGET_MX6LOGICPD select DM_MMC select DM_PMIC select OF_CONTROL + imply CMD_DM config TARGET_MX6MEMCAL bool "mx6memcal" @@ -230,9 +239,6 @@ config TARGET_MX6QARM2 config TARGET_MX6DL_MAMOJ bool "Support BTicino Mamoj" - select MX6QDL - select OF_CONTROL - select PINCTRL select DM select DM_ETH select DM_GPIO @@ -241,59 +247,66 @@ config TARGET_MX6DL_MAMOJ select DM_PMIC select DM_PMIC_PFUZE100 select DM_THERMAL + select MX6QDL + select OF_CONTROL + select PINCTRL select SPL - select SUPPORT_SPL select SPL_DM if SPL - select SPL_OF_LIBFDT if SPL - select SPL_OF_CONTROL if SPL - select SPL_PINCTRL if SPL - select SPL_SEPARATE_BSS if SPL select SPL_GPIO_SUPPORT if SPL select SPL_LIBCOMMON_SUPPORT if SPL select SPL_LIBDISK_SUPPORT if SPL select SPL_LIBGENERIC_SUPPORT if SPL select SPL_MMC_SUPPORT if SPL + select SPL_OF_CONTROL if SPL + select SPL_OF_LIBFDT if SPL + select SPL_PINCTRL if SPL + select SPL_SEPARATE_BSS if SPL select SPL_SERIAL_SUPPORT if SPL - select SPL_USB_HOST_SUPPORT if SPL select SPL_USB_GADGET_SUPPORT if SPL + select SPL_USB_HOST_SUPPORT if SPL select SPL_USB_SDP_SUPPORT if SPL select SPL_WATCHDOG_SUPPORT if SPL + select SUPPORT_SPL + imply CMD_DM config TARGET_MX6Q_ENGICAM bool "Support Engicam i.Core(RQS)" select BOARD_LATE_INIT - select MX6QDL - select OF_CONTROL - select SPL_OF_LIBFDT select DM select DM_ETH select DM_GPIO select DM_I2C select DM_MMC select DM_THERMAL - select SUPPORT_SPL + select MX6QDL + select OF_CONTROL select SPL_DM if SPL select SPL_OF_CONTROL if SPL - select SPL_SEPARATE_BSS if SPL + select SPL_OF_LIBFDT select SPL_PINCTRL if SPL + select SPL_SEPARATE_BSS if SPL + select SUPPORT_SPL + imply CMD_DM config TARGET_MX6SABREAUTO bool "mx6sabreauto" - select MX6QDL + select BOARD_EARLY_INIT_F select BOARD_LATE_INIT - select SUPPORT_SPL select DM select DM_THERMAL - select BOARD_EARLY_INIT_F + select MX6QDL + select SUPPORT_SPL + imply CMD_DM config TARGET_MX6SABRESD bool "mx6sabresd" - select MX6QDL + select BOARD_EARLY_INIT_F select BOARD_LATE_INIT - select SUPPORT_SPL select DM select DM_THERMAL - select BOARD_EARLY_INIT_F + select MX6QDL + select SUPPORT_SPL + imply CMD_DM config TARGET_MX6SLEVK bool "mx6slevk" @@ -301,75 +314,81 @@ config TARGET_MX6SLEVK select SUPPORT_SPL config TARGET_MX6SLLEVK - bool "mx6sll evk" + bool "mx6sll evk" select BOARD_LATE_INIT - select MX6SLL - select DM - select DM_THERMAL + select DM + select DM_THERMAL + select MX6SLL + imply CMD_DM config TARGET_MX6SXSABRESD bool "mx6sxsabresd" + select BOARD_EARLY_INIT_F select BOARD_LATE_INIT - select MX6SX - select SUPPORT_SPL select DM select DM_THERMAL - select BOARD_EARLY_INIT_F + select MX6SX + select SUPPORT_SPL config TARGET_MX6SXSABREAUTO - bool "mx6sxsabreauto" + bool "mx6sxsabreauto" + select BOARD_EARLY_INIT_F select BOARD_LATE_INIT + select DM + select DM_THERMAL select MX6SX - select DM - select DM_THERMAL - select BOARD_EARLY_INIT_F + imply CMD_DM config TARGET_MX6UL_9X9_EVK bool "mx6ul_9x9_evk" select BOARD_LATE_INIT - select MX6UL select DM select DM_THERMAL + select MX6UL select SUPPORT_SPL + imply CMD_DM config TARGET_MX6UL_14X14_EVK - select BOARD_LATE_INIT bool "mx6ul_14x14_evk" - select MX6UL + select BOARD_LATE_INIT select DM select DM_THERMAL + select MX6UL select SUPPORT_SPL + imply CMD_DM config TARGET_MX6UL_ENGICAM bool "Support Engicam GEAM6UL/Is.IoT" select BOARD_LATE_INIT - select MX6UL - select OF_CONTROL select DM select DM_ETH select DM_GPIO select DM_I2C select DM_MMC select DM_THERMAL - select SUPPORT_SPL + select MX6UL + select OF_CONTROL select SPL_DM if SPL select SPL_OF_CONTROL if SPL - select SPL_SEPARATE_BSS if SPL select SPL_PINCTRL if SPL + select SPL_SEPARATE_BSS if SPL + select SUPPORT_SPL + imply CMD_DM config TARGET_MX6ULL_14X14_EVK bool "Support mx6ull_14x14_evk" select BOARD_LATE_INIT - select MX6ULL select DM select DM_THERMAL + select MX6ULL + imply CMD_DM config TARGET_NITROGEN6X bool "nitrogen6x" - imply USB_HOST_ETHER imply USB_ETHER_ASIX - imply USB_ETHER_SMSC95XX imply USB_ETHER_MCS7830 + imply USB_ETHER_SMSC95XX + imply USB_HOST_ETHER config TARGET_OPOS6ULDEV bool "Armadeus OPOS6ULDev board" @@ -404,8 +423,8 @@ config TARGET_PCM058 config TARGET_PFLA02 bool "Phytec PFLA02 (PhyFlex) i.MX6 Quad" - select MX6QDL select BOARD_LATE_INIT + select MX6QDL select SUPPORT_SPL config TARGET_SECOMX6 @@ -423,12 +442,13 @@ config TARGET_TITANIUM config TARGET_KP_IMX6Q_TPC bool "K+P KP_IMX6Q_TPC i.MX6 Quad" - select MX6QDL - select BOARD_LATE_INIT select BOARD_EARLY_INIT_F - select SUPPORT_SPL + select BOARD_LATE_INIT select DM select DM_THERMAL + select MX6QDL + select SUPPORT_SPL + imply CMD_DM imply CMD_SPL config TARGET_TQMA6 @@ -437,57 +457,62 @@ config TARGET_TQMA6 config TARGET_UDOO bool "udoo" - select MX6QDL select BOARD_LATE_INIT + select MX6QDL select SUPPORT_SPL config TARGET_UDOO_NEO bool "UDOO Neo" select BOARD_LATE_INIT - select SUPPORT_SPL - select MX6SX select DM select DM_THERMAL + select MX6SX + select SUPPORT_SPL + imply CMD_DM config TARGET_SAMTEC_VINING_2000 bool "samtec VIN|ING 2000" select BOARD_LATE_INIT - select MX6SX select DM select DM_THERMAL + select MX6SX + imply CMD_DM config TARGET_WANDBOARD bool "wandboard" - select MX6QDL select BOARD_LATE_INIT + select MX6QDL select SUPPORT_SPL config TARGET_WARP bool "WaRP" - select MX6SL select BOARD_LATE_INIT + select MX6SL config TARGET_XPRESS bool "CCV xPress" select BOARD_LATE_INIT - select MX6UL select DM select DM_THERMAL + select MX6UL select SUPPORT_SPL + imply CMD_DM config TARGET_ZC5202 bool "zc5202" select BOARD_LATE_INIT - select SUPPORT_SPL select DM select DM_THERMAL + select SUPPORT_SPL + imply CMD_DM config TARGET_ZC5601 bool "zc5601" select BOARD_LATE_INIT - select SUPPORT_SPL select DM select DM_THERMAL + select SUPPORT_SPL + imply CMD_DM endchoice diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig index 944585ba77..1acd7f3c7c 100644 --- a/arch/arm/mach-imx/mx7/Kconfig +++ b/arch/arm/mach-imx/mx7/Kconfig @@ -2,19 +2,19 @@ if ARCH_MX7 config MX7 bool + default y + select ARCH_SUPPORT_PSCI + select CPU_V7_HAS_NONSEC + select CPU_V7_HAS_VIRT select ROM_UNIFIED_SECTIONS select SYSCOUNTER_TIMER - select CPU_V7_HAS_VIRT - select CPU_V7_HAS_NONSEC - select ARCH_SUPPORT_PSCI imply CMD_FUSE - default y config MX7D + bool select HAS_CAAM select ROM_UNIFIED_SECTIONS imply CMD_FUSE - bool choice prompt "MX7 board select" @@ -22,38 +22,43 @@ choice config TARGET_CL_SOM_IMX7 bool "CL-SOM-iMX7" - select MX7D select DM select DM_THERMAL + select MX7D select SUPPORT_SPL + imply CMD_DM config TARGET_MX7DSABRESD bool "mx7dsabresd" select BOARD_LATE_INIT - select MX7D select DM select DM_THERMAL + select MX7D + imply CMD_DM config TARGET_PICO_IMX7D bool "pico-imx7d" select BOARD_LATE_INIT - select MX7D select DM select DM_THERMAL + select MX7D select SUPPORT_SPL config TARGET_WARP7 bool "warp7" select BOARD_LATE_INIT - select MX7D select DM select DM_THERMAL + select MX7D + imply CMD_DM + imply CMD_DM config TARGET_COLIBRI_IMX7 bool "Support Colibri iMX7S/iMX7D modules" select DM select DM_SERIAL select DM_THERMAL + imply CMD_DM endchoice diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index 7662256790..ee8b1cdcf6 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -6,6 +6,7 @@ config MESON_GXBB select CLK select DM select DM_SERIAL + imply CMD_DM help The Amlogic Meson GXBaby (S905) is an ARM SoC with a quad-core Cortex-A53 CPU and a Mali-450 GPU. @@ -16,6 +17,7 @@ config MESON_GXL select CLK select DM select DM_SERIAL + imply CMD_DM help The Amlogic Meson GXL (S905X and S905D) is an ARM SoC with a quad-core Cortex-A53 CPU and a Mali-450 GPU. diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 5415b5a7bf..3df124c6a8 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -6,14 +6,14 @@ config HAVE_MVEBU_EFUSE config ARMADA_32BIT bool + select ARCH_MISC_INIT + select BOARD_EARLY_INIT_F select CPU_V7A - select SUPPORT_SPL select SPL_DM select SPL_DM_SEQ_ALIAS select SPL_OF_CONTROL select SPL_SIMPLE_BUS - select BOARD_EARLY_INIT_F - select ARCH_MISC_INIT + select SUPPORT_SPL config ARMADA_64BIT bool diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index f4babc8d26..76a19064c9 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -6,11 +6,11 @@ choice config OMAP34XX bool "OMAP34XX SoC" + select ARM_CORTEX_A8_CVE_2017_5715 select ARM_ERRATA_430973 select ARM_ERRATA_454179 select ARM_ERRATA_621766 select ARM_ERRATA_725233 - select ARM_CORTEX_A8_CVE_2017_5715 select USE_TINY_PRINTF imply NAND_OMAP_GPMC imply SPL_EXT_SUPPORT @@ -52,9 +52,9 @@ config OMAP44XX config OMAP54XX bool "OMAP54XX SoC" + select ARM_CORTEX_A15_CVE_2017_5715 select ARM_ERRATA_798870 select SYS_THUMB_BUILD - select ARM_CORTEX_A15_CVE_2017_5715 imply NAND_OMAP_ELM imply NAND_OMAP_GPMC imply SPL_DISPLAY_PRINT @@ -116,8 +116,8 @@ config AM43XX config AM33XX bool "AM33XX SoC" - select SPECIFY_CONSOLE_INDEX select ARM_CORTEX_A8_CVE_2017_5715 + select SPECIFY_CONSOLE_INDEX imply NAND_OMAP_ELM imply NAND_OMAP_GPMC imply SPL_NAND_AM33XX_BCH diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index 76da6d911e..3529607479 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -31,9 +31,12 @@ config TARGET_AM335X_EVM bool "Support am335x_evm" select BOARD_LATE_INIT select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL select TI_I2C_BOARD_DETECT + imply CMD_DM + imply SPL_DM + imply SPL_DM_SEQ_ALIAS imply SPL_ENV_SUPPORT imply SPL_EXT_SUPPORT imply SPL_FAT_SUPPORT @@ -44,15 +47,13 @@ config TARGET_AM335X_EVM imply SPL_LIBGENERIC_SUPPORT imply SPL_MMC_SUPPORT imply SPL_NAND_SUPPORT + imply SPL_OF_LIBFDT imply SPL_POWER_SUPPORT + imply SPL_SEPARATE_BSS imply SPL_SERIAL_SUPPORT + imply SPL_SYS_MALLOC_SIMPLE imply SPL_WATCHDOG_SUPPORT imply SPL_YMODEM_SUPPORT - imply SPL_SYS_MALLOC_SIMPLE - imply SPL_SEPARATE_BSS - imply SPL_DM - imply SPL_DM_SEQ_ALIAS - imply SPL_OF_LIBFDT help This option specifies support for the AM335x GP and HS EVM development platforms. The AM335x @@ -65,36 +66,41 @@ config TARGET_AM335X_BALTOS bool "Support am335x_baltos" select BOARD_LATE_INIT select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_AM335X_IGEP003X bool "Support am335x_igep003x" select BOARD_LATE_INIT select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_AM335X_SHC bool "Support am335x based shc board from bosch" select BOARD_LATE_INIT select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM imply CMD_SPL config TARGET_AM335X_SL50 bool "Support am335x_sl50" select BOARD_LATE_INIT select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_BAV335X bool "Support bav335x" select BOARD_LATE_INIT select DM select DM_SERIAL + imply CMD_DM help The BAV335x OEM Network Processor integrates all the functions of an embedded network computer in a small, easy to use SODIMM module which @@ -118,77 +124,89 @@ config TARGET_CHILIBOARD select BOARD_LATE_INIT select DM select DM_SERIAL + imply CMD_DM config TARGET_CM_T335 bool "Support cm_t335" select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_DRACO bool "Support draco" select BOARD_LATE_INIT select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_ETAMIN bool "Support etamin" select BOARD_LATE_INIT select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_PCM051 bool "Support pcm051" select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_PENGWYN bool "Support pengwyn" select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_PEPPER bool "Support pepper" select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_PXM2 bool "Support pxm2" select BOARD_LATE_INIT select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_RASTABAN bool "Support rastaban" select BOARD_LATE_INIT select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_RUT bool "Support rut" select BOARD_LATE_INIT select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_THUBAN bool "Support thuban" select BOARD_LATE_INIT select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_PDU001 bool "Support PDU001" select DM select DM_SERIAL + imply CMD_DM help Support for PDU001 platform developed by EETS GmbH. The PDU001 is a processor and display unit developed around @@ -258,6 +276,8 @@ endif if AM43XX || AM33XX config ISW_ENTRY_ADDR hex "Address in memory or XIP flash of bootloader entry point" + default 0x402F4000 if AM43XX + default 0x402F0400 if AM33XX help After any reset, the boot ROM on the AM43XX SOC searches the boot media for a valid boot image. @@ -268,11 +288,10 @@ config ISW_ENTRY_ADDR point address depending on the device type (secure/non-secure), boot media (xip/non-xip) and image headers. - default 0x402F4000 if AM43XX - default 0x402F0400 if AM33XX config PUB_ROM_DATA_SIZE hex "Size in bytes of the L3 SRAM reserved by ROM to store data" + default 0x8400 help During the device boot, the public ROM uses the top of the public L3 OCMC RAM to store r/w data like stack, @@ -283,5 +302,4 @@ config PUB_ROM_DATA_SIZE boot image. Once the ROM transfers control to the boot image, this area is no longer used, and can be reclaimed for run time use by the boot image. - default 0x8400 endif diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig index 6d714f6cdb..e0d02fb4e5 100644 --- a/arch/arm/mach-omap2/omap3/Kconfig +++ b/arch/arm/mach-omap2/omap3/Kconfig @@ -23,10 +23,11 @@ choice config TARGET_AM3517_EVM bool "AM3517 EVM" select DM - select DM_SERIAL select DM_GPIO select DM_I2C select DM_MMC + select DM_SERIAL + imply CMD_DM config TARGET_MT_VENTOUX bool "TeeJet Mt.Ventoux" @@ -36,10 +37,11 @@ config TARGET_MT_VENTOUX config TARGET_OMAP3_BEAGLE bool "TI OMAP3 BeagleBoard" select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL select OMAP3_GPIO_5 select OMAP3_GPIO_6 + imply CMD_DM config TARGET_CM_T35 bool "CompuLab CM-T3530 and CM-T3730 boards" @@ -56,41 +58,46 @@ config TARGET_CM_T3517 config TARGET_DEVKIT8000 bool "TimLL OMAP3 Devkit8000" select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_OMAP3_EVM bool "TI OMAP3 EVM" select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL select OMAP3_GPIO_3 + imply CMD_DM config TARGET_OMAP3_IGEP00X0 bool "IGEP" select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL select OMAP3_GPIO_3 select OMAP3_GPIO_5 select OMAP3_GPIO_6 + imply CMD_DM config TARGET_OMAP3_OVERO bool "OMAP35xx Gumstix Overo" select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL select OMAP3_GPIO_2 select OMAP3_GPIO_3 select OMAP3_GPIO_4 select OMAP3_GPIO_5 select OMAP3_GPIO_6 + imply CMD_DM config TARGET_OMAP3_ZOOM1 bool "TI Zoom1" select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_AM3517_CRANE bool "am3517_crane" @@ -118,11 +125,12 @@ config TARGET_OMAP3_LOGIC bool "OMAP3 Logic" select BOARD_LATE_INIT select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL select OMAP3_GPIO_3 select OMAP3_GPIO_4 select OMAP3_GPIO_6 + imply CMD_DM config TARGET_NOKIA_RX51 bool "Nokia RX51" @@ -143,19 +151,21 @@ config TARGET_TWISTER config TARGET_OMAP3_CAIRO bool "QUIPOS CAIRO" select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL + imply CMD_DM config TARGET_SNIPER bool "LG Optimus Black" select DM - select DM_SERIAL select DM_GPIO + select DM_SERIAL select OMAP3_GPIO_2 select OMAP3_GPIO_3 select OMAP3_GPIO_4 select OMAP3_GPIO_5 select OMAP3_GPIO_6 + imply CMD_DM endchoice diff --git a/arch/arm/mach-omap2/omap5/Kconfig b/arch/arm/mach-omap2/omap5/Kconfig index deb9873cc5..f083a4a385 100644 --- a/arch/arm/mach-omap2/omap5/Kconfig +++ b/arch/arm/mach-omap2/omap5/Kconfig @@ -23,26 +23,26 @@ config TARGET_DRA7XX_EVM bool "TI DRA7XX" select BOARD_LATE_INIT select DRA7XX - select TI_I2C_BOARD_DETECT select PHYS_64BIT - imply SCSI + select TI_I2C_BOARD_DETECT imply DM_PMIC - imply PMIC_LP87565 imply DM_REGULATOR imply DM_REGULATOR_LP87565 - imply SPL_THERMAL imply DM_THERMAL + imply PMIC_LP87565 + imply SCSI + imply SPL_THERMAL imply TI_DRA7_THERMAL config TARGET_AM57XX_EVM bool "AM57XX" select BOARD_LATE_INIT + select CMD_DDR3 select DRA7XX select TI_I2C_BOARD_DETECT - select CMD_DDR3 + imply DM_THERMAL imply SCSI imply SPL_THERMAL - imply DM_THERMAL imply TI_DRA7_THERMAL endchoice diff --git a/arch/arm/mach-qemu/Kconfig b/arch/arm/mach-qemu/Kconfig index 726f8a7d31..a2e4b98b88 100644 --- a/arch/arm/mach-qemu/Kconfig +++ b/arch/arm/mach-qemu/Kconfig @@ -14,8 +14,8 @@ endif config TARGET_QEMU_ARM_32BIT bool "Support qemu_arm" depends on ARCH_QEMU - select CPU_V7A select ARCH_SUPPORT_PSCI + select CPU_V7A select SYS_ARCH_TIMER config TARGET_QEMU_ARM_64BIT diff --git a/arch/arm/mach-rmobile/Kconfig.32 b/arch/arm/mach-rmobile/Kconfig.32 index c0b5b2457c..bdca9bb905 100644 --- a/arch/arm/mach-rmobile/Kconfig.32 +++ b/arch/arm/mach-rmobile/Kconfig.32 @@ -13,18 +13,22 @@ config R8A7740 config R8A7790 bool "Renesas SoC R8A7790" select RCAR_GEN2 + select ARM_CORTEX_A15_CVE_2017_5715 config R8A7791 bool "Renesas SoC R8A7791" select RCAR_GEN2 + select ARM_CORTEX_A15_CVE_2017_5715 config R8A7792 bool "Renesas SoC R8A7792" select RCAR_GEN2 + select ARM_CORTEX_A15_CVE_2017_5715 config R8A7793 bool "Renesas SoC R8A7793" select RCAR_GEN2 + select ARM_CORTEX_A15_CVE_2017_5715 config R8A7794 bool "Renesas SoC R8A7794" @@ -42,30 +46,34 @@ config TARGET_BLANCHE select DM select DM_SERIAL select USE_TINY_PRINTF + imply CMD_DM config TARGET_GOSE bool "Gose board" select DM select DM_SERIAL + select SPL_TINY_MEMSET select SUPPORT_SPL select USE_TINY_PRINTF - select SPL_TINY_MEMSET + imply CMD_DM config TARGET_KOELSCH bool "Koelsch board" select DM select DM_SERIAL + select SPL_TINY_MEMSET select SUPPORT_SPL select USE_TINY_PRINTF - select SPL_TINY_MEMSET + imply CMD_DM config TARGET_LAGER bool "Lager board" select DM select DM_SERIAL + select SPL_TINY_MEMSET select SUPPORT_SPL select USE_TINY_PRINTF - select SPL_TINY_MEMSET + imply CMD_DM config TARGET_KZM9G bool "KZM9D board" @@ -74,33 +82,37 @@ config TARGET_ALT bool "Alt board" select DM select DM_SERIAL + select SPL_TINY_MEMSET select SUPPORT_SPL select USE_TINY_PRINTF - select SPL_TINY_MEMSET + imply CMD_DM config TARGET_SILK bool "Silk board" select DM select DM_SERIAL + select SPL_TINY_MEMSET select SUPPORT_SPL select USE_TINY_PRINTF - select SPL_TINY_MEMSET + imply CMD_DM config TARGET_PORTER bool "Porter board" select DM select DM_SERIAL + select SPL_TINY_MEMSET select SUPPORT_SPL select USE_TINY_PRINTF - select SPL_TINY_MEMSET + imply CMD_DM config TARGET_STOUT bool "Stout board" select DM select DM_SERIAL + select SPL_TINY_MEMSET select SUPPORT_SPL select USE_TINY_PRINTF - select SPL_TINY_MEMSET + imply CMD_DM endchoice diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 6beb26fd7a..b5447e5b65 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -87,22 +87,22 @@ config TARGET_POPMETAL_RK3288 config TARGET_VYASA_RK3288 bool "Vyasa-RK3288" select BOARD_LATE_INIT - select TPL + select ROCKCHIP_BROM_HELPER select SUPPORT_TPL - select TPL_DM - select TPL_REGMAP - select TPL_SYSCON - select TPL_CLK - select TPL_RAM - select TPL_OF_PLATDATA - select TPL_OF_CONTROL + select TPL select TPL_BOOTROM_SUPPORT - select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL - select ROCKCHIP_BROM_HELPER + select TPL_CLK + select TPL_DM select TPL_DRIVERS_MISC_SUPPORT select TPL_LIBCOMMON_SUPPORT select TPL_LIBGENERIC_SUPPORT + select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL + select TPL_OF_CONTROL + select TPL_OF_PLATDATA + select TPL_RAM + select TPL_REGMAP select TPL_SERIAL_SUPPORT + select TPL_SYSCON help Vyasa is a RK3288-based development board with 2 USB ports, HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 91ea742f3b..5c1df2cf1f 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -9,8 +9,8 @@ config TARGET_SOCFPGA_ARRIA5 config TARGET_SOCFPGA_ARRIA10 bool - select SPL_BOARD_INIT if SPL select ALTERA_SDRAM + select SPL_BOARD_INIT if SPL config TARGET_SOCFPGA_CYCLONE5 bool @@ -23,8 +23,8 @@ config TARGET_SOCFPGA_GEN5 config TARGET_SOCFPGA_STRATIX10 bool select ARMV8_MULTIENTRY - select ARMV8_SPIN_TABLE select ARMV8_SET_SMPEN + select ARMV8_SPIN_TABLE choice prompt "Altera SOCFPGA board select" diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c index 26d84be6e9..e8c7503fba 100644 --- a/arch/arm/mach-socfpga/board.c +++ b/arch/arm/mach-socfpga/board.c @@ -21,12 +21,14 @@ DECLARE_GLOBAL_DATA_PTR; void s_init(void) { #ifndef CONFIG_ARM64 /* - * Preconfigure ACTLR, make sure Write Full Line of Zeroes is disabled. + * Preconfigure ACTLR and CPACR, make sure Write Full Line of Zeroes + * is disabled in ACTLR. * This is optional on CycloneV / ArriaV. * This is mandatory on Arria10, otherwise Linux refuses to boot. */ asm volatile( "mcr p15, 0, %0, c1, c0, 1\n" + "mcr p15, 0, %0, c1, c0, 2\n" "isb\n" "dsb\n" ::"r"(0x0)); diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c index a75cbc4ce6..80bf2f036f 100644 --- a/arch/arm/mach-socfpga/misc_arria10.c +++ b/arch/arm/mach-socfpga/misc_arria10.c @@ -93,6 +93,19 @@ static void initialize_security_policies(void) /* Put OCRAM in non-secure */ writel(0x003f0000, &noc_fw_ocram_base->region0); writel(0x1, &noc_fw_ocram_base->enable); + + /* Put DDR in non-secure */ + writel(0xffff0000, SOCFPGA_SDR_FIREWALL_L3_ADDRESS + 0xc); + writel(0x1, SOCFPGA_SDR_FIREWALL_L3_ADDRESS); + + /* Enable priviledged and non-priviledged access to L4 peripherals */ + writel(~0, SOCFPGA_NOC_L4_PRIV_FLT_OFST); + + /* Enable secure and non-secure transactions to bridges */ + writel(~0, SOCFPGA_NOC_FW_H2F_SCR_OFST); + writel(~0, SOCFPGA_NOC_FW_H2F_SCR_OFST + 4); + + writel(0x0007FFFF, &sysmgr_regs->ecc_intmask_set); } int arch_early_init_r(void) diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig index a45f3fd77a..cea5ee2ce5 100644 --- a/arch/arm/mach-stm32/Kconfig +++ b/arch/arm/mach-stm32/Kconfig @@ -9,9 +9,9 @@ config STM32F4 select PINCTRL select PINCTRL_STM32 select RAM - select STM32_SDRAM select STM32_RCC select STM32_RESET + select STM32_SDRAM select STM32_SERIAL select STM32_TIMER select TIMER @@ -25,13 +25,6 @@ config STM32F7 select PINCTRL select PINCTRL_STM32 select RAM - select STM32_SDRAM - select STM32_RCC - select STM32_RESET - select STM32_SERIAL - select STM32_TIMER - select TIMER - select SUPPORT_SPL select SPL select SPL_BOARD_INIT select SPL_CLK @@ -46,13 +39,20 @@ config STM32F7 select SPL_OF_CONTROL select SPL_OF_LIBFDT select SPL_OF_TRANSLATE - imply SPL_OS_BOOT select SPL_PINCTRL select SPL_RAM select SPL_SERIAL_SUPPORT select SPL_SYS_MALLOC_SIMPLE select SPL_TIMER select SPL_XIP_SUPPORT + select STM32_RCC + select STM32_RESET + select STM32_SDRAM + select STM32_SERIAL + select STM32_TIMER + select SUPPORT_SPL + select TIMER + imply SPL_OS_BOOT config STM32H7 bool "stm32h7 family" @@ -64,9 +64,9 @@ config STM32H7 select PINCTRL_STM32 select RAM select REGMAP - select STM32_SDRAM select STM32_RCC select STM32_RESET + select STM32_SDRAM select STM32_SERIAL select STM32_TIMER select SYSCON diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 0fb0c63390..86b1cd11f7 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -22,6 +22,8 @@ config TEGRA_IVC config TEGRA_COMMON bool "Tegra common options" + select BINMAN + select BOARD_EARLY_INIT_F select CLK select DM select DM_ETH @@ -35,11 +37,10 @@ config TEGRA_COMMON select DM_SPI select DM_SPI_FLASH select MISC - select SPI select OF_CONTROL + select SPI select VIDCONSOLE_AS_LCD if DM_VIDEO - select BOARD_EARLY_INIT_F - select BINMAN + imply CMD_DM imply CRC32_VERIFY config TEGRA_NO_BPMP @@ -98,8 +99,8 @@ config TEGRA124 config TEGRA210 bool "Tegra210 family" - select TEGRA_GPIO select TEGRA_ARMV8_COMMON + select TEGRA_GPIO select TEGRA_NO_BPMP config TEGRA186 diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 25da771607..5ecadf705e 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -249,6 +249,10 @@ static ulong carveout_size(void) { #ifdef CONFIG_ARM64 return SZ_512M; +#elif defined(CONFIG_ARMV7_SECURE_RESERVE_SIZE) + // BASE+SIZE might not == 4GB. If so, we want the carveout to cover + // from BASE to 4GB, not BASE to BASE+SIZE. + return (0 - CONFIG_ARMV7_SECURE_BASE); #else return 0; #endif diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c index d32d559f13..e45f0961b2 100644 --- a/arch/arm/mach-tegra/powergate.c +++ b/arch/arm/mach-tegra/powergate.c @@ -8,7 +8,7 @@ #include <asm/io.h> #include <asm/types.h> -#include <asm/arch/flow.h> + #include <asm/arch/powergate.h> #include <asm/arch/tegra.h> @@ -74,29 +74,11 @@ static int tegra_powergate_remove_clamping(enum tegra_powergate id) return 0; } -static void tegra_powergate_ram_repair(void) -{ -#ifdef CONFIG_TEGRA124 - struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; - - /* Request RAM repair for cluster 0 and wait until complete */ - setbits_le32(&flow->ram_repair, RAM_REPAIR_REQ); - while (!(readl(&flow->ram_repair) & RAM_REPAIR_STS)) - ; - - /* Same for cluster 1 */ - setbits_le32(&flow->ram_repair_cluster1, RAM_REPAIR_REQ); - while (!(readl(&flow->ram_repair_cluster1) & RAM_REPAIR_STS)) - ; -#endif -} - int tegra_powergate_sequence_power_up(enum tegra_powergate id, enum periph_id periph) { int err; - tegra_powergate_ram_repair(); reset_set_enable(periph, 1); err = tegra_powergate_power_on(id); diff --git a/arch/arm/mach-tegra/tegra124/Kconfig b/arch/arm/mach-tegra/tegra124/Kconfig index a07add68fd..6fa31ea0a1 100644 --- a/arch/arm/mach-tegra/tegra124/Kconfig +++ b/arch/arm/mach-tegra/tegra124/Kconfig @@ -6,16 +6,16 @@ choice config TARGET_APALIS_TK1 bool "Toradex Apalis TK1 module" + select ARCH_SUPPORT_PSCI select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT - select ARCH_SUPPORT_PSCI config TARGET_JETSON_TK1 bool "NVIDIA Tegra124 Jetson TK1 board" + select ARCH_SUPPORT_PSCI select BOARD_LATE_INIT select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT - select ARCH_SUPPORT_PSCI config TARGET_CEI_TK1_SOM bool "Colorado Engineering Inc Tegra124 TK1-som board" diff --git a/arch/arm/mach-tegra/tegra124/cpu.c b/arch/arm/mach-tegra/tegra124/cpu.c index 204d6e9539..992c0beb04 100644 --- a/arch/arm/mach-tegra/tegra124/cpu.c +++ b/arch/arm/mach-tegra/tegra124/cpu.c @@ -104,6 +104,43 @@ static void remove_cpu_resets(void) writel(reg, &clkrst->crc_rst_cpug_cmplx_clr); } +static void tegra124_ram_repair(void) +{ + struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; + u32 ram_repair_timeout; /*usec*/ + u32 val; + + /* + * Request the Flow Controller perform RAM repair whenever it turns on + * a power rail that requires RAM repair. + */ + clrbits_le32(&flow->ram_repair, RAM_REPAIR_BYPASS_EN); + + /* Request SW trigerred RAM repair by setting req bit */ + /* cluster 0 */ + setbits_le32(&flow->ram_repair, RAM_REPAIR_REQ); + /* Wait for completion (status == 0) */ + ram_repair_timeout = 500; + do { + udelay(1); + val = readl(&flow->ram_repair); + } while (!(val & RAM_REPAIR_STS) && ram_repair_timeout--); + if (!ram_repair_timeout) + debug("Ram Repair cluster0 failed\n"); + + /* cluster 1 */ + setbits_le32(&flow->ram_repair_cluster1, RAM_REPAIR_REQ); + /* Wait for completion (status == 0) */ + ram_repair_timeout = 500; + do { + udelay(1); + val = readl(&flow->ram_repair_cluster1); + } while (!(val & RAM_REPAIR_STS) && ram_repair_timeout--); + + if (!ram_repair_timeout) + debug("Ram Repair cluster1 failed\n"); +} + /** * Tegra124 requires some special clock initialization, including setting up * the DVC I2C, turning on MSELECT and selecting the G CPU cluster @@ -254,10 +291,11 @@ void start_cpu(u32 reset_vector) &pmc->pmc_pwrgate_timer_mult); enable_cpu_power_rail(); + powerup_cpus(); + tegra124_ram_repair(); enable_cpu_clocks(); clock_enable_coresight(1); - remove_cpu_resets(); writel(reset_vector, EXCEP_VECTOR_CPU_RESET_VECTOR); - powerup_cpus(); + remove_cpu_resets(); debug("%s exit, should continue @ reset_vector\n", __func__); } diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 91bea776e6..bfb445a602 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -5,10 +5,10 @@ config SYS_CONFIG_NAME config ARCH_UNIPHIER_32BIT bool + select ARCH_SUPPORT_PSCI + select ARMV7_NONSEC select CPU_V7A select CPU_V7_HAS_NONSEC - select ARMV7_NONSEC - select ARCH_SUPPORT_PSCI choice prompt "UniPhier SoC select" @@ -68,8 +68,8 @@ config ARCH_UNIPHIER_LD11 config ARCH_UNIPHIER_LD20 bool "Enable UniPhier LD20 SoC support" depends on ARCH_UNIPHIER_V8_MULTI - select OF_BOARD_SETUP default y + select OF_BOARD_SETUP config ARCH_UNIPHIER_PXS3 bool "Enable UniPhier PXs3 SoC support" @@ -79,8 +79,8 @@ config ARCH_UNIPHIER_PXS3 config CACHE_UNIPHIER bool "Enable the UniPhier L2 cache controller" depends on ARCH_UNIPHIER_32BIT - select SYS_CACHE_SHIFT_7 default y + select SYS_CACHE_SHIFT_7 help This option allows to use the UniPhier System Cache as L2 cache. diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 269c51b853..d0c39d4273 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -21,6 +21,7 @@ endif obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/ micro-support-card.o obj-y += pinctrl-glue.o obj-$(CONFIG_MMC) += mmc-first-dev.o +obj-y += fdt-fixup.o endif diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c index 6a995728d4..8ffb9a8d3c 100644 --- a/arch/arm/mach-uniphier/board_late_init.c +++ b/arch/arm/mach-uniphier/board_late_init.c @@ -66,20 +66,20 @@ int board_late_init(void) switch (uniphier_boot_device_raw()) { case BOOT_DEVICE_MMC1: printf("eMMC Boot"); - env_set("bootmode", "emmcboot"); + env_set("bootcmd", "run bootcmd_mmc0; run distro_bootcmd"); break; case BOOT_DEVICE_NAND: printf("NAND Boot"); - env_set("bootmode", "nandboot"); + env_set("bootcmd", "run bootcmd_ubifs0; run distro_bootcmd"); nand_denali_wp_disable(); break; case BOOT_DEVICE_NOR: printf("NOR Boot"); - env_set("bootmode", "norboot"); + env_set("bootcmd", "run tftpboot; run distro_bootcmd"); break; case BOOT_DEVICE_USB: printf("USB Boot"); - env_set("bootmode", "usbboot"); + env_set("bootcmd", "run bootcmd_usb0; run distro_bootcmd"); break; default: printf("Unknown"); diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 2eb4836256..7e7c1d98db 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -6,8 +6,6 @@ */ #include <common.h> -#include <fdt_support.h> -#include <fdtdec.h> #include <linux/errno.h> #include <linux/kernel.h> #include <linux/printk.h> @@ -264,36 +262,3 @@ int dram_init_banksize(void) return 0; } - -#ifdef CONFIG_OF_BOARD_SETUP -/* - * The DRAM PHY requires 64 byte scratch area in each DRAM channel - * for its dynamic PHY training feature. - */ -int ft_board_setup(void *fdt, bd_t *bd) -{ - unsigned long rsv_addr; - const unsigned long rsv_size = 64; - int i, ret; - - if (uniphier_get_soc_id() != UNIPHIER_LD20_ID) - return 0; - - for (i = 0; i < ARRAY_SIZE(gd->bd->bi_dram); i++) { - if (!gd->bd->bi_dram[i].size) - continue; - - rsv_addr = gd->bd->bi_dram[i].start + gd->bd->bi_dram[i].size; - rsv_addr -= rsv_size; - - ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size); - if (ret) - return -ENOSPC; - - pr_notice(" Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n", - rsv_addr, rsv_size); - } - - return 0; -} -#endif diff --git a/arch/arm/mach-uniphier/fdt-fixup.c b/arch/arm/mach-uniphier/fdt-fixup.c new file mode 100644 index 0000000000..6f3c29d8c0 --- /dev/null +++ b/arch/arm/mach-uniphier/fdt-fixup.c @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016-2018 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + */ + +#include <common.h> +#include <fdt_support.h> +#include <fdtdec.h> +#include <jffs2/load_kernel.h> +#include <mtd_node.h> +#include <linux/kernel.h> +#include <linux/printk.h> + +#include "soc-info.h" + +/* + * The DRAM PHY requires 64 byte scratch area in each DRAM channel + * for its dynamic PHY training feature. + */ +static int uniphier_ld20_fdt_mem_rsv(void *fdt, bd_t *bd) +{ + unsigned long rsv_addr; + const unsigned long rsv_size = 64; + int i, ret; + + if (!IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD20) || + uniphier_get_soc_id() != UNIPHIER_LD20_ID) + return 0; + + for (i = 0; i < ARRAY_SIZE(bd->bi_dram); i++) { + if (!bd->bi_dram[i].size) + continue; + + rsv_addr = bd->bi_dram[i].start + bd->bi_dram[i].size; + rsv_addr -= rsv_size; + + ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size); + if (ret) + return -ENOSPC; + + pr_notice(" Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n", + rsv_addr, rsv_size); + } + + return 0; +} + +int ft_board_setup(void *fdt, bd_t *bd) +{ + static const struct node_info nodes[] = { + { "socionext,uniphier-denali-nand-v5a", MTD_DEV_TYPE_NAND }, + { "socionext,uniphier-denali-nand-v5b", MTD_DEV_TYPE_NAND }, + }; + int ret; + + fdt_fixup_mtdparts(fdt, nodes, ARRAY_SIZE(nodes)); + + ret = uniphier_ld20_fdt_mem_rsv(fdt, bd); + if (ret) + return ret; + + return 0; +} |