diff options
Diffstat (limited to 'arch/arm')
32 files changed, 1188 insertions, 324 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index bec46ce04e0..cb7ec580796 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -932,6 +932,7 @@ config ARCH_ZYNQMP_R5 select DM_SERIAL select OF_CONTROL imply CMD_DM + imply DM_USB_GADGET config ARCH_ZYNQMP bool "Xilinx ZynqMP based platform" @@ -949,6 +950,7 @@ config ARCH_ZYNQMP imply CMD_DM imply FAT_WRITE imply MP + imply DM_USB_GADGET config TEGRA bool "NVIDIA Tegra" diff --git a/arch/arm/dts/am335x-evm.dts b/arch/arm/dts/am335x-evm.dts index a6f20af648a..fe272075887 100644 --- a/arch/arm/dts/am335x-evm.dts +++ b/arch/arm/dts/am335x-evm.dts @@ -80,8 +80,6 @@ gpio_keys: volume_keys@0 { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; autorepeat; switch@9 { @@ -723,8 +721,8 @@ &mmc3 { /* these are on the crossbar and are outlined in the xbar-event-map element */ - dmas = <&edma 12 - &edma 13>; + dmas = <&edma 12 0 + &edma 13 0>; dma-names = "tx", "rx"; status = "okay"; vmmc-supply = <&wlan_en_reg>; diff --git a/arch/arm/dts/am335x-evmsk.dts b/arch/arm/dts/am335x-evmsk.dts index b3e9b61baeb..0767578aeeb 100644 --- a/arch/arm/dts/am335x-evmsk.dts +++ b/arch/arm/dts/am335x-evmsk.dts @@ -109,8 +109,6 @@ gpio_buttons: gpio_buttons@0 { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; switch@1 { label = "button0"; diff --git a/arch/arm/dts/am335x-pdu001-u-boot.dtsi b/arch/arm/dts/am335x-pdu001-u-boot.dtsi index fbb6a3ff6bb..84a07bdef46 100644 --- a/arch/arm/dts/am335x-pdu001-u-boot.dtsi +++ b/arch/arm/dts/am335x-pdu001-u-boot.dtsi @@ -29,10 +29,18 @@ u-boot,dm-pre-reloc; }; +&mmc1 { + u-boot,dm-pre-reloc; +}; + &mmc1_pins { u-boot,dm-pre-reloc; }; +&mmc2 { + u-boot,dm-pre-reloc; +}; + &mmc2_pins { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/am335x-pdu001.dts b/arch/arm/dts/am335x-pdu001.dts index 121e2c62070..3a5e9526635 100644 --- a/arch/arm/dts/am335x-pdu001.dts +++ b/arch/arm/dts/am335x-pdu001.dts @@ -576,7 +576,7 @@ bus-width = <4>; pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins>; - cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; + cd-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; }; &sham { diff --git a/arch/arm/dts/am335x-pxm2.dtsi b/arch/arm/dts/am335x-pxm2.dtsi index 8d58cd4c917..d9243d5d3d9 100644 --- a/arch/arm/dts/am335x-pxm2.dtsi +++ b/arch/arm/dts/am335x-pxm2.dtsi @@ -50,8 +50,6 @@ gpio_keys: restart-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; autorepeat; restart0 { diff --git a/arch/arm/dts/am335x-rut.dts b/arch/arm/dts/am335x-rut.dts index c6cfbb8033e..a5716a929f6 100644 --- a/arch/arm/dts/am335x-rut.dts +++ b/arch/arm/dts/am335x-rut.dts @@ -36,8 +36,6 @@ gpio_keys: powerfail-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; autorepeat; pwr-fail0 { @@ -190,12 +188,8 @@ &epwmss1 { status = "okay"; - - ehrpwm1: ehrpwm@48302200 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&epwmss1_pins>; - }; + pinctrl-names = "default"; + pinctrl-0 = <&epwmss1_pins>; }; &gpmc { diff --git a/arch/arm/dts/am33xx-clocks.dtsi b/arch/arm/dts/am33xx-clocks.dtsi index afb4b3a7bab..95d5c9d136c 100644 --- a/arch/arm/dts/am33xx-clocks.dtsi +++ b/arch/arm/dts/am33xx-clocks.dtsi @@ -8,7 +8,7 @@ * published by the Free Software Foundation. */ &scm_clocks { - sys_clkin_ck: sys_clkin_ck { + sys_clkin_ck: sys_clkin_ck@40 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>; @@ -163,7 +163,7 @@ clock-frequency = <12000000>; }; - dpll_core_ck: dpll_core_ck { + dpll_core_ck: dpll_core_ck@490 { #clock-cells = <0>; compatible = "ti,am3-dpll-core-clock"; clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; @@ -176,7 +176,7 @@ clocks = <&dpll_core_ck>; }; - dpll_core_m4_ck: dpll_core_m4_ck { + dpll_core_m4_ck: dpll_core_m4_ck@480 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&dpll_core_x2_ck>; @@ -185,7 +185,7 @@ ti,index-starts-at-one; }; - dpll_core_m5_ck: dpll_core_m5_ck { + dpll_core_m5_ck: dpll_core_m5_ck@484 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&dpll_core_x2_ck>; @@ -194,7 +194,7 @@ ti,index-starts-at-one; }; - dpll_core_m6_ck: dpll_core_m6_ck { + dpll_core_m6_ck: dpll_core_m6_ck@4d8 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&dpll_core_x2_ck>; @@ -203,14 +203,14 @@ ti,index-starts-at-one; }; - dpll_mpu_ck: dpll_mpu_ck { + dpll_mpu_ck: dpll_mpu_ck@488 { #clock-cells = <0>; compatible = "ti,am3-dpll-clock"; clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; reg = <0x0488>, <0x0420>, <0x042c>; }; - dpll_mpu_m2_ck: dpll_mpu_m2_ck { + dpll_mpu_m2_ck: dpll_mpu_m2_ck@4a8 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&dpll_mpu_ck>; @@ -219,14 +219,14 @@ ti,index-starts-at-one; }; - dpll_ddr_ck: dpll_ddr_ck { + dpll_ddr_ck: dpll_ddr_ck@494 { #clock-cells = <0>; compatible = "ti,am3-dpll-no-gate-clock"; clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; reg = <0x0494>, <0x0434>, <0x0440>; }; - dpll_ddr_m2_ck: dpll_ddr_m2_ck { + dpll_ddr_m2_ck: dpll_ddr_m2_ck@4a0 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&dpll_ddr_ck>; @@ -243,14 +243,14 @@ clock-div = <2>; }; - dpll_disp_ck: dpll_disp_ck { + dpll_disp_ck: dpll_disp_ck@498 { #clock-cells = <0>; compatible = "ti,am3-dpll-no-gate-clock"; clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; reg = <0x0498>, <0x0448>, <0x0454>; }; - dpll_disp_m2_ck: dpll_disp_m2_ck { + dpll_disp_m2_ck: dpll_disp_m2_ck@4a4 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&dpll_disp_ck>; @@ -260,14 +260,14 @@ ti,set-rate-parent; }; - dpll_per_ck: dpll_per_ck { + dpll_per_ck: dpll_per_ck@48c { #clock-cells = <0>; compatible = "ti,am3-dpll-no-gate-j-type-clock"; clocks = <&sys_clkin_ck>, <&sys_clkin_ck>; reg = <0x048c>, <0x0470>, <0x049c>; }; - dpll_per_m2_ck: dpll_per_m2_ck { + dpll_per_m2_ck: dpll_per_m2_ck@4ac { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&dpll_per_ck>; @@ -292,14 +292,6 @@ clock-div = <4>; }; - cefuse_fck: cefuse_fck { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&sys_clkin_ck>; - ti,bit-shift = <1>; - reg = <0x0a20>; - }; - clk_24mhz: clk_24mhz { #clock-cells = <0>; compatible = "fixed-factor-clock"; @@ -316,14 +308,6 @@ clock-div = <732>; }; - clkdiv32k_ick: clkdiv32k_ick { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&clkdiv32k_ck>; - ti,bit-shift = <1>; - reg = <0x014c>; - }; - l3_gclk: l3_gclk { #clock-cells = <0>; compatible = "fixed-factor-clock"; @@ -332,14 +316,14 @@ clock-div = <1>; }; - pruss_ocp_gclk: pruss_ocp_gclk { + pruss_ocp_gclk: pruss_ocp_gclk@530 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&l3_gclk>, <&dpll_disp_m2_ck>; reg = <0x0530>; }; - mmu_fck: mmu_fck { + mmu_fck: mmu_fck@914 { #clock-cells = <0>; compatible = "ti,gate-clock"; clocks = <&dpll_core_m4_ck>; @@ -347,56 +331,56 @@ reg = <0x0914>; }; - timer1_fck: timer1_fck { + timer1_fck: timer1_fck@528 { #clock-cells = <0>; compatible = "ti,mux-clock"; - clocks = <&sys_clkin_ck>, <&clkdiv32k_ick>, <&tclkin_ck>, <&clk_rc32k_ck>, <&clk_32768_ck>; + clocks = <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>, <&tclkin_ck>, <&clk_rc32k_ck>, <&clk_32768_ck>; reg = <0x0528>; }; - timer2_fck: timer2_fck { + timer2_fck: timer2_fck@508 { #clock-cells = <0>; compatible = "ti,mux-clock"; - clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; + clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>; reg = <0x0508>; }; - timer3_fck: timer3_fck { + timer3_fck: timer3_fck@50c { #clock-cells = <0>; compatible = "ti,mux-clock"; - clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; + clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>; reg = <0x050c>; }; - timer4_fck: timer4_fck { + timer4_fck: timer4_fck@510 { #clock-cells = <0>; compatible = "ti,mux-clock"; - clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; + clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>; reg = <0x0510>; }; - timer5_fck: timer5_fck { + timer5_fck: timer5_fck@518 { #clock-cells = <0>; compatible = "ti,mux-clock"; - clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; + clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>; reg = <0x0518>; }; - timer6_fck: timer6_fck { + timer6_fck: timer6_fck@51c { #clock-cells = <0>; compatible = "ti,mux-clock"; - clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; + clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>; reg = <0x051c>; }; - timer7_fck: timer7_fck { + timer7_fck: timer7_fck@504 { #clock-cells = <0>; compatible = "ti,mux-clock"; - clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clkdiv32k_ick>; + clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>; reg = <0x0504>; }; - usbotg_fck: usbotg_fck { + usbotg_fck: usbotg_fck@47c { #clock-cells = <0>; compatible = "ti,gate-clock"; clocks = <&dpll_per_ck>; @@ -412,7 +396,7 @@ clock-div = <2>; }; - ieee5000_fck: ieee5000_fck { + ieee5000_fck: ieee5000_fck@e4 { #clock-cells = <0>; compatible = "ti,gate-clock"; clocks = <&dpll_core_m4_div2_ck>; @@ -420,10 +404,10 @@ reg = <0x00e4>; }; - wdt1_fck: wdt1_fck { + wdt1_fck: wdt1_fck@538 { #clock-cells = <0>; compatible = "ti,mux-clock"; - clocks = <&clk_rc32k_ck>, <&clkdiv32k_ick>; + clocks = <&clk_rc32k_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>; reg = <0x0538>; }; @@ -483,53 +467,21 @@ clock-div = <2>; }; - cpsw_cpts_rft_clk: cpsw_cpts_rft_clk { + cpsw_cpts_rft_clk: cpsw_cpts_rft_clk@520 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&dpll_core_m5_ck>, <&dpll_core_m4_ck>; reg = <0x0520>; }; - gpio0_dbclk_mux_ck: gpio0_dbclk_mux_ck { + gpio0_dbclk_mux_ck: gpio0_dbclk_mux_ck@53c { #clock-cells = <0>; compatible = "ti,mux-clock"; - clocks = <&clk_rc32k_ck>, <&clk_32768_ck>, <&clkdiv32k_ick>; + clocks = <&clk_rc32k_ck>, <&clk_32768_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>; reg = <0x053c>; }; - gpio0_dbclk: gpio0_dbclk { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&gpio0_dbclk_mux_ck>; - ti,bit-shift = <18>; - reg = <0x0408>; - }; - - gpio1_dbclk: gpio1_dbclk { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&clkdiv32k_ick>; - ti,bit-shift = <18>; - reg = <0x00ac>; - }; - - gpio2_dbclk: gpio2_dbclk { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&clkdiv32k_ick>; - ti,bit-shift = <18>; - reg = <0x00b0>; - }; - - gpio3_dbclk: gpio3_dbclk { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&clkdiv32k_ick>; - ti,bit-shift = <18>; - reg = <0x00b4>; - }; - - lcd_gclk: lcd_gclk { + lcd_gclk: lcd_gclk@534 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&dpll_disp_m2_ck>, <&dpll_core_m5_ck>, <&dpll_per_m2_ck>; @@ -545,7 +497,7 @@ clock-div = <2>; }; - gfx_fclk_clksel_ck: gfx_fclk_clksel_ck { + gfx_fclk_clksel_ck: gfx_fclk_clksel_ck@52c { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&dpll_core_m4_ck>, <&dpll_per_m2_ck>; @@ -553,7 +505,7 @@ reg = <0x052c>; }; - gfx_fck_div_ck: gfx_fck_div_ck { + gfx_fck_div_ck: gfx_fck_div_ck@52c { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&gfx_fclk_clksel_ck>; @@ -561,14 +513,14 @@ ti,max-div = <2>; }; - sysclkout_pre_ck: sysclkout_pre_ck { + sysclkout_pre_ck: sysclkout_pre_ck@700 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&clk_32768_ck>, <&l3_gclk>, <&dpll_ddr_m2_ck>, <&dpll_per_m2_ck>, <&lcd_gclk>; reg = <0x0700>; }; - clkout2_div_ck: clkout2_div_ck { + clkout2_div_ck: clkout2_div_ck@700 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&sysclkout_pre_ck>; @@ -577,59 +529,7 @@ reg = <0x0700>; }; - dbg_sysclk_ck: dbg_sysclk_ck { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&sys_clkin_ck>; - ti,bit-shift = <19>; - reg = <0x0414>; - }; - - dbg_clka_ck: dbg_clka_ck { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&dpll_core_m4_ck>; - ti,bit-shift = <30>; - reg = <0x0414>; - }; - - stm_pmd_clock_mux_ck: stm_pmd_clock_mux_ck { - #clock-cells = <0>; - compatible = "ti,mux-clock"; - clocks = <&dbg_sysclk_ck>, <&dbg_clka_ck>; - ti,bit-shift = <22>; - reg = <0x0414>; - }; - - trace_pmd_clk_mux_ck: trace_pmd_clk_mux_ck { - #clock-cells = <0>; - compatible = "ti,mux-clock"; - clocks = <&dbg_sysclk_ck>, <&dbg_clka_ck>; - ti,bit-shift = <20>; - reg = <0x0414>; - }; - - stm_clk_div_ck: stm_clk_div_ck { - #clock-cells = <0>; - compatible = "ti,divider-clock"; - clocks = <&stm_pmd_clock_mux_ck>; - ti,bit-shift = <27>; - ti,max-div = <64>; - reg = <0x0414>; - ti,index-power-of-two; - }; - - trace_clk_div_ck: trace_clk_div_ck { - #clock-cells = <0>; - compatible = "ti,divider-clock"; - clocks = <&trace_pmd_clk_mux_ck>; - ti,bit-shift = <24>; - ti,max-div = <64>; - reg = <0x0414>; - ti,index-power-of-two; - }; - - clkout2_ck: clkout2_ck { + clkout2_ck: clkout2_ck@700 { #clock-cells = <0>; compatible = "ti,gate-clock"; clocks = <&clkout2_div_ck>; @@ -638,9 +538,88 @@ }; }; -&prcm_clockdomains { - clk_24mhz_clkdm: clk_24mhz_clkdm { - compatible = "ti,clockdomain"; - clocks = <&clkdiv32k_ick>; +&prcm { + l4_per_cm: l4_per_cm@0 { + compatible = "ti,omap4-cm"; + reg = <0x0 0x200>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x200>; + + l4_per_clkctrl: clk@14 { + compatible = "ti,clkctrl"; + reg = <0x14 0x13c>; + #clock-cells = <2>; + }; + }; + + l4_wkup_cm: l4_wkup_cm@400 { + compatible = "ti,omap4-cm"; + reg = <0x400 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x400 0x100>; + + l4_wkup_clkctrl: clk@4 { + compatible = "ti,clkctrl"; + reg = <0x4 0xd4>; + #clock-cells = <2>; + }; + }; + + mpu_cm: mpu_cm@600 { + compatible = "ti,omap4-cm"; + reg = <0x600 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x600 0x100>; + + mpu_clkctrl: clk@4 { + compatible = "ti,clkctrl"; + reg = <0x4 0x4>; + #clock-cells = <2>; + }; + }; + + l4_rtc_cm: l4_rtc_cm@800 { + compatible = "ti,omap4-cm"; + reg = <0x800 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x800 0x100>; + + l4_rtc_clkctrl: clk@0 { + compatible = "ti,clkctrl"; + reg = <0x0 0x4>; + #clock-cells = <2>; + }; + }; + + gfx_l3_cm: gfx_l3_cm@900 { + compatible = "ti,omap4-cm"; + reg = <0x900 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x900 0x100>; + + gfx_l3_clkctrl: clk@4 { + compatible = "ti,clkctrl"; + reg = <0x4 0x4>; + #clock-cells = <2>; + }; + }; + + l4_cefuse_cm: l4_cefuse_cm@a00 { + compatible = "ti,omap4-cm"; + reg = <0xa00 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xa00 0x100>; + + l4_cefuse_clkctrl: clk@20 { + compatible = "ti,clkctrl"; + reg = <0x20 0x4>; + #clock-cells = <2>; + }; }; }; diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi index 42345375e68..d3dd6a16e70 100644 --- a/arch/arm/dts/am33xx.dtsi +++ b/arch/arm/dts/am33xx.dtsi @@ -10,12 +10,14 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pinctrl/am33xx.h> - -#include "skeleton.dtsi" +#include <dt-bindings/clock/am3.h> / { compatible = "ti,am33xx"; interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <1>; + chosen { }; aliases { i2c0 = &i2c0; @@ -27,14 +29,16 @@ serial3 = &uart3; serial4 = &uart4; serial5 = &uart5; - d_can0 = &dcan0; - d_can1 = &dcan1; + d-can0 = &dcan0; + d-can1 = &dcan1; usb0 = &usb0; usb1 = &usb1; phy0 = &usb0_phy; phy1 = &usb1_phy; ethernet0 = &cpsw_emac0; ethernet1 = &cpsw_emac1; + spi0 = &spi0; + spi1 = &spi1; }; cpus { @@ -45,19 +49,7 @@ device_type = "cpu"; reg = <0>; - /* - * To consider voltage drop between PMIC and SoC, - * tolerance value is reduced to 2% from 4% and - * voltage value is increased as a precaution. - */ - operating-points = < - /* kHz uV */ - 720000 1285000 - 600000 1225000 - 500000 1125000 - 275000 1125000 - >; - voltage-tolerance = <2>; /* 2 percentage */ + operating-points-v2 = <&cpu0_opp_table>; clocks = <&dpll_mpu_ck>; clock-names = "cpu"; @@ -66,9 +58,84 @@ }; }; - pmu { + cpu0_opp_table: opp-table { + compatible = "operating-points-v2-ti-cpu"; + syscon = <&scm_conf>; + + /* + * The three following nodes are marked with opp-suspend + * because the can not be enabled simultaneously on a + * single SoC. + */ + opp50-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <950000 931000 969000>; + opp-supported-hw = <0x06 0x0010>; + opp-suspend; + }; + + opp100-275000000 { + opp-hz = /bits/ 64 <275000000>; + opp-microvolt = <1100000 1078000 1122000>; + opp-supported-hw = <0x01 0x00FF>; + opp-suspend; + }; + + opp100-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <1100000 1078000 1122000>; + opp-supported-hw = <0x06 0x0020>; + opp-suspend; + }; + + opp100-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <1100000 1078000 1122000>; + opp-supported-hw = <0x01 0xFFFF>; + }; + + opp100-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1100000 1078000 1122000>; + opp-supported-hw = <0x06 0x0040>; + }; + + opp120-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1200000 1176000 1224000>; + opp-supported-hw = <0x01 0xFFFF>; + }; + + opp120-720000000 { + opp-hz = /bits/ 64 <720000000>; + opp-microvolt = <1200000 1176000 1224000>; + opp-supported-hw = <0x06 0x0080>; + }; + + oppturbo-720000000 { + opp-hz = /bits/ 64 <720000000>; + opp-microvolt = <1260000 1234800 1285200>; + opp-supported-hw = <0x01 0xFFFF>; + }; + + oppturbo-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1260000 1234800 1285200>; + opp-supported-hw = <0x06 0x0100>; + }; + + oppnitro-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <1325000 1298500 1351500>; + opp-supported-hw = <0x04 0x0200>; + }; + }; + + pmu@4b000000 { compatible = "arm,cortex-a8-pmu"; interrupts = <3>; + reg = <0x4b000000 0x1000000>; + ti,hwmods = "debugss"; }; /* @@ -80,6 +147,8 @@ mpu { compatible = "ti,omap3-mpu"; ti,hwmods = "mpu"; + pm-sram = <&pm_sram_code + &pm_sram_data>; }; }; @@ -91,7 +160,6 @@ * the whole bus hierarchy. */ ocp { - u-boot,dm-spl; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -104,9 +172,21 @@ #size-cells = <1>; ranges = <0 0x44c00000 0x280000>; + wkup_m3: wkup_m3@100000 { + compatible = "ti,am3352-wkup-m3"; + reg = <0x100000 0x4000>, + <0x180000 0x2000>; + reg-names = "umem", "dmem"; + ti,hwmods = "wkup_m3"; + ti,pm-firmware = "am335x-pm-firmware.elf"; + }; + prcm: prcm@200000 { - compatible = "ti,am3-prcm"; + compatible = "ti,am3-prcm", "simple-bus"; reg = <0x200000 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x200000 0x4000>; prcm_clocks: clocks { #address-cells = <1>; @@ -122,6 +202,7 @@ reg = <0x210000 0x2000>; #address-cells = <1>; #size-cells = <1>; + #pinctrl-cells = <1>; ranges = <0 0x210000 0x2000>; am33xx_pinmux: pinmux@800 { @@ -129,15 +210,17 @@ reg = <0x800 0x238>; #address-cells = <1>; #size-cells = <0>; + #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0x7f>; }; scm_conf: scm_conf@0 { - compatible = "syscon"; + compatible = "syscon", "simple-bus"; reg = <0x0 0x800>; #address-cells = <1>; #size-cells = <1>; + ranges = <0 0 0x800>; scm_clocks: clocks { #address-cells = <1>; @@ -145,6 +228,22 @@ }; }; + wkup_m3_ipc: wkup_m3_ipc@1324 { + compatible = "ti,am3352-wkup-m3-ipc"; + reg = <0x1324 0x24>; + interrupts = <78>; + ti,rproc = <&wkup_m3>; + mboxes = <&mailbox &mbox_wkupm3>; + }; + + edma_xbar: dma-router@f90 { + compatible = "ti,am335x-edma-crossbar"; + reg = <0xf90 0x40>; + #dma-cells = <3>; + dma-requests = <32>; + dma-masters = <&edma>; + }; + scm_clockdomains: clockdomains { }; }; @@ -158,12 +257,44 @@ }; edma: edma@49000000 { - compatible = "ti,edma3"; - ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; - reg = <0x49000000 0x10000>, - <0x44e10f90 0x40>; + compatible = "ti,edma3-tpcc"; + ti,hwmods = "tpcc"; + reg = <0x49000000 0x10000>; + reg-names = "edma3_cc"; interrupts = <12 13 14>; - #dma-cells = <1>; + interrupt-names = "edma3_ccint", "edma3_mperr", + "edma3_ccerrint"; + dma-requests = <64>; + #dma-cells = <2>; + + ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, + <&edma_tptc2 0>; + + ti,edma-memcpy-channels = <20 21>; + }; + + edma_tptc0: tptc@49800000 { + compatible = "ti,edma3-tptc"; + ti,hwmods = "tptc0"; + reg = <0x49800000 0x100000>; + interrupts = <112>; + interrupt-names = "edma3_tcerrint"; + }; + + edma_tptc1: tptc@49900000 { + compatible = "ti,edma3-tptc"; + ti,hwmods = "tptc1"; + reg = <0x49900000 0x100000>; + interrupts = <113>; + interrupt-names = "edma3_tcerrint"; + }; + + edma_tptc2: tptc@49a00000 { + compatible = "ti,edma3-tptc"; + ti,hwmods = "tptc2"; + reg = <0x49a00000 0x100000>; + interrupts = <114>; + interrupt-names = "edma3_tcerrint"; }; gpio0: gpio@44e07000 { @@ -211,67 +342,61 @@ }; uart0: serial@44e09000 { - compatible = "ti,omap3-uart"; + compatible = "ti,am3352-uart", "ti,omap3-uart"; ti,hwmods = "uart1"; clock-frequency = <48000000>; reg = <0x44e09000 0x2000>; - reg-shift = <2>; interrupts = <72>; status = "disabled"; - dmas = <&edma 26>, <&edma 27>; + dmas = <&edma 26 0>, <&edma 27 0>; dma-names = "tx", "rx"; }; uart1: serial@48022000 { - compatible = "ti,omap3-uart"; + compatible = "ti,am3352-uart", "ti,omap3-uart"; ti,hwmods = "uart2"; clock-frequency = <48000000>; reg = <0x48022000 0x2000>; - reg-shift = <2>; interrupts = <73>; status = "disabled"; - dmas = <&edma 28>, <&edma 29>; + dmas = <&edma 28 0>, <&edma 29 0>; dma-names = "tx", "rx"; }; uart2: serial@48024000 { - compatible = "ti,omap3-uart"; + compatible = "ti,am3352-uart", "ti,omap3-uart"; ti,hwmods = "uart3"; clock-frequency = <48000000>; reg = <0x48024000 0x2000>; - reg-shift = <2>; interrupts = <74>; status = "disabled"; - dmas = <&edma 30>, <&edma 31>; + dmas = <&edma 30 0>, <&edma 31 0>; dma-names = "tx", "rx"; }; uart3: serial@481a6000 { - compatible = "ti,omap3-uart"; + compatible = "ti,am3352-uart", "ti,omap3-uart"; ti,hwmods = "uart4"; clock-frequency = <48000000>; reg = <0x481a6000 0x2000>; - reg-shift = <2>; interrupts = <44>; status = "disabled"; }; uart4: serial@481a8000 { - compatible = "ti,omap3-uart"; + compatible = "ti,am3352-uart", "ti,omap3-uart"; ti,hwmods = "uart5"; clock-frequency = <48000000>; reg = <0x481a8000 0x2000>; - reg-shift = <2>; interrupts = <45>; status = "disabled"; }; uart5: serial@481aa000 { - compatible = "ti,omap3-uart"; + compatible = "ti,am3352-uart", "ti,omap3-uart"; ti,hwmods = "uart6"; clock-frequency = <48000000>; reg = <0x481aa000 0x2000>; - reg-shift = <2>; interrupts = <46>; status = "disabled"; }; @@ -312,8 +437,8 @@ ti,dual-volt; ti,needs-special-reset; ti,needs-special-hs-handling; - dmas = <&edma 24 - &edma 25>; + dmas = <&edma_xbar 24 0 0 + &edma_xbar 25 0 0>; dma-names = "tx", "rx"; interrupts = <64>; reg = <0x48060000 0x1000>; @@ -324,8 +449,8 @@ compatible = "ti,omap4-hsmmc"; ti,hwmods = "mmc2"; ti,needs-special-reset; - dmas = <&edma 2 - &edma 3>; + dmas = <&edma 2 0 + &edma 3 0>; dma-names = "tx", "rx"; interrupts = <28>; reg = <0x481d8000 0x1000>; @@ -377,7 +502,7 @@ status = "disabled"; }; - mailbox: mailbox@480C8000 { + mailbox: mailbox@480c8000 { compatible = "ti,omap4-mailbox"; reg = <0x480C8000 0x200>; interrupts = <77>; @@ -386,6 +511,7 @@ ti,mbox-num-users = <4>; ti,mbox-num-fifos = <8>; mbox_wkupm3: wkup_m3 { + ti,mbox-send-noirq; ti,mbox-tx = <0 0 0>; ti,mbox-rx = <0 0 3>; }; @@ -397,6 +523,8 @@ interrupts = <67>; ti,hwmods = "timer1"; ti,timer-alwon; + clocks = <&timer1_fck>; + clock-names = "fck"; }; timer2: timer@48040000 { @@ -404,6 +532,8 @@ reg = <0x48040000 0x400>; interrupts = <68>; ti,hwmods = "timer2"; + clocks = <&timer2_fck>; + clock-names = "fck"; }; timer3: timer@48042000 { @@ -451,6 +581,8 @@ interrupts = <75 76>; ti,hwmods = "rtc"; + clocks = <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>; + clock-names = "int-clk"; }; spi0: spi@48030000 { @@ -461,10 +593,10 @@ interrupts = <65>; ti,spi-num-cs = <2>; ti,hwmods = "spi0"; - dmas = <&edma 16 - &edma 17 - &edma 18 - &edma 19>; + dmas = <&edma 16 0 + &edma 17 0 + &edma 18 0 + &edma 19 0>; dma-names = "tx0", "rx0", "tx1", "rx1"; status = "disabled"; }; @@ -477,10 +609,10 @@ interrupts = <125>; ti,spi-num-cs = <2>; ti,hwmods = "spi1"; - dmas = <&edma 42 - &edma 43 - &edma 44 - &edma 45>; + dmas = <&edma 42 0 + &edma 43 0 + &edma 44 0 + &edma 45 0>; dma-names = "tx0", "rx0", "tx1", "rx1"; status = "disabled"; }; @@ -508,6 +640,7 @@ reg-names = "phy"; status = "disabled"; ti,ctrl_mod = <&usb_ctrl_mod>; + #phy-cells = <0>; }; usb0: usb@47401000 { @@ -556,6 +689,7 @@ reg-names = "phy"; status = "disabled"; ti,ctrl_mod = <&usb_ctrl_mod>; + #phy-cells = <0>; }; usb1: usb@47401800 { @@ -625,20 +759,24 @@ 0x48300200 0x48300200 0x80>; /* EHRPWM */ ecap0: ecap@48300100 { - compatible = "ti,am33xx-ecap"; + compatible = "ti,am3352-ecap", + "ti,am33xx-ecap"; #pwm-cells = <3>; reg = <0x48300100 0x80>; + clocks = <&l4ls_gclk>; + clock-names = "fck"; interrupts = <31>; interrupt-names = "ecap0"; - ti,hwmods = "ecap0"; status = "disabled"; }; - ehrpwm0: ehrpwm@48300200 { - compatible = "ti,am33xx-ehrpwm"; + ehrpwm0: pwm@48300200 { + compatible = "ti,am3352-ehrpwm", + "ti,am33xx-ehrpwm"; #pwm-cells = <3>; reg = <0x48300200 0x80>; - ti,hwmods = "ehrpwm0"; + clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; + clock-names = "tbclk", "fck"; status = "disabled"; }; }; @@ -655,20 +793,24 @@ 0x48302200 0x48302200 0x80>; /* EHRPWM */ ecap1: ecap@48302100 { - compatible = "ti,am33xx-ecap"; + compatible = "ti,am3352-ecap", + "ti,am33xx-ecap"; #pwm-cells = <3>; reg = <0x48302100 0x80>; + clocks = <&l4ls_gclk>; + clock-names = "fck"; interrupts = <47>; interrupt-names = "ecap1"; - ti,hwmods = "ecap1"; status = "disabled"; }; - ehrpwm1: ehrpwm@48302200 { - compatible = "ti,am33xx-ehrpwm"; + ehrpwm1: pwm@48302200 { + compatible = "ti,am3352-ehrpwm", + "ti,am33xx-ehrpwm"; #pwm-cells = <3>; reg = <0x48302200 0x80>; - ti,hwmods = "ehrpwm1"; + clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>; + clock-names = "tbclk", "fck"; status = "disabled"; }; }; @@ -685,34 +827,36 @@ 0x48304200 0x48304200 0x80>; /* EHRPWM */ ecap2: ecap@48304100 { - compatible = "ti,am33xx-ecap"; + compatible = "ti,am3352-ecap", + "ti,am33xx-ecap"; #pwm-cells = <3>; reg = <0x48304100 0x80>; + clocks = <&l4ls_gclk>; + clock-names = "fck"; interrupts = <61>; interrupt-names = "ecap2"; - ti,hwmods = "ecap2"; status = "disabled"; }; - ehrpwm2: ehrpwm@48304200 { - compatible = "ti,am33xx-ehrpwm"; + ehrpwm2: pwm@48304200 { + compatible = "ti,am3352-ehrpwm", + "ti,am33xx-ehrpwm"; #pwm-cells = <3>; reg = <0x48304200 0x80>; - ti,hwmods = "ehrpwm2"; + clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>; + clock-names = "tbclk", "fck"; status = "disabled"; }; }; mac: ethernet@4a100000 { - compatible = "ti,cpsw"; + compatible = "ti,am335x-cpsw","ti,cpsw"; ti,hwmods = "cpgmac0"; clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; clock-names = "fck", "cpts"; cpdma_channels = <8>; ale_entries = <1024>; bd_ram_size = <0x2000>; - no_bd_ram = <0>; - rx_descs = <64>; mac_control = <0x20>; slaves = <2>; active_slave = <0>; @@ -734,7 +878,7 @@ status = "disabled"; davinci_mdio: mdio@4a101000 { - compatible = "ti,davinci_mdio"; + compatible = "ti,cpsw-mdio","ti,davinci_mdio"; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "davinci_mdio"; @@ -763,14 +907,21 @@ ocmcram: ocmcram@40300000 { compatible = "mmio-sram"; reg = <0x40300000 0x10000>; /* 64k */ - }; + ranges = <0x0 0x40300000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; - wkup_m3: wkup_m3@44d00000 { - compatible = "ti,am3353-wkup-m3"; - reg = <0x44d00000 0x4000 /* M3 UMEM */ - 0x44d80000 0x2000>; /* M3 DMEM */ - ti,hwmods = "wkup_m3"; - ti,no-reset-on-init; + pm_sram_code: pm-sram-code@0 { + compatible = "ti,sram"; + reg = <0x0 0x1000>; + protect-exec; + }; + + pm_sram_data: pm-sram-data@1000 { + compatible = "ti,sram"; + reg = <0x1000 0x1000>; + pool; + }; }; elm: elm@48080000 { @@ -795,6 +946,8 @@ interrupts = <16>; ti,hwmods = "adc_tsc"; status = "disabled"; + dmas = <&edma 53 0>, <&edma 57 0>; + dma-names = "fifo0", "fifo1"; tsc { compatible = "ti,am3359-tsc"; @@ -805,16 +958,32 @@ }; }; + emif: emif@4c000000 { + compatible = "ti,emif-am3352"; + reg = <0x4c000000 0x1000000>; + ti,hwmods = "emif"; + interrupts = <101>; + sram = <&pm_sram_code + &pm_sram_data>; + ti,no-idle; + }; + gpmc: gpmc@50000000 { compatible = "ti,am3352-gpmc"; ti,hwmods = "gpmc"; ti,no-idle-on-init; reg = <0x50000000 0x2000>; interrupts = <100>; + dmas = <&edma 52 0>; + dma-names = "rxtx"; gpmc,num-cs = <7>; gpmc,num-waitpins = <2>; #address-cells = <2>; #size-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; status = "disabled"; }; @@ -823,7 +992,7 @@ ti,hwmods = "sham"; reg = <0x53100000 0x200>; interrupts = <109>; - dmas = <&edma 36>; + dmas = <&edma 36 0>; dma-names = "rx"; }; @@ -832,8 +1001,8 @@ ti,hwmods = "aes"; reg = <0x53500000 0xa0>; interrupts = <103>; - dmas = <&edma 6>, - <&edma 5>; + dmas = <&edma 6 0>, + <&edma 5 0>; dma-names = "tx", "rx"; }; @@ -846,12 +1015,12 @@ interrupts = <80>, <81>; interrupt-names = "tx", "rx"; status = "disabled"; - dmas = <&edma 8>, - <&edma 9>; + dmas = <&edma 8 2>, + <&edma 9 2>; dma-names = "tx", "rx"; }; - mcasp1: mcasp@4803C000 { + mcasp1: mcasp@4803c000 { compatible = "ti,am33xx-mcasp-audio"; ti,hwmods = "mcasp1"; reg = <0x4803C000 0x2000>, @@ -860,8 +1029,8 @@ interrupts = <82>, <83>; interrupt-names = "tx", "rx"; status = "disabled"; - dmas = <&edma 10>, - <&edma 11>; + dmas = <&edma 10 2>, + <&edma 11 2>; dma-names = "tx", "rx"; }; @@ -874,4 +1043,4 @@ }; }; -/include/ "am33xx-clocks.dtsi" +#include "am33xx-clocks.dtsi" diff --git a/arch/arm/dts/am3517-evm-ui.dtsi b/arch/arm/dts/am3517-evm-ui.dtsi new file mode 100644 index 00000000000..e841918c1c2 --- /dev/null +++ b/arch/arm/dts/am3517-evm-ui.dtsi @@ -0,0 +1,220 @@ +/* + * Copyright (C) 2018 Logic PD, Inc - http://www.logicpd.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <dt-bindings/input/input.h> + +/ { + codec1 { + compatible = "simple-audio-card"; + simple-audio-card,name = "tlv320aic23-hifi"; + + simple-audio-card,widgets = + "Microphone", "Mic In", + "Line", "Line In", + "Line", "Line Out"; + + simple-audio-card,routing = + "Line Out", "LOUT", + "Line Out", "ROUT", + "LLINEIN", "Line In", + "RLINEIN", "Line In", + "MICIN", "Mic In"; + + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&sound_master>; + simple-audio-card,frame-master = <&sound_master>; + + simple-audio-card,cpu { + sound-dai = <&mcbsp1>; + }; + + sound_master: simple-audio-card,codec { + sound-dai = <&tlv320aic23_1>; + system-clock-frequency = <12000000>; + }; + }; + + codec2 { + compatible = "simple-audio-card"; + simple-audio-card,name = "tlv320aic23-hifi"; + + simple-audio-card,widgets = + "Microphone", "Mic In", + "Line", "Line In", + "Line", "Line Out"; + + simple-audio-card,routing = + "Line Out", "LOUT", + "Line Out", "ROUT", + "LLINEIN", "Line In", + "RLINEIN", "Line In", + "MICIN", "Mic In"; + + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&sound_master2>; + simple-audio-card,frame-master = <&sound_master2>; + + simple-audio-card,cpu { + sound-dai = <&mcbsp2>; + }; + + sound_master2: simple-audio-card,codec { + sound-dai = <&tlv320aic23_2>; + system-clock-frequency = <12000000>; + }; + }; + + expander-keys { + compatible = "gpio-keys-polled"; + poll-interval = <100>; + + record { + label = "Record"; + /* linux,code = <BTN_0>; */ + gpios = <&tca6416_2 15 GPIO_ACTIVE_LOW>; + }; + + play { + label = "Play"; + linux,code = <KEY_PLAY>; + gpios = <&tca6416_2 14 GPIO_ACTIVE_LOW>; + }; + + Stop { + label = "Stop"; + linux,code = <KEY_STOP>; + gpios = <&tca6416_2 13 GPIO_ACTIVE_LOW>; + }; + + fwd { + label = "FWD"; + linux,code = <KEY_FASTFORWARD>; + gpios = <&tca6416_2 12 GPIO_ACTIVE_LOW>; + }; + + rwd { + label = "RWD"; + linux,code = <KEY_REWIND>; + gpios = <&tca6416_2 11 GPIO_ACTIVE_LOW>; + }; + + shift { + label = "Shift"; + linux,code = <KEY_LEFTSHIFT>; + gpios = <&tca6416_2 10 GPIO_ACTIVE_LOW>; + }; + + Mode { + label = "Mode"; + linux,code = <BTN_MODE>; + gpios = <&tca6416_2 9 GPIO_ACTIVE_LOW>; + }; + + Menu { + label = "Menu"; + linux,code = <KEY_MENU>; + gpios = <&tca6416_2 8 GPIO_ACTIVE_LOW>; + }; + + Up { + label = "Up"; + linux,code = <KEY_UP>; + gpios = <&tca6416_2 7 GPIO_ACTIVE_LOW>; + }; + + Down { + label = "Down"; + linux,code = <KEY_DOWN>; + gpios = <&tca6416_2 6 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&i2c2 { + /* Audio codecs */ + tlv320aic23_1: codec@1a { + compatible = "ti,tlv320aic23"; + reg = <0x1a>; + #sound-dai-cells= <0>; + status = "okay"; + }; + + tlv320aic23_2: codec@1b { + compatible = "ti,tlv320aic23"; + reg = <0x1b>; + #sound-dai-cells= <0>; + status = "okay"; + }; +}; + +&i2c3 { + /* Audio codecs */ + tlv320aic23_3: codec@1a { + compatible = "ti,tlv320aic23"; + reg = <0x1a>; + #sound-dai-cells= <0>; + status = "okay"; + }; + + /* GPIO Expanders */ + tca6416_2: gpio@20 { + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + vcc-supply = <&vdd_io_reg>; + }; + + tca6416_3: gpio@21 { + compatible = "ti,tca6416"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + vcc-supply = <&vdd_io_reg>; + }; + + /* TVP5146 Analog Video decoder input */ + tvp5146@5c { + compatible = "ti,tvp5146m2"; + reg = <0x5c>; + }; +}; + +&mcbsp1 { + status = "ok"; + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&mcbsp1_pins>; +}; + +&mcbsp2 { + status = "ok"; + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&mcbsp2_pins>; +}; + +&omap3_pmx_core { + mcbsp1_pins: pinmux_mcbsp1_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dx */ + OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dr */ + OMAP3_CORE1_IOPAD(0x2196, PIN_INPUT | MUX_MODE0) /* mcbsp_clks.mcbsp1_fsx */ + OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE0) /* mcbsp1_clkx.mcbsp1_clkx */ + >; + }; + + mcbsp2_pins: pinmux_mcbsp2_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */ + OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */ + OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */ + OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */ + >; + }; +}; diff --git a/arch/arm/dts/am3517-evm.dts b/arch/arm/dts/am3517-evm.dts index 1d158cfda15..1e2bb68231a 100644 --- a/arch/arm/dts/am3517-evm.dts +++ b/arch/arm/dts/am3517-evm.dts @@ -9,6 +9,7 @@ #include "am3517.dtsi" #include "am3517-som.dtsi" +#include "am3517-evm-ui.dtsi" #include <dt-bindings/input/input.h> / { @@ -227,7 +228,7 @@ vmmc-supply = <&vmmc_fixed>; bus-width = <4>; wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */ - cd-gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio_127 */ + cd-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; /* gpio_127 */ }; &mmc3 { diff --git a/arch/arm/dts/am3517-som.dtsi b/arch/arm/dts/am3517-som.dtsi index dae6e458e59..b1c988eed87 100644 --- a/arch/arm/dts/am3517-som.dtsi +++ b/arch/arm/dts/am3517-som.dtsi @@ -163,7 +163,7 @@ compatible = "ti,wl1271"; reg = <2>; interrupt-parent = <&gpio6>; - interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; /* gpio_170 */ + interrupts = <10 IRQ_TYPE_EDGE_RISING>; /* gpio_170 */ ref-clock-frequency = <26000000>; tcxo-clock-frequency = <26000000>; }; diff --git a/arch/arm/dts/am4372.dtsi b/arch/arm/dts/am4372.dtsi index 3ffa8e016e0..6f60a32999a 100644 --- a/arch/arm/dts/am4372.dtsi +++ b/arch/arm/dts/am4372.dtsi @@ -108,8 +108,6 @@ compatible = "ti,am437-padconf", "pinctrl-single"; reg = <0x800 0x31c>; - #address-cells = <1>; - #size-cells = <0>; #interrupt-cells = <1>; interrupt-controller; pinctrl-single,register-width = <32>; @@ -119,8 +117,6 @@ scm_conf: scm_conf@0 { compatible = "syscon"; reg = <0x0 0x800>; - #address-cells = <1>; - #size-cells = <1>; scm_clocks: clocks { #address-cells = <1>; @@ -764,7 +760,8 @@ reg = <0x48038000 0x2000>, <0x46000000 0x400000>; reg-names = "mpu", "dat"; - interrupts = <80>, <81>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "tx", "rx"; status = "disabled"; dmas = <&edma 8>, @@ -778,7 +775,8 @@ reg = <0x4803C000 0x2000>, <0x46400000 0x400000>; reg-names = "mpu", "dat"; - interrupts = <82>, <83>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "tx", "rx"; status = "disabled"; dmas = <&edma 10>, @@ -807,6 +805,8 @@ gpmc,num-waitpins = <2>; #address-cells = <2>; #size-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; status = "disabled"; }; diff --git a/arch/arm/dts/am437x-idk-evm.dts b/arch/arm/dts/am437x-idk-evm.dts index e4546471654..28e3e1ba32a 100644 --- a/arch/arm/dts/am437x-idk-evm.dts +++ b/arch/arm/dts/am437x-idk-evm.dts @@ -106,8 +106,6 @@ compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&gpio_keys_pins_default>; - #address-cells = <1>; - #size-cells = <0>; switch@0 { label = "power-button"; diff --git a/arch/arm/dts/armada-388-helios4-u-boot.dtsi b/arch/arm/dts/armada-388-helios4-u-boot.dtsi new file mode 100644 index 00000000000..4b20610d831 --- /dev/null +++ b/arch/arm/dts/armada-388-helios4-u-boot.dtsi @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/ { + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + spi1 = &spi1; + }; +}; + +ð0 { + phy-reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; +}; + +&spi1 { + u-boot,dm-spl; +}; + +&w25q32 { + status = "okay"; + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/bcm6858.dtsi b/arch/arm/dts/bcm6858.dtsi index 9869d729d34..d78d34d2135 100644 --- a/arch/arm/dts/bcm6858.dtsi +++ b/arch/arm/dts/bcm6858.dtsi @@ -75,7 +75,7 @@ u-boot,dm-pre-reloc; uart0: serial@ff800640 { - compatible = "brcm,bcm6858-uart"; + compatible = "brcm,bcm6345-uart"; reg = <0x0 0xff800640 0x0 0x18>; clocks = <&periph_osc>; diff --git a/arch/arm/dts/da850-evm.dts b/arch/arm/dts/da850-evm.dts index 0e82bb988fd..a3c9b346721 100644 --- a/arch/arm/dts/da850-evm.dts +++ b/arch/arm/dts/da850-evm.dts @@ -27,6 +27,65 @@ spi0 = &spi1; }; + backlight: backlight-pwm { + pinctrl-names = "default"; + pinctrl-0 = <&ecap2_pins>; + power-supply = <&backlight_lcd>; + compatible = "pwm-backlight"; + /* + * The PWM here corresponds to production hardware. The + * schematic needs to be 1015171 (15 March 2010), Rev A + * or newer. + */ + pwms = <&ecap2 0 50000 0>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>; + default-brightness-level = <7>; + }; + + panel { + compatible = "ti,tilcdc,panel"; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_pins>; + /* + * The vpif and the LCD are mutually exclusive. + * To enable VPIF, change the status below to 'disabled' then + * then change the status of the vpif below to 'okay' + */ + status = "okay"; + enable-gpios = <&gpio 40 GPIO_ACTIVE_HIGH>; /* lcd_panel_pwr */ + + panel-info { + ac-bias = <255>; + ac-bias-intrpt = <0>; + dma-burst-sz = <16>; + bpp = <16>; + fdd = <0x80>; + sync-edge = <0>; + sync-ctrl = <1>; + raster-order = <0>; + fifo-th = <0>; + }; + + display-timings { + native-mode = <&timing0>; + timing0: 480x272 { + clock-frequency = <9000000>; + hactive = <480>; + vactive = <272>; + hfront-porch = <3>; + hback-porch = <2>; + hsync-len = <42>; + vback-porch = <3>; + vfront-porch = <4>; + vsync-len = <11>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + }; + }; + vbat: fixedregulator0 { compatible = "regulator-fixed"; regulator-name = "vbat"; @@ -35,6 +94,15 @@ regulator-boot-on; }; + backlight_lcd: backlight-regulator { + compatible = "regulator-fixed"; + regulator-name = "lcd_backlight_pwr"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio 47 GPIO_ACTIVE_HIGH>; /* lcd_backlight_pwr */ + enable-active-high; + }; + sound { compatible = "simple-audio-card"; simple-audio-card,name = "DA850/OMAP-L138 EVM"; @@ -63,6 +131,14 @@ }; }; +&ecap2 { + status = "okay"; +}; + +&ref_clk { + clock-frequency = <24000000>; +}; + &pmx_core { status = "okay"; @@ -93,6 +169,10 @@ }; }; +&sata { + status = "okay"; +}; + &serial0 { status = "okay"; }; @@ -109,6 +189,10 @@ status = "okay"; }; +&lcdc { + status = "okay"; +}; + &i2c0 { status = "okay"; clock-frequency = <100000>; @@ -137,6 +221,12 @@ gpio-controller; #gpio-cells = <2>; }; + tca6416_bb: gpio@21 { + compatible = "ti,tca6416"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; }; &wdt { @@ -336,5 +426,10 @@ &vpif { pinctrl-names = "default"; pinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>; - status = "okay"; + /* + * The vpif and the LCD are mutually exclusive. + * To enable VPIF, disable the ti,tilcdc,panel then + * change the status below to 'okay' + */ + status = "disabled"; }; diff --git a/arch/arm/dts/da850-lcdk.dts b/arch/arm/dts/da850-lcdk.dts index a1f4d6d5a56..0177e3ed20f 100644 --- a/arch/arm/dts/da850-lcdk.dts +++ b/arch/arm/dts/da850-lcdk.dts @@ -21,8 +21,8 @@ stdout-path = "serial2:115200n8"; }; - memory { - device_type = "memory"; + memory@c0000000 { + /* 128 MB DDR2 SDRAM @ 0xc0000000 */ reg = <0xc0000000 0x08000000>; }; @@ -123,6 +123,10 @@ }; }; +&ref_clk { + clock-frequency = <24000000>; +}; + &pmx_core { status = "okay"; @@ -175,6 +179,11 @@ status = "okay"; }; +&sata_refclk { + status = "okay"; + clock-frequency = <100000000>; +}; + &sata { status = "okay"; }; diff --git a/arch/arm/dts/da850.dtsi b/arch/arm/dts/da850.dtsi index c66cf789536..47aa53ba6b9 100644 --- a/arch/arm/dts/da850.dtsi +++ b/arch/arm/dts/da850.dtsi @@ -7,10 +7,19 @@ * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ -#include "skeleton.dtsi" #include <dt-bindings/interrupt-controller/irq.h> / { + #address-cells = <1>; + #size-cells = <1>; + chosen { }; + aliases { }; + + memory@c0000000 { + device_type = "memory"; + reg = <0xc0000000 0x0>; + }; + arm { #address-cells = <1>; #size-cells = <1>; @@ -23,6 +32,25 @@ reg = <0xfffee000 0x2000>; }; }; + clocks: clocks { + ref_clk: ref_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "ref_clk"; + }; + sata_refclk: sata_refclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "sata_refclk"; + status = "disabled"; + }; + usb_refclkin: usb_refclkin { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "usb_refclkin"; + status = "disabled"; + }; + }; dsp: dsp@11800000 { compatible = "ti,da850-dsp"; reg = <0x11800000 0x40000>, @@ -33,6 +61,8 @@ reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig"; interrupt-parent = <&intc>; interrupts = <28>; + clocks = <&psc0 15>; + resets = <&psc0 15>; status = "disabled"; }; soc@1c00000 { @@ -43,17 +73,57 @@ ranges = <0x0 0x01c00000 0x400000>; interrupt-parent = <&intc>; + psc0: clock-controller@10000 { + compatible = "ti,da850-psc0"; + reg = <0x10000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clocks = <&pll0_sysclk 1>, <&pll0_sysclk 2>, + <&pll0_sysclk 4>, <&pll0_sysclk 6>, + <&async1_clk>; + clock-names = "pll0_sysclk1", "pll0_sysclk2", + "pll0_sysclk4", "pll0_sysclk6", + "async1"; + }; + pll0: clock-controller@11000 { + compatible = "ti,da850-pll0"; + reg = <0x11000 0x1000>; + clocks = <&ref_clk>, <&pll1_sysclk 3>; + clock-names = "clksrc", "extclksrc"; + + pll0_pllout: pllout { + #clock-cells = <0>; + }; + pll0_sysclk: sysclk { + #clock-cells = <1>; + }; + pll0_auxclk: auxclk { + #clock-cells = <0>; + }; + pll0_obsclk: obsclk { + #clock-cells = <0>; + }; + }; pmx_core: pinmux@14120 { compatible = "pinctrl-single"; reg = <0x14120 0x50>; - #address-cells = <1>; - #size-cells = <0>; #pinctrl-cells = <2>; pinctrl-single,bit-per-mux; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0xf>; + /* pin base, nr pins & gpio function */ + pinctrl-single,gpio-range = <&range 0 17 0x8>, + <&range 17 8 0x4>, + <&range 26 8 0x4>, + <&range 34 80 0x8>, + <&range 129 31 0x8>; status = "disabled"; + range: gpio-range { + #pinctrl-single,gpio-range-cells = <3>; + }; + serial0_rtscts_pins: pinmux_serial0_rtscts_pins { pinctrl-single,bits = < /* UART0_RTS UART0_CTS */ @@ -264,8 +334,41 @@ usb_phy: usb-phy { compatible = "ti,da830-usb-phy"; #phy-cells = <1>; + clocks = <&usb_phy_clk 0>, <&usb_phy_clk 1>; + clock-names = "usb0_clk48", "usb1_clk48"; status = "disabled"; }; + usb_phy_clk: usb-phy-clocks { + compatible = "ti,da830-usb-phy-clocks"; + #clock-cells = <1>; + clocks = <&psc1 1>, <&usb_refclkin>, + <&pll0_auxclk>; + clock-names = "fck", "usb_refclkin", "auxclk"; + }; + ehrpwm_tbclk: ehrpwm_tbclk { + compatible = "ti,da830-tbclksync"; + #clock-cells = <0>; + clocks = <&psc1 17>; + clock-names = "fck"; + }; + div4p5_clk: div4.5 { + compatible = "ti,da830-div4p5ena"; + #clock-cells = <0>; + clocks = <&pll0_pllout>; + clock-names = "pll0_pllout"; + }; + async1_clk: async1 { + compatible = "ti,da850-async1-clksrc"; + #clock-cells = <0>; + clocks = <&pll0_sysclk 3>, <&div4p5_clk>; + clock-names = "pll0_sysclk3", "div4.5"; + }; + async3_clk: async3 { + compatible = "ti,da850-async3-clksrc"; + #clock-cells = <0>; + clocks = <&pll0_sysclk 2>, <&pll1_sysclk 2>; + clock-names = "pll0_sysclk2", "pll1_sysclk2"; + }; }; edma0: edma@0 { compatible = "ti,edma3-tpcc"; @@ -277,18 +380,21 @@ #dma-cells = <2>; ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>; + power-domains = <&psc0 0>; }; edma0_tptc0: tptc@8000 { compatible = "ti,edma3-tptc"; reg = <0x8000 0x400>; interrupts = <13>; interrupt-names = "edm3_tcerrint"; + power-domains = <&psc0 1>; }; edma0_tptc1: tptc@8400 { compatible = "ti,edma3-tptc"; reg = <0x8400 0x400>; interrupts = <32>; interrupt-names = "edm3_tcerrint"; + power-domains = <&psc0 2>; }; edma1: edma@230000 { compatible = "ti,edma3-tpcc"; @@ -300,12 +406,14 @@ #dma-cells = <2>; ti,tptcs = <&edma1_tptc0 7>; + power-domains = <&psc1 0>; }; edma1_tptc0: tptc@238000 { compatible = "ti,edma3-tptc"; reg = <0x238000 0x400>; interrupts = <95>; interrupt-names = "edm3_tcerrint"; + power-domains = <&psc1 21>; }; serial0: serial@42000 { compatible = "ti,da830-uart", "ns16550a"; @@ -313,6 +421,8 @@ reg-io-width = <4>; reg-shift = <2>; interrupts = <25>; + clocks = <&psc0 9>; + power-domains = <&psc0 9>; status = "disabled"; }; serial1: serial@10c000 { @@ -321,6 +431,8 @@ reg-io-width = <4>; reg-shift = <2>; interrupts = <53>; + clocks = <&psc1 12>; + power-domains = <&psc1 12>; status = "disabled"; }; serial2: serial@10d000 { @@ -329,6 +441,8 @@ reg-io-width = <4>; reg-shift = <2>; interrupts = <61>; + clocks = <&psc1 13>; + power-domains = <&psc1 13>; status = "disabled"; }; rtc0: rtc@23000 { @@ -336,6 +450,8 @@ reg = <0x23000 0x1000>; interrupts = <19 19>; + clocks = <&pll0_auxclk>; + clock-names = "int-clk"; status = "disabled"; }; i2c0: i2c@22000 { @@ -344,6 +460,7 @@ interrupts = <15>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pll0_auxclk>; status = "disabled"; }; i2c1: i2c@228000 { @@ -352,11 +469,21 @@ interrupts = <51>; #address-cells = <1>; #size-cells = <0>; + clocks = <&psc1 11>; + power-domains = <&psc1 11>; status = "disabled"; }; + clocksource: timer@20000 { + compatible = "ti,da830-timer"; + reg = <0x20000 0x1000>; + interrupts = <12>, <13>; + interrupt-names = "tint12", "tint34"; + clocks = <&pll0_auxclk>; + }; wdt: wdt@21000 { compatible = "ti,davinci-wdt"; reg = <0x21000 0x1000>; + clocks = <&pll0_auxclk>; status = "disabled"; }; mmc0: mmc@40000 { @@ -367,12 +494,14 @@ interrupts = <16>; dmas = <&edma0 16 0>, <&edma0 17 0>; dma-names = "rx", "tx"; + clocks = <&psc0 5>; status = "disabled"; }; vpif: video@217000 { compatible = "ti,da850-vpif"; reg = <0x217000 0x1000>; interrupts = <92>; + power-domains = <&psc1 9>; status = "disabled"; /* VPIF capture port */ @@ -395,6 +524,7 @@ interrupts = <72>; dmas = <&edma1 28 0>, <&edma1 29 0>; dma-names = "rx", "tx"; + clocks = <&psc1 18>; status = "disabled"; }; ehrpwm0: pwm@300000 { @@ -402,6 +532,9 @@ "ti,am33xx-ehrpwm"; #pwm-cells = <3>; reg = <0x300000 0x2000>; + clocks = <&psc1 17>, <&ehrpwm_tbclk>; + clock-names = "fck", "tbclk"; + power-domains = <&psc1 17>; status = "disabled"; }; ehrpwm1: pwm@302000 { @@ -409,6 +542,9 @@ "ti,am33xx-ehrpwm"; #pwm-cells = <3>; reg = <0x302000 0x2000>; + clocks = <&psc1 17>, <&ehrpwm_tbclk>; + clock-names = "fck", "tbclk"; + power-domains = <&psc1 17>; status = "disabled"; }; ecap0: ecap@306000 { @@ -416,6 +552,9 @@ "ti,am33xx-ecap"; #pwm-cells = <3>; reg = <0x306000 0x80>; + clocks = <&psc1 20>; + clock-names = "fck"; + power-domains = <&psc1 20>; status = "disabled"; }; ecap1: ecap@307000 { @@ -423,6 +562,9 @@ "ti,am33xx-ecap"; #pwm-cells = <3>; reg = <0x307000 0x80>; + clocks = <&psc1 20>; + clock-names = "fck"; + power-domains = <&psc1 20>; status = "disabled"; }; ecap2: ecap@308000 { @@ -430,6 +572,9 @@ "ti,am33xx-ecap"; #pwm-cells = <3>; reg = <0x308000 0x80>; + clocks = <&psc1 20>; + clock-names = "fck"; + power-domains = <&psc1 20>; status = "disabled"; }; spi0: spi@41000 { @@ -442,6 +587,8 @@ interrupts = <20>; dmas = <&edma0 14 0>, <&edma0 15 0>; dma-names = "rx", "tx"; + clocks = <&psc0 4>; + power-domains = <&psc0 4>; status = "disabled"; }; spi1: spi@30e000 { @@ -454,6 +601,8 @@ interrupts = <56>; dmas = <&edma0 18 0>, <&edma0 19 0>; dma-names = "rx", "tx"; + clocks = <&psc1 10>; + power-domains = <&psc1 10>; status = "disabled"; }; usb0: usb@200000 { @@ -465,6 +614,8 @@ dr_mode = "otg"; phys = <&usb_phy 0>; phy-names = "usb-phy"; + clocks = <&psc1 1>; + clock-ranges; status = "disabled"; #address-cells = <1>; @@ -488,6 +639,7 @@ interrupts = <58>; #dma-cells = <2>; #dma-channels = <4>; + power-domains = <&psc1 1>; status = "okay"; }; }; @@ -495,13 +647,31 @@ compatible = "ti,da850-ahci"; reg = <0x218000 0x2000>, <0x22c018 0x4>; interrupts = <67>; + clocks = <&psc1 8>, <&sata_refclk>; + clock-names = "fck", "refclk"; status = "disabled"; }; + pll1: clock-controller@21a000 { + compatible = "ti,da850-pll1"; + reg = <0x21a000 0x1000>; + clocks = <&ref_clk>; + clock-names = "clksrc"; + + pll1_sysclk: sysclk { + #clock-cells = <1>; + }; + pll1_obsclk: obsclk { + #clock-cells = <0>; + }; + }; mdio: mdio@224000 { compatible = "ti,davinci_mdio"; #address-cells = <1>; #size-cells = <0>; reg = <0x224000 0x1000>; + clocks = <&psc1 5>; + clock-names = "fck"; + power-domains = <&psc1 5>; status = "disabled"; }; eth0: ethernet@220000 { @@ -517,6 +687,8 @@ 35 36 >; + clocks = <&psc1 5>; + power-domains = <&psc1 5>; status = "disabled"; }; usb1: usb@225000 { @@ -525,6 +697,7 @@ interrupts = <59>; phys = <&usb_phy 1>; phy-names = "usb-phy"; + clocks = <&psc1 2>; status = "disabled"; }; gpio: gpio@226000 { @@ -532,16 +705,169 @@ gpio-controller; #gpio-cells = <2>; reg = <0x226000 0x1000>; - interrupts = <42 IRQ_TYPE_EDGE_BOTH - 43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH - 45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH - 47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH - 49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>; + interrupts = <42 43 44 45 46 47 48 49 50>; ti,ngpio = <144>; ti,davinci-gpio-unbanked = <0>; + clocks = <&psc1 3>; + clock-names = "gpio"; status = "disabled"; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&pmx_core 0 15 1>, + <&pmx_core 1 14 1>, + <&pmx_core 2 13 1>, + <&pmx_core 3 12 1>, + <&pmx_core 4 11 1>, + <&pmx_core 5 10 1>, + <&pmx_core 6 9 1>, + <&pmx_core 7 8 1>, + <&pmx_core 8 7 1>, + <&pmx_core 9 6 1>, + <&pmx_core 10 5 1>, + <&pmx_core 11 4 1>, + <&pmx_core 12 3 1>, + <&pmx_core 13 2 1>, + <&pmx_core 14 1 1>, + <&pmx_core 15 0 1>, + <&pmx_core 16 39 1>, + <&pmx_core 17 38 1>, + <&pmx_core 18 37 1>, + <&pmx_core 19 36 1>, + <&pmx_core 20 35 1>, + <&pmx_core 21 34 1>, + <&pmx_core 22 33 1>, + <&pmx_core 23 32 1>, + <&pmx_core 24 24 1>, + <&pmx_core 25 22 1>, + <&pmx_core 26 21 1>, + <&pmx_core 27 20 1>, + <&pmx_core 28 19 1>, + <&pmx_core 29 18 1>, + <&pmx_core 30 17 1>, + <&pmx_core 31 16 1>, + <&pmx_core 32 55 1>, + <&pmx_core 33 54 1>, + <&pmx_core 34 53 1>, + <&pmx_core 35 52 1>, + <&pmx_core 36 51 1>, + <&pmx_core 37 50 1>, + <&pmx_core 38 49 1>, + <&pmx_core 39 48 1>, + <&pmx_core 40 47 1>, + <&pmx_core 41 46 1>, + <&pmx_core 42 45 1>, + <&pmx_core 43 44 1>, + <&pmx_core 44 43 1>, + <&pmx_core 45 42 1>, + <&pmx_core 46 41 1>, + <&pmx_core 47 40 1>, + <&pmx_core 48 71 1>, + <&pmx_core 49 70 1>, + <&pmx_core 50 69 1>, + <&pmx_core 51 68 1>, + <&pmx_core 52 67 1>, + <&pmx_core 53 66 1>, + <&pmx_core 54 65 1>, + <&pmx_core 55 64 1>, + <&pmx_core 56 63 1>, + <&pmx_core 57 62 1>, + <&pmx_core 58 61 1>, + <&pmx_core 59 60 1>, + <&pmx_core 60 59 1>, + <&pmx_core 61 58 1>, + <&pmx_core 62 57 1>, + <&pmx_core 63 56 1>, + <&pmx_core 64 87 1>, + <&pmx_core 65 86 1>, + <&pmx_core 66 85 1>, + <&pmx_core 67 84 1>, + <&pmx_core 68 83 1>, + <&pmx_core 69 82 1>, + <&pmx_core 70 81 1>, + <&pmx_core 71 80 1>, + <&pmx_core 72 70 1>, + <&pmx_core 73 78 1>, + <&pmx_core 74 77 1>, + <&pmx_core 75 76 1>, + <&pmx_core 76 75 1>, + <&pmx_core 77 74 1>, + <&pmx_core 78 73 1>, + <&pmx_core 79 72 1>, + <&pmx_core 80 103 1>, + <&pmx_core 81 102 1>, + <&pmx_core 82 101 1>, + <&pmx_core 83 100 1>, + <&pmx_core 84 99 1>, + <&pmx_core 85 98 1>, + <&pmx_core 86 97 1>, + <&pmx_core 87 96 1>, + <&pmx_core 88 95 1>, + <&pmx_core 89 94 1>, + <&pmx_core 90 93 1>, + <&pmx_core 91 92 1>, + <&pmx_core 92 91 1>, + <&pmx_core 93 90 1>, + <&pmx_core 94 89 1>, + <&pmx_core 95 88 1>, + <&pmx_core 96 158 1>, + <&pmx_core 97 157 1>, + <&pmx_core 98 156 1>, + <&pmx_core 99 155 1>, + <&pmx_core 100 154 1>, + <&pmx_core 101 129 1>, + <&pmx_core 102 113 1>, + <&pmx_core 103 112 1>, + <&pmx_core 104 111 1>, + <&pmx_core 105 110 1>, + <&pmx_core 106 109 1>, + <&pmx_core 107 108 1>, + <&pmx_core 108 107 1>, + <&pmx_core 109 106 1>, + <&pmx_core 110 105 1>, + <&pmx_core 111 104 1>, + <&pmx_core 112 145 1>, + <&pmx_core 113 144 1>, + <&pmx_core 114 143 1>, + <&pmx_core 115 142 1>, + <&pmx_core 116 141 1>, + <&pmx_core 117 140 1>, + <&pmx_core 118 139 1>, + <&pmx_core 119 138 1>, + <&pmx_core 120 137 1>, + <&pmx_core 121 136 1>, + <&pmx_core 122 135 1>, + <&pmx_core 123 134 1>, + <&pmx_core 124 133 1>, + <&pmx_core 125 132 1>, + <&pmx_core 126 131 1>, + <&pmx_core 127 130 1>, + <&pmx_core 128 159 1>, + <&pmx_core 129 31 1>, + <&pmx_core 130 30 1>, + <&pmx_core 131 20 1>, + <&pmx_core 132 28 1>, + <&pmx_core 133 27 1>, + <&pmx_core 134 26 1>, + <&pmx_core 135 23 1>, + <&pmx_core 136 153 1>, + <&pmx_core 137 152 1>, + <&pmx_core 138 151 1>, + <&pmx_core 139 150 1>, + <&pmx_core 140 149 1>, + <&pmx_core 141 148 1>, + <&pmx_core 142 147 1>, + <&pmx_core 143 146 1>; + }; + psc1: clock-controller@227000 { + compatible = "ti,da850-psc1"; + reg = <0x227000 0x1000>; + #clock-cells = <1>; + #power-domain-cells = <1>; + clocks = <&pll0_sysclk 2>, <&pll0_sysclk 4>, + <&async3_clk>; + clock-names = "pll0_sysclk2", "pll0_sysclk4", "async3"; + assigned-clocks = <&async3_clk>; + assigned-clock-parents = <&pll1_sysclk 2>; }; pinconf: pin-controller@22c00c { compatible = "ti,da850-pupd"; @@ -556,6 +882,7 @@ reg-names = "mpu", "dat"; interrupts = <54>; interrupt-names = "common"; + power-domains = <&psc1 7>; status = "disabled"; dmas = <&edma0 1 1>, <&edma0 0 1>; @@ -567,6 +894,9 @@ reg = <0x213000 0x1000>; interrupts = <52>; max-pixelclock = <37500>; + clocks = <&psc1 16>; + clock-names = "fck"; + power-domains = <&psc1 16>; status = "disabled"; }; }; @@ -578,6 +908,9 @@ reg = <0x68000000 0x00008000>; ranges = <0 0 0x60000000 0x08000000 1 0 0x68000000 0x00008000>; + clocks = <&psc0 3>; + clock-names = "aemif"; + clock-ranges; status = "disabled"; }; memctrl: memory-controller@b0000000 { diff --git a/arch/arm/dts/dm816x.dtsi b/arch/arm/dts/dm816x.dtsi index 276211e1ee5..fe58faf2f78 100644 --- a/arch/arm/dts/dm816x.dtsi +++ b/arch/arm/dts/dm816x.dtsi @@ -90,8 +90,6 @@ dm816x_pinmux: pinmux@800 { compatible = "pinctrl-single"; reg = <0x800 0x50a>; - #address-cells = <1>; - #size-cells = <0>; #pinctrl-cells = <1>; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0xf>; @@ -127,8 +125,6 @@ }; scrm_clocks: clocks { - #address-cells = <1>; - #size-cells = <0>; }; scrm_clockdomains: clockdomains { diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts b/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts index 4cd72b5e612..32d0dc371fc 100644 --- a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts +++ b/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts @@ -15,18 +15,3 @@ model = "LogicPD Zoom OMAP35xx SOM-LV Development Kit"; compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3"; }; - -&omap3_pmx_core2 { - pinctrl-names = "default"; - pinctrl-0 = <&hsusb2_2_pins>; - hsusb2_2_pins: pinmux_hsusb2_2_pins { - pinctrl-single,pins = < - OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ - OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ - OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ - OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ - OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ - OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ - >; - }; -}; diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts b/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts index 2aca9111c69..24283739526 100644 --- a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts +++ b/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts @@ -15,18 +15,3 @@ model = "LogicPD Zoom DM3730 SOM-LV Development Kit"; compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3"; }; - -&omap3_pmx_core2 { - pinctrl-names = "default"; - pinctrl-0 = <&hsusb2_2_pins>; - hsusb2_2_pins: pinmux_hsusb2_2_pins { - pinctrl-single,pins = < - OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ - OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ - OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ - OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ - OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ - OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ - >; - }; -}; diff --git a/arch/arm/dts/logicpd-som-lv.dtsi b/arch/arm/dts/logicpd-som-lv.dtsi index 03485509c82..98b682a8080 100644 --- a/arch/arm/dts/logicpd-som-lv.dtsi +++ b/arch/arm/dts/logicpd-som-lv.dtsi @@ -129,7 +129,7 @@ }; &mmc3 { - interrupts-extended = <&intc 94>; + interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>; pinctrl-0 = <&mmc3_pins &wl127x_gpio>; pinctrl-names = "default"; vmmc-supply = <&wl12xx_vmmc>; @@ -232,20 +232,6 @@ >; }; - i2c2_pins: pinmux_i2c2_pins { - pinctrl-single,pins = < - OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */ - OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */ - >; - }; - - i2c3_pins: pinmux_i2c3_pins { - pinctrl-single,pins = < - OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */ - OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */ - >; - }; - tsc2004_pins: pinmux_tsc2004_pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4) /* mcbsp4_dr.gpio_153 */ @@ -267,6 +253,33 @@ OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */ >; }; + i2c2_pins: pinmux_i2c2_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */ + OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */ + >; + }; + i2c3_pins: pinmux_i2c3_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */ + OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */ + >; + }; +}; + +&omap3_pmx_core2 { + pinctrl-names = "default"; + pinctrl-0 = <&hsusb2_2_pins>; + hsusb2_2_pins: pinmux_hsusb2_2_pins { + pinctrl-single,pins = < + OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ + OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ + OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ + OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ + OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ + OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ + >; + }; }; &uart2 { diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts b/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts index 9d5d53fbe9c..c39cf2ca54d 100644 --- a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts +++ b/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts @@ -35,7 +35,7 @@ * jumpering combinations for the long run. */ &mmc3 { - interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>; + interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>; pinctrl-0 = <&mmc3_pins &mmc3_core2_pins>; pinctrl-names = "default"; vmmc-supply = <&wl12xx_vmmc>; diff --git a/arch/arm/dts/omap5-u-boot.dtsi b/arch/arm/dts/omap5-u-boot.dtsi index bf2684cb610..a6a7801a4b2 100644 --- a/arch/arm/dts/omap5-u-boot.dtsi +++ b/arch/arm/dts/omap5-u-boot.dtsi @@ -15,6 +15,10 @@ ocp { u-boot,dm-spl; + ocp2scp@4a080000 { + compatible = "ti,omap-ocp2scp", "simple-bus"; + }; + ocp2scp@4a090000 { compatible = "ti,omap-ocp2scp", "simple-bus"; }; diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index f8b77011671..7a9b742d364 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -365,6 +365,14 @@ usb33d-supply = <&usb33>; }; +&hwspinlock { + status = "okay"; +}; + +&pinctrl { + hwlocks = <&hwspinlock 0>; +}; + &usbphyc_port0 { phy-supply = <&vdd_usb>; vdda1v1-supply = <®11>; diff --git a/arch/arm/dts/stm32mp157c.dtsi b/arch/arm/dts/stm32mp157c.dtsi index 33c5981869b..37cadfa30c9 100644 --- a/arch/arm/dts/stm32mp157c.dtsi +++ b/arch/arm/dts/stm32mp157c.dtsi @@ -690,6 +690,15 @@ status = "disabled"; }; + hwspinlock: hwspinlock@4c000000 { + compatible = "st,stm32-hwspinlock"; + #hwlock-cells = <1>; + reg = <0x4c000000 0x400>; + clocks = <&rcc HSEM>; + clock-names = "hwspinlock"; + status = "disabled"; + }; + rcc: rcc@50000000 { compatible = "st,stm32mp1-rcc", "syscon"; reg = <0x50000000 0x1000>; diff --git a/arch/arm/include/asm/arch-stm32/gpio.h b/arch/arm/include/asm/arch-stm32/gpio.h index 84859b14479..570e80a6ba8 100644 --- a/arch/arm/include/asm/arch-stm32/gpio.h +++ b/arch/arm/include/asm/arch-stm32/gpio.h @@ -7,6 +7,8 @@ #ifndef _GPIO_H_ #define _GPIO_H_ +#define STM32_GPIOS_PER_BANK 16 + enum stm32_gpio_port { STM32_GPIO_PORT_A = 0, STM32_GPIO_PORT_B, @@ -109,6 +111,9 @@ struct stm32_gpio_regs { struct stm32_gpio_priv { struct stm32_gpio_regs *regs; + unsigned int gpio_range; }; +int stm32_offset_to_index(struct udevice *dev, unsigned int offset); + #endif /* _GPIO_H_ */ diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 5df74728de1..12bc7fbe06e 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -160,7 +160,12 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen) #define in_be32(a) in_arch(l,be32,a) #define in_be16(a) in_arch(w,be16,a) +#define out_32(a,v) __raw_writel(v,a) +#define out_16(a,v) __raw_writew(v,a) #define out_8(a,v) __raw_writeb(v,a) + +#define in_32(a) __raw_readl(a) +#define in_16(a) __raw_readw(a) #define in_8(a) __raw_readb(a) #define clrbits(type, addr, clear) \ @@ -180,6 +185,10 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen) #define setbits_le32(addr, set) setbits(le32, addr, set) #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) +#define clrbits_32(addr, clear) clrbits(32, addr, clear) +#define setbits_32(addr, set) setbits(32, addr, set) +#define clrsetbits_32(addr, clear, set) clrsetbits(32, addr, clear, set) + #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) #define setbits_be16(addr, set) setbits(be16, addr, set) #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) @@ -188,6 +197,10 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen) #define setbits_le16(addr, set) setbits(le16, addr, set) #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) +#define clrbits_16(addr, clear) clrbits(16, addr, clear) +#define setbits_16(addr, set) setbits(16, addr, set) +#define clrsetbits_16(addr, clear, set) clrsetbits(16, addr, clear, set) + #define clrbits_8(addr, clear) clrbits(8, addr, clear) #define setbits_8(addr, set) setbits(8, addr, set) #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) diff --git a/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds b/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds index eca78f8104a..b714e93b3b2 100644 --- a/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds +++ b/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds @@ -48,3 +48,13 @@ SECTIONS __bss_end = .; } >.sdram } + +#if defined(CONFIG_SPL_MAX_SIZE) +ASSERT(__image_copy_end - __start < (CONFIG_SPL_MAX_SIZE), \ + "SPL image too big"); +#endif + +#if defined(CONFIG_SPL_BSS_MAX_SIZE) +ASSERT(__bss_end - __bss_start < (CONFIG_SPL_BSS_MAX_SIZE), \ + "SPL image BSS too big"); +#endif diff --git a/arch/arm/mach-stm32mp/include/mach/gpio.h b/arch/arm/mach-stm32mp/include/mach/gpio.h index 5151150b8d8..5ca76d21ff1 100644 --- a/arch/arm/mach-stm32mp/include/mach/gpio.h +++ b/arch/arm/mach-stm32mp/include/mach/gpio.h @@ -8,6 +8,8 @@ #define _STM32_GPIO_H_ #include <asm/gpio.h> +#define STM32_GPIOS_PER_BANK 16 + enum stm32_gpio_port { STM32_GPIO_PORT_A = 0, STM32_GPIO_PORT_B, @@ -110,5 +112,9 @@ struct stm32_gpio_regs { struct stm32_gpio_priv { struct stm32_gpio_regs *regs; + unsigned int gpio_range; }; + +int stm32_offset_to_index(struct udevice *dev, unsigned int offset); + #endif /* _STM32_GPIO_H_ */ diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c index 5d91d7e2c12..dea42de833f 100644 --- a/arch/arm/mach-sunxi/pmic_bus.c +++ b/arch/arm/mach-sunxi/pmic_bus.c @@ -101,6 +101,9 @@ int pmic_bus_setbits(u8 reg, u8 bits) if (ret) return ret; + if ((val & bits) == bits) + return 0; + val |= bits; return pmic_bus_write(reg, val); } @@ -114,6 +117,9 @@ int pmic_bus_clrbits(u8 reg, u8 bits) if (ret) return ret; + if (!(val & bits)) + return 0; + val &= ~bits; return pmic_bus_write(reg, val); } |