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-rw-r--r--arch/arm/cpu/arm720t/cpu.c2
-rw-r--r--arch/arm/cpu/arm720t/interrupts.c28
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/Makefile50
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/flash.c249
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/iap_entry.S7
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/mmc.c131
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/mmc_hw.c233
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/mmc_hw.h29
-rw-r--r--arch/arm/cpu/arm720t/lpc2292/spi.c40
-rw-r--r--arch/arm/cpu/arm720t/start.S69
-rw-r--r--arch/arm/include/asm/arch-lpc2292/hardware.h33
-rw-r--r--arch/arm/include/asm/arch-lpc2292/lpc2292_registers.h225
-rw-r--r--arch/arm/include/asm/arch-lpc2292/spi.h82
13 files changed, 3 insertions, 1175 deletions
diff --git a/arch/arm/cpu/arm720t/cpu.c b/arch/arm/cpu/arm720t/cpu.c
index ce7b3c9c24..e25f6f2ea7 100644
--- a/arch/arm/cpu/arm720t/cpu.c
+++ b/arch/arm/cpu/arm720t/cpu.c
@@ -46,7 +46,7 @@ int cleanup_before_linux (void)
* and we set the CPU-speed to 73 MHz - see start.S for details
*/
-#if defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292)
+#if defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B)
disable_interrupts ();
/* Nothing more needed */
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c
index c2f898f2cc..5b21cc3cea 100644
--- a/arch/arm/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
@@ -37,11 +37,6 @@
/* macro to read the 16 bit timer */
#define READ_TIMER (IO_TC1D & 0xffff)
-#ifdef CONFIG_LPC2292
-#undef READ_TIMER
-#define READ_TIMER (0xFFFFFFFF - GET32(T0TC))
-#endif
-
#else
#define IRQEN (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_INTR_ENABLE))
#define TM2CTRL (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_TIMER2_CONTROL))
@@ -73,13 +68,6 @@ void do_irq (struct pt_regs *pt_regs)
}
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No do_irq() for IntegratorAP/CM720T as yet */
-#elif defined(CONFIG_LPC2292)
-
- void (*pfnct)(void);
-
- pfnct = (void (*)(void))VICVectAddr;
-
- (*pfnct)();
#else
#error do_irq() not defined for this CPU type
#endif
@@ -172,14 +160,6 @@ int timer_init (void)
/* Start timer */
SET_REG( REG_TMOD, TM0_RUN);
-#elif defined(CONFIG_LPC2292)
- PUT32(T0IR, 0); /* disable all timer0 interrupts */
- PUT32(T0TCR, 0); /* disable timer0 */
- PUT32(T0PR, CONFIG_SYS_SYS_CLK_FREQ / CONFIG_SYS_HZ);
- PUT32(T0MCR, 0);
- PUT32(T0TC, 0);
- PUT32(T0TCR, 1); /* enable timer0 */
-
#elif defined(CONFIG_TEGRA)
/* No timer routines for tegra as yet */
lastdec = 0;
@@ -198,7 +178,7 @@ int timer_init (void)
*/
-#if defined(CONFIG_NETARM) || defined(CONFIG_LPC2292)
+#if defined(CONFIG_NETARM)
ulong get_timer (ulong base)
{
@@ -216,12 +196,6 @@ void __udelay (unsigned long usec)
tmo += get_timer (0);
while (get_timer_masked () < tmo)
-#ifdef CONFIG_LPC2292
- /* GJ - not sure whether this is really needed or a misunderstanding */
- __asm__ __volatile__(" nop");
-#else
- /*NOP*/;
-#endif
}
ulong get_timer_masked (void)
diff --git a/arch/arm/cpu/arm720t/lpc2292/Makefile b/arch/arm/cpu/arm720t/lpc2292/Makefile
deleted file mode 100644
index 1b93008685..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/Makefile
+++ /dev/null
@@ -1,50 +0,0 @@
-#
-# (C) Copyright 2000-2007
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS = flash.o mmc.o mmc_hw.o spi.o
-SOBJS = $(obj)iap_entry.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-# this MUST be compiled as thumb code!
-$(SOBJS):
- $(CC) $(AFLAGS) -march=armv4t -c -o $(SOBJS) iap_entry.S
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/arch/arm/cpu/arm720t/lpc2292/flash.c b/arch/arm/cpu/arm720t/lpc2292/flash.c
deleted file mode 100644
index 3d2dc32231..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/flash.c
+++ /dev/null
@@ -1,249 +0,0 @@
-/*
- * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
- *
- * Modified to remove all but the IAP-command related code by
- * Gary Jennejohn <garyj@denx.de>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/hardware.h>
-
-/* IAP commands use 32 bytes at the top of CPU internal sram, we
- use 512 bytes below that */
-#define COPY_BUFFER_LOCATION 0x40003de0
-
-#define IAP_LOCATION 0x7ffffff1
-#define IAP_CMD_PREPARE 50
-#define IAP_CMD_COPY 51
-#define IAP_CMD_ERASE 52
-#define IAP_CMD_CHECK 53
-#define IAP_CMD_ID 54
-#define IAP_CMD_VERSION 55
-#define IAP_CMD_COMPARE 56
-
-#define IAP_RET_CMD_SUCCESS 0
-
-static unsigned long command[5];
-static unsigned long result[2];
-
-extern void iap_entry(unsigned long * command, unsigned long * result);
-
-/*-----------------------------------------------------------------------
- *
- */
-static int get_flash_sector(flash_info_t * info, ulong flash_addr)
-{
- int i;
-
- for(i = 1; i < (info->sector_count); i++) {
- if (flash_addr < (info->start[i]))
- break;
- }
-
- return (i-1);
-}
-
-/*-----------------------------------------------------------------------
- * This function assumes that flash_addr is aligned on 512 bytes boundary
- * in flash. This function also assumes that prepare have been called
- * for the sector in question.
- */
-int lpc2292_copy_buffer_to_flash(flash_info_t * info, ulong flash_addr)
-{
- int first_sector;
- int last_sector;
-
- first_sector = get_flash_sector(info, flash_addr);
- last_sector = get_flash_sector(info, flash_addr + 512 - 1);
-
- /* prepare sectors for write */
- command[0] = IAP_CMD_PREPARE;
- command[1] = first_sector;
- command[2] = last_sector;
- iap_entry(command, result);
- if (result[0] != IAP_RET_CMD_SUCCESS) {
- printf("IAP prepare failed\n");
- return ERR_PROG_ERROR;
- }
-
- command[0] = IAP_CMD_COPY;
- command[1] = flash_addr;
- command[2] = COPY_BUFFER_LOCATION;
- command[3] = 512;
- command[4] = CONFIG_SYS_SYS_CLK_FREQ >> 10;
- iap_entry(command, result);
- if (result[0] != IAP_RET_CMD_SUCCESS) {
- printf("IAP copy failed\n");
- return 1;
- }
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int lpc2292_flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag;
- int prot;
- int sect;
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
-
- flag = disable_interrupts();
-
- printf ("Erasing %d sectors starting at sector %2d.\n"
- "This make take some time ... ",
- s_last - s_first + 1, s_first);
-
- command[0] = IAP_CMD_PREPARE;
- command[1] = s_first;
- command[2] = s_last;
- iap_entry(command, result);
- if (result[0] != IAP_RET_CMD_SUCCESS) {
- printf("IAP prepare failed\n");
- return ERR_PROTECTED;
- }
-
- command[0] = IAP_CMD_ERASE;
- command[1] = s_first;
- command[2] = s_last;
- command[3] = CONFIG_SYS_SYS_CLK_FREQ >> 10;
- iap_entry(command, result);
- if (result[0] != IAP_RET_CMD_SUCCESS) {
- printf("IAP erase failed\n");
- return ERR_PROTECTED;
- }
-
- if (flag)
- enable_interrupts();
-
- return ERR_OK;
-}
-
-int lpc2292_write_buff (flash_info_t * info, uchar * src, ulong addr,
- ulong cnt)
-{
- int first_copy_size;
- int last_copy_size;
- int first_block;
- int last_block;
- int nbr_mid_blocks;
- uchar memmap_value;
- ulong i;
- uchar* src_org;
- uchar* dst_org;
- int ret = ERR_OK;
-
- src_org = src;
- dst_org = (uchar*)addr;
-
- first_block = addr / 512;
- last_block = (addr + cnt) / 512;
- nbr_mid_blocks = last_block - first_block - 1;
-
- first_copy_size = 512 - (addr % 512);
- last_copy_size = (addr + cnt) % 512;
-
- debug("\ncopy first block: (1) %lX -> %lX 0x200 bytes, "
- "(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX 0x200 bytes\n",
- (ulong)(first_block * 512),
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)src,
- (ulong)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
- first_copy_size,
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)(first_block * 512));
-
- /* copy first block */
- memcpy((void*)COPY_BUFFER_LOCATION,
- (void*)(first_block * 512), 512);
- memcpy((void*)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
- src, first_copy_size);
- lpc2292_copy_buffer_to_flash(info, first_block * 512);
- src += first_copy_size;
- addr += first_copy_size;
-
- /* copy middle blocks */
- for (i = 0; i < nbr_mid_blocks; i++) {
- debug("copy middle block: %lX -> %lX 512 bytes, "
- "%lX -> %lX 512 bytes\n",
- (ulong)src,
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)addr);
-
- memcpy((void*)COPY_BUFFER_LOCATION, src, 512);
- lpc2292_copy_buffer_to_flash(info, addr);
- src += 512;
- addr += 512;
- }
-
-
- if (last_copy_size > 0) {
- debug("copy last block: (1) %lX -> %lX 0x200 bytes, "
- "(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX x200 bytes\n",
- (ulong)(last_block * 512),
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)src,
- (ulong)(COPY_BUFFER_LOCATION),
- last_copy_size,
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)addr);
-
- /* copy last block */
- memcpy((void*)COPY_BUFFER_LOCATION,
- (void*)(last_block * 512), 512);
- memcpy((void*)COPY_BUFFER_LOCATION,
- src, last_copy_size);
- lpc2292_copy_buffer_to_flash(info, addr);
- }
-
- /* verify write */
- memmap_value = GET8(MEMMAP);
-
- disable_interrupts();
-
- PUT8(MEMMAP, 01); /* we must make sure that initial 64
- bytes are taken from flash when we
- do the compare */
-
- for (i = 0; i < cnt; i++) {
- if (*dst_org != *src_org){
- printf("Write failed. Byte %lX differs\n", i);
- ret = ERR_PROG_ERROR;
- break;
- }
- dst_org++;
- src_org++;
- }
-
- PUT8(MEMMAP, memmap_value);
- enable_interrupts();
-
- return ret;
-}
diff --git a/arch/arm/cpu/arm720t/lpc2292/iap_entry.S b/arch/arm/cpu/arm720t/lpc2292/iap_entry.S
deleted file mode 100644
index c31d5190bd..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/iap_entry.S
+++ /dev/null
@@ -1,7 +0,0 @@
-IAP_ADDRESS: .word 0x7FFFFFF1
-
-.globl iap_entry
-iap_entry:
- ldr r2, IAP_ADDRESS
- bx r2
- mov pc, lr
diff --git a/arch/arm/cpu/arm720t/lpc2292/mmc.c b/arch/arm/cpu/arm720t/lpc2292/mmc.c
deleted file mode 100644
index beaffe944c..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/mmc.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <mmc.h>
-#include <asm/errno.h>
-#include <asm/arch/hardware.h>
-#include <part.h>
-#include <fat.h>
-#include "mmc_hw.h"
-#include <asm/arch/spi.h>
-
-#ifdef CONFIG_MMC
-
-#undef MMC_DEBUG
-
-static block_dev_desc_t mmc_dev;
-
-/* these are filled out by a call to mmc_hw_get_parameters */
-static int hw_size; /* in kbytes */
-static int hw_nr_sects;
-static int hw_sect_size; /* in bytes */
-
-block_dev_desc_t * mmc_get_dev(int dev)
-{
- return (block_dev_desc_t *)(&mmc_dev);
-}
-
-unsigned long mmc_block_read(int dev,
- unsigned long start,
- lbaint_t blkcnt,
- void *buffer)
-{
- unsigned long rc = 0;
- unsigned char *p = (unsigned char *)buffer;
- unsigned long i;
- unsigned long addr = start;
-
-#ifdef MMC_DEBUG
- printf("mmc_block_read: start=%lu, blkcnt=%lu\n", start,
- (unsigned long)blkcnt);
-#endif
-
- for(i = 0; i < (unsigned long)blkcnt; i++) {
-#ifdef MMC_DEBUG
- printf("mmc_read_sector: addr=%lu, buffer=%p\n", addr, p);
-#endif
- (void)mmc_read_sector(addr, p);
- rc++;
- addr++;
- p += hw_sect_size;
- }
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------------
- * Read hardware paramterers (sector size, size, number of sectors)
- */
-static int mmc_hw_get_parameters(void)
-{
- unsigned char csddata[16];
- unsigned int sizemult;
- unsigned int size;
-
- mmc_read_csd(csddata);
- hw_sect_size = 1<<(csddata[5] & 0x0f);
- size = ((csddata[6]&0x03)<<10)+(csddata[7]<<2)+(csddata[8]&0xc0);
- sizemult = ((csddata[10] & 0x80)>>7)+((csddata[9] & 0x03)<<1);
- hw_nr_sects = (size+1)*(1<<(sizemult+2));
- hw_size = hw_nr_sects*hw_sect_size/1024;
-
-#ifdef MMC_DEBUG
- printf("mmc_hw_get_parameters: hw_sect_size=%d, hw_nr_sects=%d, "
- "hw_size=%d\n", hw_sect_size, hw_nr_sects, hw_size);
-#endif
-
- return 0;
-}
-
-int mmc_legacy_init(int verbose)
-{
- int ret = -ENODEV;
-
- if (verbose)
- printf("mmc_legacy_init\n");
-
- spi_init();
- /* this meeds to be done twice */
- mmc_hw_init();
- udelay(1000);
- mmc_hw_init();
-
- mmc_hw_get_parameters();
-
- mmc_dev.if_type = IF_TYPE_MMC;
- mmc_dev.part_type = PART_TYPE_DOS;
- mmc_dev.dev = 0;
- mmc_dev.lun = 0;
- mmc_dev.type = 0;
- mmc_dev.blksz = hw_sect_size;
- mmc_dev.lba = hw_nr_sects;
- sprintf((char*)mmc_dev.vendor, "Unknown vendor");
- sprintf((char*)mmc_dev.product, "Unknown product");
- sprintf((char*)mmc_dev.revision, "N/A");
- mmc_dev.removable = 0; /* should be true??? */
- mmc_dev.block_read = mmc_block_read;
-
- fat_register_device(&mmc_dev, 1);
-
- ret = 0;
-
- return ret;
-}
-
-#endif /* CONFIG_MMC */
diff --git a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c
deleted file mode 100644
index bd6a5b1206..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- This code was original written by Ulrich Radig and modified by
- Embedded Artists AB (www.embeddedartists.com).
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#include <config.h>
-#include <common.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/spi.h>
-
-#define MMC_Enable() PUT32(IO1CLR, 1l << 22)
-#define MMC_Disable() PUT32(IO1SET, 1l << 22)
-#define mmc_spi_cfg() spi_set_clock(8); spi_set_cfg(0, 1, 0);
-
-static unsigned char Write_Command_MMC (unsigned char *CMD);
-static void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer,
- unsigned short int Bytes);
-
-/* initialize the hardware */
-int mmc_hw_init(void)
-{
- unsigned long a;
- unsigned short int Timeout = 0;
- unsigned char b;
- unsigned char CMD[] = {0x40, 0x00, 0x00, 0x00, 0x00, 0x95};
-
- /* set-up GPIO and SPI */
- (*((volatile unsigned long *)PINSEL2)) &= ~(1l << 3); /* clear bit 3 */
- (*((volatile unsigned long *)IO1DIR)) |= (1l << 22); /* set bit 22 (output) */
-
- MMC_Disable();
-
- spi_lock();
- spi_set_clock(248);
- spi_set_cfg(0, 1, 0);
- MMC_Enable();
-
- /* waste some time */
- for(a=0; a < 20000; a++)
- asm("nop");
-
- /* Put the MMC/SD-card into SPI-mode */
- for (b = 0; b < 10; b++) /* Sends min 74+ clocks to the MMC/SD-card */
- spi_write(0xff);
-
- /* Sends command CMD0 to MMC/SD-card */
- while (Write_Command_MMC(CMD) != 1) {
- if (Timeout++ > 200) {
- MMC_Disable();
- spi_unlock();
- return(1); /* Abort with command 1 (return 1) */
- }
- }
- /* Sends Command CMD1 an MMC/SD-card */
- Timeout = 0;
- CMD[0] = 0x41;/* Command 1 */
- CMD[5] = 0xFF;
-
- while (Write_Command_MMC(CMD) != 0) {
- if (Timeout++ > 200) {
- MMC_Disable();
- spi_unlock();
- return (2); /* Abort with command 2 (return 2) */
- }
- }
-
- MMC_Disable();
- spi_unlock();
-
- return 0;
-}
-
-/* ############################################################################
- Sends a command to the MMC/SD-card
- ######################################################################### */
-static unsigned char Write_Command_MMC (unsigned char *CMD)
-{
- unsigned char a, tmp = 0xff;
- unsigned short int Timeout = 0;
-
- MMC_Disable();
- spi_write(0xFF);
- MMC_Enable();
-
- for (a = 0; a < 0x06; a++)
- spi_write(*CMD++);
-
- while (tmp == 0xff) {
- tmp = spi_read();
- if (Timeout++ > 5000)
- break;
- }
-
- return (tmp);
-}
-
-/* ############################################################################
- Routine to read the CID register from the MMC/SD-card (16 bytes)
- ######################################################################### */
-void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer, unsigned short
- int Bytes)
-{
- unsigned short int a;
-
- spi_lock();
- mmc_spi_cfg();
- MMC_Enable();
-
- if (Write_Command_MMC(CMD) != 0) {
- MMC_Disable();
- spi_unlock();
- return;
- }
-
- while (spi_read() != 0xfe) {};
- for (a = 0; a < Bytes; a++)
- *Buffer++ = spi_read();
-
- /* Read the CRC-byte */
- spi_read(); /* CRC - byte is discarded */
- spi_read(); /* CRC - byte is discarded */
- /* set MMC_Chip_Select to high (MMC/SD-card Inaktiv) */
- MMC_Disable();
- spi_unlock();
-
- return;
-}
-
-/* ############################################################################
- Routine to read a block (512 bytes) from the MMC/SD-card
- ######################################################################### */
-unsigned char mmc_read_sector (unsigned long addr,unsigned char *Buffer)
-{
- /* Command 16 to read aBlocks from the MMC/SD - caed */
- unsigned char CMD[] = {0x51,0x00,0x00,0x00,0x00,0xFF};
-
- /* The address on the MMC/SD-card is in bytes,
- addr is transformed from blocks to bytes and the result is
- placed into the command */
-
- addr = addr << 9; /* addr = addr * 512 */
-
- CMD[1] = ((addr & 0xFF000000) >> 24);
- CMD[2] = ((addr & 0x00FF0000) >> 16);
- CMD[3] = ((addr & 0x0000FF00) >> 8 );
-
- MMC_Read_Block(CMD, Buffer, 512);
-
- return (0);
-}
-
-/* ############################################################################
- Routine to write a block (512 byte) to the MMC/SD-card
- ######################################################################### */
-unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer)
-{
- unsigned char tmp, a;
- unsigned short int b;
- /* Command 24 to write a block to the MMC/SD - card */
- unsigned char CMD[] = {0x58, 0x00, 0x00, 0x00, 0x00, 0xFF};
-
- /* The address on the MMC/SD-card is in bytes,
- addr is transformed from blocks to bytes and the result is
- placed into the command */
-
- addr = addr << 9; /* addr = addr * 512 */
-
- CMD[1] = ((addr & 0xFF000000) >> 24);
- CMD[2] = ((addr & 0x00FF0000) >> 16);
- CMD[3] = ((addr & 0x0000FF00) >> 8 );
-
- spi_lock();
- mmc_spi_cfg();
- MMC_Enable();
-
- /* Send command CMD24 to the MMC/SD-card (Write 1 Block/512 Bytes) */
- tmp = Write_Command_MMC(CMD);
- if (tmp != 0) {
- MMC_Disable();
- spi_unlock();
- return(tmp);
- }
-
- /* Do a short delay and send a clock-pulse to the MMC/SD-card */
- for (a = 0; a < 100; a++)
- spi_read();
-
- /* Send a start byte to the MMC/SD-card */
- spi_write(0xFE);
-
- /* Write the block (512 bytes) to the MMC/SD-card */
- for (b = 0; b < 512; b++)
- spi_write(*Buffer++);
-
- /* write the CRC-Byte */
- spi_write(0xFF); /* write a dummy CRC */
- spi_write(0xFF); /* CRC code is not used */
-
- /* Wait for MMC/SD-card busy */
- while (spi_read() != 0xff) {};
-
- /* set MMC_Chip_Select to high (MMC/SD-card inactive) */
- MMC_Disable();
- spi_unlock();
- return (0);
-}
-
-/* #########################################################################
- Routine to read the CSD register from the MMC/SD-card (16 bytes)
- ######################################################################### */
-unsigned char mmc_read_csd (unsigned char *Buffer)
-{
- /* Command to read the CSD register */
- unsigned char CMD[] = {0x49, 0x00, 0x00, 0x00, 0x00, 0xFF};
-
- MMC_Read_Block(CMD, Buffer, 16);
-
- return (0);
-}
diff --git a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.h b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.h
deleted file mode 100644
index 3687dbf696..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/mmc_hw.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- This module implements a linux character device driver for the 24c256 chip.
- Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#ifndef _MMC_HW_
-#define _MMC_HW_
-
-unsigned char mmc_read_csd(unsigned char *Buffer);
-unsigned char mmc_read_sector (unsigned long addr,
- unsigned char *Buffer);
-unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer);
-int mmc_hw_init(void);
-
-#endif /* _MMC_HW_ */
diff --git a/arch/arm/cpu/arm720t/lpc2292/spi.c b/arch/arm/cpu/arm720t/lpc2292/spi.c
deleted file mode 100644
index d296bdac68..0000000000
--- a/arch/arm/cpu/arm720t/lpc2292/spi.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- This module implements an interface to the SPI on the lpc22xx.
- Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#include <config.h>
-#include <common.h>
-#include <asm/errno.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/spi.h>
-
-unsigned long spi_flags;
-unsigned char spi_idle = 0x00;
-
-int spi_init(void)
-{
- unsigned long pinsel0_value;
-
- /* activate spi pins */
- pinsel0_value = GET32(PINSEL0);
- pinsel0_value &= ~(0xFFl << 8);
- pinsel0_value |= (0x55l << 8);
- PUT32(PINSEL0, pinsel0_value);
-
- return 0;
-}
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index 2f914e9b4e..0daf84811a 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -43,11 +43,7 @@ _start: b reset
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
-#ifdef CONFIG_LPC2292
- .word 0xB4405F76 /* 2's complement of the checksum of the vectors */
-#else
ldr pc, _not_used
-#endif
ldr pc, _irq
ldr pc, _fiq
@@ -151,10 +147,6 @@ reset:
bl cpu_init_crit
#endif
-#ifdef CONFIG_LPC2292
- bl lowlevel_init
-#endif
-
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
@@ -291,16 +283,6 @@ _dynsym_start_ofs:
*************************************************************************
*/
-#if defined(CONFIG_LPC2292)
-PLLCFG_ADR: .word PLLCFG
-PLLFEED_ADR: .word PLLFEED
-PLLCON_ADR: .word PLLCON
-PLLSTAT_ADR: .word PLLSTAT
-VPBDIV_ADR: .word VPBDIV
-MEMMAP_ADR: .word MEMMAP
-
-#endif
-
cpu_init_crit:
#if defined(CONFIG_NETARM)
/*
@@ -371,50 +353,6 @@ cpu_init_crit:
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No specific initialisation for IntegratorAP/CM720T as yet */
-#elif defined(CONFIG_LPC2292)
- /* Set-up PLL */
- mov r3, #0xAA
- mov r4, #0x55
- /* First disconnect and disable the PLL */
- ldr r0, PLLCON_ADR
- mov r1, #0x00
- str r1, [r0]
- ldr r0, PLLFEED_ADR /* start feed sequence */
- str r3, [r0]
- str r4, [r0] /* feed sequence done */
- /* Set new M and P values */
- ldr r0, PLLCFG_ADR
- mov r1, #0x23 /* M=4 and P=2 */
- str r1, [r0]
- ldr r0, PLLFEED_ADR /* start feed sequence */
- str r3, [r0]
- str r4, [r0] /* feed sequence done */
- /* Then enable the PLL */
- ldr r0, PLLCON_ADR
- mov r1, #0x01 /* PLL enable bit */
- str r1, [r0]
- ldr r0, PLLFEED_ADR /* start feed sequence */
- str r3, [r0]
- str r4, [r0] /* feed sequence done */
- /* Wait for the lock */
- ldr r0, PLLSTAT_ADR
- mov r1, #0x400 /* lock bit */
-lock_loop:
- ldr r2, [r0]
- and r2, r1, r2
- cmp r2, #0
- beq lock_loop
- /* And finally connect the PLL */
- ldr r0, PLLCON_ADR
- mov r1, #0x03 /* PLL enable bit and connect bit */
- str r1, [r0]
- ldr r0, PLLFEED_ADR /* start feed sequence */
- str r3, [r0]
- str r4, [r0] /* feed sequence done */
- /* Set-up VPBDIV register */
- ldr r0, VPBDIV_ADR
- mov r1, #0x01 /* VPB clock is same as process clock */
- str r1, [r0]
#elif defined(CONFIG_TEGRA)
/* No cpu_init_crit for tegra as yet */
#else
@@ -432,7 +370,7 @@ lock_loop:
str r1, [r0]
#endif
-#if !defined(CONFIG_LPC2292) && !defined(CONFIG_TEGRA)
+#if !defined(CONFIG_TEGRA)
mov ip, lr
/*
* before relocating, we have to setup RAM timing
@@ -636,11 +574,6 @@ reset_cpu:
* on external peripherals such as watchdog timers, etc. */
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No specific reset actions for IntegratorAP/CM720T as yet */
-#elif defined(CONFIG_LPC2292)
- .align 5
-.globl reset_cpu
-reset_cpu:
- mov pc, r0
#elif defined(CONFIG_TEGRA)
/* No specific reset actions for tegra as yet */
#else
diff --git a/arch/arm/include/asm/arch-lpc2292/hardware.h b/arch/arm/include/asm/arch-lpc2292/hardware.h
deleted file mode 100644
index 5e227e367c..0000000000
--- a/arch/arm/include/asm/arch-lpc2292/hardware.h
+++ /dev/null
@@ -1,33 +0,0 @@
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-/*
- * Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
- * Curt Brune <curt@cucy.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#if defined(CONFIG_LPC2292)
-#include <asm/arch-lpc2292/lpc2292_registers.h>
-#else
-#error No hardware file defined for this configuration
-#endif
-
-#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/include/asm/arch-lpc2292/lpc2292_registers.h b/arch/arm/include/asm/arch-lpc2292/lpc2292_registers.h
deleted file mode 100644
index 5715f3ef74..0000000000
--- a/arch/arm/include/asm/arch-lpc2292/lpc2292_registers.h
+++ /dev/null
@@ -1,225 +0,0 @@
-#ifndef __LPC2292_REGISTERS_H
-#define __LPC2292_REGISTERS_H
-
-#include <config.h>
-
-/* Macros for reading/writing registers */
-#define PUT8(reg, value) (*(volatile unsigned char*)(reg) = (value))
-#define PUT16(reg, value) (*(volatile unsigned short*)(reg) = (value))
-#define PUT32(reg, value) (*(volatile unsigned int*)(reg) = (value))
-#define GET8(reg) (*(volatile unsigned char*)(reg))
-#define GET16(reg) (*(volatile unsigned short*)(reg))
-#define GET32(reg) (*(volatile unsigned int*)(reg))
-
-/* External Memory Controller */
-
-#define BCFG0 0xFFE00000 /* 32-bits */
-#define BCFG1 0xFFE00004 /* 32-bits */
-#define BCFG2 0xFFE00008 /* 32-bits */
-#define BCFG3 0xFFE0000c /* 32-bits */
-
-/* System Control Block */
-
-#define EXTINT 0xE01FC140
-#define EXTWAKE 0xE01FC144
-#define EXTMODE 0xE01FC148
-#define EXTPOLAR 0xE01FC14C
-#define MEMMAP 0xE01FC040
-#define PLLCON 0xE01FC080
-#define PLLCFG 0xE01FC084
-#define PLLSTAT 0xE01FC088
-#define PLLFEED 0xE01FC08C
-#define PCON 0xE01FC0C0
-#define PCONP 0xE01FC0C4
-#define VPBDIV 0xE01FC100
-
-/* Memory Acceleration Module */
-
-#define MAMCR 0xE01FC000
-#define MAMTIM 0xE01FC004
-
-/* Vectored Interrupt Controller */
-
-#define VICIRQStatus 0xFFFFF000
-#define VICFIQStatus 0xFFFFF004
-#define VICRawIntr 0xFFFFF008
-#define VICIntSelect 0xFFFFF00C
-#define VICIntEnable 0xFFFFF010
-#define VICIntEnClr 0xFFFFF014
-#define VICSoftInt 0xFFFFF018
-#define VICSoftIntClear 0xFFFFF01C
-#define VICProtection 0xFFFFF020
-#define VICVectAddr 0xFFFFF030
-#define VICDefVectAddr 0xFFFFF034
-#define VICVectAddr0 0xFFFFF100
-#define VICVectAddr1 0xFFFFF104
-#define VICVectAddr2 0xFFFFF108
-#define VICVectAddr3 0xFFFFF10C
-#define VICVectAddr4 0xFFFFF110
-#define VICVectAddr5 0xFFFFF114
-#define VICVectAddr6 0xFFFFF118
-#define VICVectAddr7 0xFFFFF11C
-#define VICVectAddr8 0xFFFFF120
-#define VICVectAddr9 0xFFFFF124
-#define VICVectAddr10 0xFFFFF128
-#define VICVectAddr11 0xFFFFF12C
-#define VICVectAddr12 0xFFFFF130
-#define VICVectAddr13 0xFFFFF134
-#define VICVectAddr14 0xFFFFF138
-#define VICVectAddr15 0xFFFFF13C
-#define VICVectCntl0 0xFFFFF200
-#define VICVectCntl1 0xFFFFF204
-#define VICVectCntl2 0xFFFFF208
-#define VICVectCntl3 0xFFFFF20C
-#define VICVectCntl4 0xFFFFF210
-#define VICVectCntl5 0xFFFFF214
-#define VICVectCntl6 0xFFFFF218
-#define VICVectCntl7 0xFFFFF21C
-#define VICVectCntl8 0xFFFFF220
-#define VICVectCntl9 0xFFFFF224
-#define VICVectCntl10 0xFFFFF228
-#define VICVectCntl11 0xFFFFF22C
-#define VICVectCntl12 0xFFFFF230
-#define VICVectCntl13 0xFFFFF234
-#define VICVectCntl14 0xFFFFF238
-#define VICVectCntl15 0xFFFFF23C
-
-/* Pin connect block */
-
-#define PINSEL0 0xE002C000 /* 32 bits */
-#define PINSEL1 0xE002C004 /* 32 bits */
-#define PINSEL2 0xE002C014 /* 32 bits */
-
-/* GPIO */
-
-#define IO0PIN 0xE0028000
-#define IO0SET 0xE0028004
-#define IO0DIR 0xE0028008
-#define IO0CLR 0xE002800C
-#define IO1PIN 0xE0028010
-#define IO1SET 0xE0028014
-#define IO1DIR 0xE0028018
-#define IO1CLR 0xE002801C
-#define IO2PIN 0xE0028020
-#define IO2SET 0xE0028024
-#define IO2DIR 0xE0028028
-#define IO2CLR 0xE002802C
-#define IO3PIN 0xE0028030
-#define IO3SET 0xE0028034
-#define IO3DIR 0xE0028038
-#define IO3CLR 0xE002803C
-
-/* Uarts */
-
-#define U0RBR 0xE000C000
-#define U0THR 0xE000C000
-#define U0IER 0xE000C004
-#define U0IIR 0xE000C008
-#define U0FCR 0xE000C008
-#define U0LCR 0xE000C00C
-#define U0LSR 0xE000C014
-#define U0SCR 0xE000C01C
-#define U0DLL 0xE000C000
-#define U0DLM 0xE000C004
-
-#define U1RBR 0xE0010000
-#define U1THR 0xE0010000
-#define U1IER 0xE0010004
-#define U1IIR 0xE0010008
-#define U1FCR 0xE0010008
-#define U1LCR 0xE001000C
-#define U1MCR 0xE0010010
-#define U1LSR 0xE0010014
-#define U1MSR 0xE0010018
-#define U1SCR 0xE001001C
-#define U1DLL 0xE0010000
-#define U1DLM 0xE0010004
-
-/* I2C */
-
-#define I2CONSET 0xE001C000
-#define I2STAT 0xE001C004
-#define I2DAT 0xE001C008
-#define I2ADR 0xE001C00C
-#define I2SCLH 0xE001C010
-#define I2SCLL 0xE001C014
-#define I2CONCLR 0xE001C018
-
-/* SPI */
-
-#define S0SPCR 0xE0020000
-#define S0SPSR 0xE0020004
-#define S0SPDR 0xE0020008
-#define S0SPCCR 0xE002000C
-#define S0SPINT 0xE002001C
-
-#define S1SPCR 0xE0030000
-#define S1SPSR 0xE0030004
-#define S1SPDR 0xE0030008
-#define S1SPCCR 0xE003000C
-#define S1SPINT 0xE003001C
-
-/* CAN controller */
-
-/* skip for now */
-
-/* Timers */
-
-#define T0IR 0xE0004000
-#define T0TCR 0xE0004004
-#define T0TC 0xE0004008
-#define T0PR 0xE000400C
-#define T0PC 0xE0004010
-#define T0MCR 0xE0004014
-#define T0MR0 0xE0004018
-#define T0MR1 0xE000401C
-#define T0MR2 0xE0004020
-#define T0MR3 0xE0004024
-#define T0CCR 0xE0004028
-#define T0CR0 0xE000402C
-#define T0CR1 0xE0004030
-#define T0CR2 0xE0004034
-#define T0CR3 0xE0004038
-#define T0EMR 0xE000403C
-
-#define T1IR 0xE0008000
-#define T1TCR 0xE0008004
-#define T1TC 0xE0008008
-#define T1PR 0xE000800C
-#define T1PC 0xE0008010
-#define T1MCR 0xE0008014
-#define T1MR0 0xE0008018
-#define T1MR1 0xE000801C
-#define T1MR2 0xE0008020
-#define T1MR3 0xE0008024
-#define T1CCR 0xE0008028
-#define T1CR0 0xE000802C
-#define T1CR1 0xE0008030
-#define T1CR2 0xE0008034
-#define T1CR3 0xE0008038
-#define T1EMR 0xE000803C
-
-/* PWM */
-
-/* skip for now */
-
-/* A/D converter */
-
-/* skip for now */
-
-/* Real Time Clock */
-
-/* skip for now */
-
-/* Watchdog */
-
-#define WDMOD 0xE0000000
-#define WDTC 0xE0000004
-#define WDFEED 0xE0000008
-#define WDTV 0xE000000C
-
-/* EmbeddedICE LOGIC */
-
-/* skip for now */
-
-#endif
diff --git a/arch/arm/include/asm/arch-lpc2292/spi.h b/arch/arm/include/asm/arch-lpc2292/spi.h
deleted file mode 100644
index 6ae66e8ba7..0000000000
--- a/arch/arm/include/asm/arch-lpc2292/spi.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- This file defines the interface to the lpc22xx SPI module.
- Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
-
- This file may be included in software not adhering to the GPL.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#ifndef SPI_H
-#define SPI_H
-
-#include <config.h>
-#include <common.h>
-#include <asm/errno.h>
-#include <asm/arch/hardware.h>
-
-#define SPIF 0x80
-
-#define spi_lock() disable_interrupts();
-#define spi_unlock() enable_interrupts();
-
-extern unsigned long spi_flags;
-extern unsigned char spi_idle;
-
-int spi_init(void);
-
-static inline unsigned char spi_read(void)
-{
- unsigned char b;
-
- PUT8(S0SPDR, spi_idle);
- while (!(GET8(S0SPSR) & SPIF));
- b = GET8(S0SPDR);
-
- return b;
-}
-
-static inline void spi_write(unsigned char b)
-{
- PUT8(S0SPDR, b);
- while (!(GET8(S0SPSR) & SPIF));
- GET8(S0SPDR); /* this will clear the SPIF bit */
-}
-
-static inline void spi_set_clock(unsigned char clk_value)
-{
- PUT8(S0SPCCR, clk_value);
-}
-
-static inline void spi_set_cfg(unsigned char phase,
- unsigned char polarity,
- unsigned char lsbf)
-{
- unsigned char v = 0x20; /* master bit set */
-
- if (phase)
- v |= 0x08; /* set phase bit */
- if (polarity) {
- v |= 0x10; /* set polarity bit */
- spi_idle = 0xFF;
- } else {
- spi_idle = 0x00;
- }
- if (lsbf)
- v |= 0x40; /* set lsbf bit */
-
- PUT8(S0SPCR, v);
-}
-#endif /* SPI_H */