3 files changed, 4 insertions, 116 deletions
diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile
index 8737f434d9..d9b2b999e1 100644
--- a/arch/arm/mach-zynq/Makefile
+++ b/arch/arm/mach-zynq/Makefile
@@ -6,7 +6,6 @@
 # (C) Copyright 2008
 # Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
 
-obj-y	:= timer.o
 obj-y	+= cpu.o
 obj-y	+= ddrc.o
 obj-y	+= slcr.o
diff --git a/arch/arm/mach-zynq/clk.c b/arch/arm/mach-zynq/clk.c
index 27f6bf2183..1945f60e08 100644
--- a/arch/arm/mach-zynq/clk.c
+++ b/arch/arm/mach-zynq/clk.c
@@ -52,10 +52,12 @@ int set_cpu_clk_info(void)
 			return ret;
 
 		rate = clk_get_rate(&clk) / 1000000;
-		if (i)
+		if (i) {
 			gd->bd->bi_ddr_freq = rate;
-		else
+		} else {
 			gd->bd->bi_arm_freq = rate;
+			gd->cpu_clk = clk_get_rate(&clk);
+		}
 
 		clk_free(&clk);
 	}
diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c
deleted file mode 100644
index a51822a530..0000000000
--- a/arch/arm/mach-zynq/timer.c
+++ /dev/null
@@ -1,113 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2017 Weidmüller Interface GmbH & Co. KG
- * Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
- *
- * Copyright (C) 2012 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2011-2017 Xilinx, Inc. All rights reserved.
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * (C) Copyright 2004
- * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
- *
- * (C) Copyright 2002-2004
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * (C) Copyright 2003
- * Texas Instruments <www.ti.com>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- */
-
-#include <clk.h>
-#include <common.h>
-#include <div64.h>
-#include <dm.h>
-#include <init.h>
-#include <time.h>
-#include <malloc.h>
-#include <asm/global_data.h>
-#include <asm/io.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/clk.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct scu_timer {
-	u32 load; /* Timer Load Register */
-	u32 counter; /* Timer Counter Register */
-	u32 control; /* Timer Control Register */
-};
-
-static struct scu_timer *timer_base =
-			      (struct scu_timer *)ZYNQ_SCUTIMER_BASEADDR;
-
-#define SCUTIMER_CONTROL_PRESCALER_MASK	0x0000FF00 /* Prescaler */
-#define SCUTIMER_CONTROL_PRESCALER_SHIFT	8
-#define SCUTIMER_CONTROL_AUTO_RELOAD_MASK	0x00000002 /* Auto-reload */
-#define SCUTIMER_CONTROL_ENABLE_MASK		0x00000001 /* Timer enable */
-
-#define TIMER_LOAD_VAL 0xFFFFFFFF
-#define TIMER_PRESCALE 255
-
-int timer_init(void)
-{
-	const u32 emask = SCUTIMER_CONTROL_AUTO_RELOAD_MASK |
-			(TIMER_PRESCALE << SCUTIMER_CONTROL_PRESCALER_SHIFT) |
-			SCUTIMER_CONTROL_ENABLE_MASK;
-
-	struct udevice *dev;
-	struct clk clk;
-	int ret;
-
-	ret = uclass_get_device_by_driver(UCLASS_CLK,
-		DM_DRIVER_GET(zynq_clk), &dev);
-	if (ret)
-		return ret;
-
-	clk.id = cpu_6or4x_clk;
-	ret = clk_request(dev, &clk);
-	if (ret < 0)
-		return ret;
-
-	gd->cpu_clk = clk_get_rate(&clk);
-
-	clk_free(&clk);
-
-	gd->arch.timer_rate_hz = (gd->cpu_clk / 2) / (TIMER_PRESCALE + 1);
-
-	/* Load the timer counter register */
-	writel(0xFFFFFFFF, &timer_base->load);
-
-	/*
-	 * Start the A9Timer device
-	 * Enable Auto reload mode, Clear prescaler control bits
-	 * Set prescaler value, Enable the decrementer
-	 */
-	clrsetbits_le32(&timer_base->control, SCUTIMER_CONTROL_PRESCALER_MASK,
-								emask);
-
-	/* Reset time */
-	gd->arch.lastinc = readl(&timer_base->counter) /
-				(gd->arch.timer_rate_hz / CONFIG_SYS_HZ);
-	gd->arch.tbl = 0;
-
-	return 0;
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
-	return gd->arch.timer_rate_hz;
-}