1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-stm32mp/psci.c b/arch/arm/mach-stm32mp/psci.c
index 139bb092922..1d91b2d324a 100644
--- a/arch/arm/mach-stm32mp/psci.c
+++ b/arch/arm/mach-stm32mp/psci.c
@@ -30,7 +30,7 @@ u8 psci_state[STM32MP1_PSCI_NR_CPUS] __secure_data = {
 	 PSCI_AFFINITY_LEVEL_ON,
 	 PSCI_AFFINITY_LEVEL_OFF};
 
-void __secure psci_set_state(int cpu, u8 state)
+static inline void psci_set_state(int cpu, u8 state)
 {
 	psci_state[cpu] = state;
 	dsb();
@@ -67,7 +67,7 @@ void __secure psci_arch_cpu_entry(void)
 	writel(0xFFFFFFFF, TAMP_BACKUP_MAGIC_NUMBER);
 }
 
-int __secure psci_features(u32 function_id, u32 psci_fid)
+s32 __secure psci_features(u32 function_id, u32 psci_fid)
 {
 	switch (psci_fid) {
 	case ARM_PSCI_0_2_FN_PSCI_VERSION:
@@ -82,12 +82,12 @@ int __secure psci_features(u32 function_id, u32 psci_fid)
 	return ARM_PSCI_RET_NI;
 }
 
-unsigned int __secure psci_version(u32 function_id)
+u32 __secure psci_version(void)
 {
 	return ARM_PSCI_VER_1_0;
 }
 
-int __secure psci_affinity_info(u32 function_id, u32 target_affinity,
+s32 __secure psci_affinity_info(u32 function_id, u32 target_affinity,
 				u32  lowest_affinity_level)
 {
 	u32 cpu = target_affinity & MPIDR_AFF0;
@@ -104,7 +104,7 @@ int __secure psci_affinity_info(u32 function_id, u32 target_affinity,
 	return psci_state[cpu];
 }
 
-int __secure psci_migrate_info_type(u32 function_id)
+u32 __secure psci_migrate_info_type(void)
 {
 	/*
 	 * in Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
@@ -116,7 +116,7 @@ int __secure psci_migrate_info_type(u32 function_id)
 	return 2;
 }
 
-int __secure psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
+s32 __secure psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
 			 u32 context_id)
 {
 	u32 cpu = target_cpu & MPIDR_AFF0;
@@ -161,7 +161,7 @@ int __secure psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
 	return ARM_PSCI_RET_SUCCESS;
 }
 
-int __secure psci_cpu_off(u32 function_id)
+s32 __secure psci_cpu_off(void)
 {
 	u32 cpu;
 
@@ -181,7 +181,7 @@ int __secure psci_cpu_off(u32 function_id)
 		wfi();
 }
 
-void __secure psci_system_reset(u32 function_id)
+void __secure psci_system_reset(void)
 {
 	/* System reset */
 	writel(RCC_MP_GRSTCSETR_MPSYSRST, RCC_MP_GRSTCSETR);
@@ -190,7 +190,7 @@ void __secure psci_system_reset(u32 function_id)
 		wfi();
 }
 
-void __secure psci_system_off(u32 function_id)
+void __secure psci_system_off(void)
 {
 	/* System Off is not managed, waiting user power off
 	 * TODO: handle I2C write in PMIC Main Control register bit 0 = SWOFF