diff options
Diffstat (limited to 'arch/arm/mach-k3')
-rw-r--r-- | arch/arm/mach-k3/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-k3/Makefile | 7 | ||||
-rw-r--r-- | arch/arm/mach-k3/am625_fdt.c | 85 | ||||
-rw-r--r-- | arch/arm/mach-k3/am625_init.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-k3/am62x/clk-data.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-k3/am654_fdt.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-k3/am654_init.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-k3/common.c | 99 | ||||
-rw-r--r-- | arch/arm/mach-k3/common.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-k3/common_fdt.c | 114 | ||||
-rw-r--r-- | arch/arm/mach-k3/common_fdt.h | 12 | ||||
-rw-r--r-- | arch/arm/mach-k3/include/mach/am62_hardware.h | 78 | ||||
-rw-r--r-- | arch/arm/mach-k3/include/mach/sys_proto.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-k3/j721e_fdt.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-k3/j721e_init.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-k3/j721s2_fdt.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-k3/j721s2_init.c | 2 |
17 files changed, 343 insertions, 106 deletions
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index c5c909919d..31610db0db 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -215,4 +215,5 @@ source "board/siemens/iot2050/Kconfig" source "board/ti/j721s2/Kconfig" source "board/ti/j722s/Kconfig" source "board/ti/j784s4/Kconfig" +source "board/toradex/verdin-am62/Kconfig" endif diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile index 9a3c735327..3a0327defc 100644 --- a/arch/arm/mach-k3/Makefile +++ b/arch/arm/mach-k3/Makefile @@ -13,6 +13,13 @@ obj-$(CONFIG_SOC_K3_J722S) += j722s/ obj-$(CONFIG_ARM64) += arm64-mmu.o obj-$(CONFIG_CPU_V7R) += r5_mpu.o lowlevel_init.o obj-$(CONFIG_ARM64) += cache.o +obj-$(CONFIG_OF_LIBFDT) += common_fdt.o +ifeq ($(CONFIG_OF_LIBFDT)$(CONFIG_OF_SYSTEM_SETUP),yy) +obj-$(CONFIG_SOC_K3_AM654) += am654_fdt.o +obj-$(CONFIG_SOC_K3_J721E) += j721e_fdt.o +obj-$(CONFIG_SOC_K3_J721S2) += j721s2_fdt.o +obj-$(CONFIG_SOC_K3_AM625) += am625_fdt.o +endif ifeq ($(CONFIG_SPL_BUILD),y) obj-$(CONFIG_SOC_K3_AM654) += am654_init.o obj-$(CONFIG_SOC_K3_J721E) += j721e_init.o diff --git a/arch/arm/mach-k3/am625_fdt.c b/arch/arm/mach-k3/am625_fdt.c new file mode 100644 index 0000000000..3c46d1028f --- /dev/null +++ b/arch/arm/mach-k3/am625_fdt.c @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2023 Toradex - https://www.toradex.com/ + */ + +#include <asm/hardware.h> +#include "common_fdt.h" +#include <fdt_support.h> + +static void fdt_fixup_cores_nodes_am625(void *blob, int core_nr) +{ + char node_path[32]; + + if (core_nr < 1) + return; + + for (; core_nr < 4; core_nr++) { + snprintf(node_path, sizeof(node_path), "/cpus/cpu@%d", core_nr); + fdt_del_node_path(blob, node_path); + snprintf(node_path, sizeof(node_path), "/cpus/cpu-map/cluster0/core%d", core_nr); + fdt_del_node_path(blob, node_path); + snprintf(node_path, sizeof(node_path), "/bus@f0000/watchdog@e0%d0000", core_nr); + fdt_del_node_path(blob, node_path); + } +} + +static void fdt_fixup_gpu_nodes_am625(void *blob, int has_gpu) +{ + if (!has_gpu) { + fdt_del_node_path(blob, "/bus@f0000/gpu@fd00000"); + fdt_del_node_path(blob, "/bus@f0000/watchdog@e0f0000"); + } +} + +static void fdt_fixup_pru_node_am625(void *blob, int has_pru) +{ + if (!has_pru) + fdt_del_node_path(blob, "/bus@f0000/pruss@30040000"); +} + +static int fdt_fixup_trips_node(void *blob, int zoneoffset, int maxc) +{ + int node, trip; + + node = fdt_subnode_offset(blob, zoneoffset, "trips"); + if (node < 0) + return -1; + + fdt_for_each_subnode(trip, blob, node) { + const char *type = fdt_getprop(blob, trip, "type", NULL); + + if (!type || (strncmp(type, "critical", 8) != 0)) + continue; + + if (fdt_setprop_u32(blob, trip, "temperature", 1000 * maxc) < 0) + return -1; + } + + return 0; +} + +static void fdt_fixup_thermal_zone_nodes_am625(void *blob, int maxc) +{ + int node, zone; + + node = fdt_path_offset(blob, "/thermal-zones"); + if (node < 0) + return; + + fdt_for_each_subnode(zone, blob, node) { + if (fdt_fixup_trips_node(blob, zone, maxc) < 0) + printf("Failed to set temperature in %s critical trips\n", + fdt_get_name(blob, zone, NULL)); + } +} + +int ft_system_setup(void *blob, struct bd_info *bd) +{ + fdt_fixup_cores_nodes_am625(blob, k3_get_core_nr()); + fdt_fixup_gpu_nodes_am625(blob, k3_has_gpu()); + fdt_fixup_pru_node_am625(blob, k3_has_pru()); + fdt_fixup_thermal_zone_nodes_am625(blob, k3_get_max_temp()); + + return 0; +} diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c index ccbfad29d7..12c5b71d38 100644 --- a/arch/arm/mach-k3/am625_init.c +++ b/arch/arm/mach-k3/am625_init.c @@ -223,8 +223,7 @@ void board_init_f(ulong dummy) &cpswdev)) printf("Failed to probe am65_cpsw_nuss driver\n"); } - - spl_enable_dcache(); + spl_enable_cache(); } u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) diff --git a/arch/arm/mach-k3/am62x/clk-data.c b/arch/arm/mach-k3/am62x/clk-data.c index c0881778fe..d7bfed0e03 100644 --- a/arch/arm/mach-k3/am62x/clk-data.c +++ b/arch/arm/mach-k3/am62x/clk-data.c @@ -57,7 +57,7 @@ static const char * const sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk_parents[] = { static const char * const clkout0_ctrl_out0_parents[] = { "hsdiv4_16fft_main_2_hsdivout1_clk", - "hsdiv4_16fft_main_2_hsdivout1_clk", + "hsdiv4_16fft_main_2_hsdivout1_clk10", }; static const char * const clk_32k_rc_sel_out0_parents[] = { @@ -195,6 +195,7 @@ static const struct clk_data clk_list[] = { CLK_DIV("hsdiv4_16fft_main_1_hsdivout1_clk", "pllfracf_ssmod_16fft_main_1_foutvcop_clk", 0x681084, 0, 7, 0, 0), CLK_DIV("hsdiv4_16fft_main_1_hsdivout2_clk", "pllfracf_ssmod_16fft_main_1_foutvcop_clk", 0x681088, 0, 7, 0, 0), CLK_DIV("hsdiv4_16fft_main_2_hsdivout1_clk", "pllfracf_ssmod_16fft_main_2_foutvcop_clk", 0x682084, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_2_hsdivout1_clk10", "pllfracf_ssmod_16fft_main_2_foutvcop_clk", 0x682084, 0, 7, 0, 0), CLK_DIV("hsdiv4_16fft_main_2_hsdivout2_clk", "pllfracf_ssmod_16fft_main_2_foutvcop_clk", 0x682088, 0, 7, 0, 0), CLK_DIV("hsdiv4_16fft_mcu_0_hsdivout0_clk", "pllfracf_ssmod_16fft_mcu_0_foutvcop_clk", 0x4040080, 0, 7, 0, 0), CLK_MUX_PLLCTRL("sam62_pll_ctrl_wrap_main_0_sysclkout_clk", sam62_pll_ctrl_wrap_main_0_sysclkout_clk_parents, 2, 0x410000, 0), @@ -313,7 +314,7 @@ static const struct dev_clk soc_dev_clk_data[] = { DEV_CLK(146, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), DEV_CLK(157, 20, "clkout0_ctrl_out0"), DEV_CLK(157, 21, "hsdiv4_16fft_main_2_hsdivout1_clk"), - DEV_CLK(157, 22, "hsdiv4_16fft_main_2_hsdivout1_clk"), + DEV_CLK(157, 22, "hsdiv4_16fft_main_2_hsdivout1_clk10"), DEV_CLK(157, 24, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), DEV_CLK(157, 25, "board_0_ddr0_ck0_out"), DEV_CLK(157, 40, "mshsi2c_main_0_porscl"), diff --git a/arch/arm/mach-k3/am654_fdt.c b/arch/arm/mach-k3/am654_fdt.c new file mode 100644 index 0000000000..652fe8d32b --- /dev/null +++ b/arch/arm/mach-k3/am654_fdt.c @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2023 Toradex - https://www.toradex.com/ + */ + +#include "common_fdt.h" +#include <fdt_support.h> + +int ft_system_setup(void *blob, struct bd_info *bd) +{ + return fdt_fixup_msmc_ram_k3(blob); +} diff --git a/arch/arm/mach-k3/am654_init.c b/arch/arm/mach-k3/am654_init.c index 768fdd6960..511be6b753 100644 --- a/arch/arm/mach-k3/am654_init.c +++ b/arch/arm/mach-k3/am654_init.c @@ -261,7 +261,7 @@ void board_init_f(ulong dummy) if (ret) panic("DRAM init failed: %d\n", ret); #endif - spl_enable_dcache(); + spl_enable_cache(); } u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index 23ec1f26e8..faa7848dc2 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -409,101 +409,6 @@ void board_fit_image_post_process(const void *fit, int node, void **p_image, } #endif -#if defined(CONFIG_OF_LIBFDT) -int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name) -{ - u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2]; - struct ti_sci_handle *ti_sci = get_ti_sci_handle(); - int ret, node, subnode, len, prev_node; - u32 range[4], addr, size; - const fdt32_t *sub_reg; - - ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end); - msmc_size = msmc_end - msmc_start + 1; - debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__, - msmc_start, msmc_size); - - /* find or create "msmc_sram node */ - ret = fdt_path_offset(blob, parent_path); - if (ret < 0) - return ret; - - node = fdt_find_or_add_subnode(blob, ret, node_name); - if (node < 0) - return node; - - ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram"); - if (ret < 0) - return ret; - - reg[0] = cpu_to_fdt64(msmc_start); - reg[1] = cpu_to_fdt64(msmc_size); - ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg)); - if (ret < 0) - return ret; - - fdt_setprop_cell(blob, node, "#address-cells", 1); - fdt_setprop_cell(blob, node, "#size-cells", 1); - - range[0] = 0; - range[1] = cpu_to_fdt32(msmc_start >> 32); - range[2] = cpu_to_fdt32(msmc_start & 0xffffffff); - range[3] = cpu_to_fdt32(msmc_size); - ret = fdt_setprop(blob, node, "ranges", range, sizeof(range)); - if (ret < 0) - return ret; - - subnode = fdt_first_subnode(blob, node); - prev_node = 0; - - /* Look for invalid subnodes and delete them */ - while (subnode >= 0) { - sub_reg = fdt_getprop(blob, subnode, "reg", &len); - addr = fdt_read_number(sub_reg, 1); - sub_reg++; - size = fdt_read_number(sub_reg, 1); - debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__, - subnode, addr, size); - if (addr + size > msmc_size || - !strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) || - !strncmp(fdt_get_name(blob, subnode, &len), "tifs", 4) || - !strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) { - fdt_del_node(blob, subnode); - debug("%s: deleting subnode %d\n", __func__, subnode); - if (!prev_node) - subnode = fdt_first_subnode(blob, node); - else - subnode = fdt_next_subnode(blob, prev_node); - } else { - prev_node = subnode; - subnode = fdt_next_subnode(blob, prev_node); - } - } - - return 0; -} - -int fdt_disable_node(void *blob, char *node_path) -{ - int offs; - int ret; - - offs = fdt_path_offset(blob, node_path); - if (offs < 0) { - printf("Node %s not found.\n", node_path); - return offs; - } - ret = fdt_setprop_string(blob, offs, "status", "disabled"); - if (ret < 0) { - printf("Could not add status property to node %s: %s\n", - node_path, fdt_strerror(ret)); - return ret; - } - return 0; -} - -#endif - #ifndef CONFIG_SYSRESET void reset_cpu(void) { @@ -668,7 +573,7 @@ void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size) } } -void spl_enable_dcache(void) +void spl_enable_cache(void) { #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) phys_addr_t ram_top = CFG_SYS_SDRAM_BASE; @@ -689,7 +594,7 @@ void spl_enable_dcache(void) gd->arch.tlb_addr + gd->arch.tlb_size); gd->relocaddr = gd->arch.tlb_addr; - dcache_enable(); + enable_caches(); #endif } diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index 4c0d4666d7..d4b0b90e5c 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -38,7 +38,7 @@ void disable_linefill_optimization(void); void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size); int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr); void k3_sysfw_print_ver(void); -void spl_enable_dcache(void); +void spl_enable_cache(void); void mmr_unlock(phys_addr_t base, u32 partition); bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data); enum k3_device_type get_device_type(void); diff --git a/arch/arm/mach-k3/common_fdt.c b/arch/arm/mach-k3/common_fdt.c new file mode 100644 index 0000000000..30364713a5 --- /dev/null +++ b/arch/arm/mach-k3/common_fdt.c @@ -0,0 +1,114 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2023 Toradex - https://www.toradex.com/ + */ + +#include "common.h" +#include <dm.h> +#include <fdt_support.h> +#include <linux/soc/ti/ti_sci_protocol.h> +#include "include/mach/sys_proto.h" + +static int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name) +{ + u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2]; + struct ti_sci_handle *ti_sci = get_ti_sci_handle(); + int ret, node, subnode, len, prev_node; + u32 range[4], addr, size; + const fdt32_t *sub_reg; + + ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end); + msmc_size = msmc_end - msmc_start + 1; + debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__, + msmc_start, msmc_size); + + /* find or create "msmc_sram node */ + ret = fdt_path_offset(blob, parent_path); + if (ret < 0) + return ret; + + node = fdt_find_or_add_subnode(blob, ret, node_name); + if (node < 0) + return node; + + ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram"); + if (ret < 0) + return ret; + + reg[0] = cpu_to_fdt64(msmc_start); + reg[1] = cpu_to_fdt64(msmc_size); + ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg)); + if (ret < 0) + return ret; + + fdt_setprop_cell(blob, node, "#address-cells", 1); + fdt_setprop_cell(blob, node, "#size-cells", 1); + + range[0] = 0; + range[1] = cpu_to_fdt32(msmc_start >> 32); + range[2] = cpu_to_fdt32(msmc_start & 0xffffffff); + range[3] = cpu_to_fdt32(msmc_size); + ret = fdt_setprop(blob, node, "ranges", range, sizeof(range)); + if (ret < 0) + return ret; + + subnode = fdt_first_subnode(blob, node); + prev_node = 0; + + /* Look for invalid subnodes and delete them */ + while (subnode >= 0) { + sub_reg = fdt_getprop(blob, subnode, "reg", &len); + addr = fdt_read_number(sub_reg, 1); + sub_reg++; + size = fdt_read_number(sub_reg, 1); + debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__, + subnode, addr, size); + if (addr + size > msmc_size || + !strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) || + !strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) { + fdt_del_node(blob, subnode); + debug("%s: deleting subnode %d\n", __func__, subnode); + if (!prev_node) + subnode = fdt_first_subnode(blob, node); + else + subnode = fdt_next_subnode(blob, prev_node); + } else { + prev_node = subnode; + subnode = fdt_next_subnode(blob, prev_node); + } + } + + return 0; +} + +int fdt_fixup_msmc_ram_k3(void *blob) +{ + int ret; + + ret = fdt_fixup_msmc_ram(blob, "/bus@100000", "sram@70000000"); + if (ret < 0) + ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000", + "sram@70000000"); + if (ret) + printf("%s: fixing up msmc ram failed %d\n", __func__, ret); + + return ret; +} + +int fdt_del_node_path(void *blob, const char *path) +{ + int ret; + int nodeoff; + + nodeoff = fdt_path_offset(blob, path); + if (nodeoff < 0) + return 0; /* Not found, skip it */ + + ret = fdt_del_node(blob, nodeoff); + if (ret < 0) + printf("Unable to delete node %s, err=%s\n", path, fdt_strerror(ret)); + else + debug("Deleted node %s\n", path); + + return ret; +} diff --git a/arch/arm/mach-k3/common_fdt.h b/arch/arm/mach-k3/common_fdt.h new file mode 100644 index 0000000000..4d23ae638c --- /dev/null +++ b/arch/arm/mach-k3/common_fdt.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright 2023 Toradex - https://www.toradex.com/ + */ + +#ifndef _COMMON_FDT_H +#define _COMMON_FDT_H + +int fdt_fixup_msmc_ram_k3(void *blob); +int fdt_del_node_path(void *blob, const char *path); + +#endif /* _COMMON_FDT_H */ diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h b/arch/arm/mach-k3/include/mach/am62_hardware.h index db4a32cd46..e35dc20d88 100644 --- a/arch/arm/mach-k3/include/mach/am62_hardware.h +++ b/arch/arm/mach-k3/include/mach/am62_hardware.h @@ -20,6 +20,32 @@ #define MCU_CTRL_MMR0_BASE 0x04500000 #define WKUP_CTRL_MMR0_BASE 0x43000000 +#define CTRLMMR_WKUP_JTAG_DEVICE_ID (WKUP_CTRL_MMR0_BASE + 0x18) +#define JTAG_DEV_ID_MASK GENMASK(31, 18) +#define JTAG_DEV_ID_SHIFT 18 +#define JTAG_DEV_CORE_NR_MASK GENMASK(21, 19) +#define JTAG_DEV_CORE_NR_SHIFT 19 +#define JTAG_DEV_GPU_MASK BIT(18) +#define JTAG_DEV_GPU_SHIFT 18 +#define JTAG_DEV_FEATURES_MASK GENMASK(17, 13) +#define JTAG_DEV_FEATURES_SHIFT 13 +#define JTAG_DEV_SECURITY_MASK BIT(12) +#define JTAG_DEV_SECURITY_SHIFT 12 +#define JTAG_DEV_SAFETY_MASK BIT(11) +#define JTAG_DEV_SAFETY_SHIFT 11 +#define JTAG_DEV_SPEED_MASK GENMASK(10, 6) +#define JTAG_DEV_SPEED_SHIFT 6 +#define JTAG_DEV_TEMP_MASK GENMASK(5, 3) +#define JTAG_DEV_TEMP_SHIFT 3 +#define JTAG_DEV_PKG_MASK GENMASK(2, 0) +#define JTAG_DEV_PKG_SHIFT 0 + +#define JTAG_DEV_FEATURE_NO_PRU 0x4 + +#define JTAG_DEV_TEMP_COMMERCIAL 0x3 +#define JTAG_DEV_TEMP_INDUSTRIAL 0x4 +#define JTAG_DEV_TEMP_AUTOMOTIVE 0x5 + #define CTRLMMR_MAIN_DEVSTAT (WKUP_CTRL_MMR0_BASE + 0x30) #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK GENMASK(6, 3) #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3 @@ -57,4 +83,56 @@ #define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c30000 +static inline int k3_get_core_nr(void) +{ + u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + + return (full_devid & JTAG_DEV_CORE_NR_MASK) >> JTAG_DEV_CORE_NR_SHIFT; +} + +static inline char k3_get_speed_grade(void) +{ + u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + u32 speed_grade = (full_devid & JTAG_DEV_SPEED_MASK) >> + JTAG_DEV_SPEED_SHIFT; + + return 'A' - 1 + speed_grade; +} + +static inline int k3_get_temp_grade(void) +{ + u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + + return (full_devid & JTAG_DEV_TEMP_MASK) >> JTAG_DEV_TEMP_SHIFT; +} + +static inline int k3_get_max_temp(void) +{ + switch (k3_get_temp_grade()) { + case JTAG_DEV_TEMP_INDUSTRIAL: + return 105; + case JTAG_DEV_TEMP_AUTOMOTIVE: + return 125; + case JTAG_DEV_TEMP_COMMERCIAL: + default: + return 95; + } +} + +static inline int k3_has_pru(void) +{ + u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + u32 feature_mask = (full_devid & JTAG_DEV_FEATURES_MASK) >> + JTAG_DEV_FEATURES_SHIFT; + + return !(feature_mask & JTAG_DEV_FEATURE_NO_PRU); +} + +static inline int k3_has_gpu(void) +{ + u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + + return (full_devid & JTAG_DEV_GPU_MASK) >> JTAG_DEV_GPU_SHIFT; +} + #endif /* __ASM_ARCH_AM62_HARDWARE_H */ diff --git a/arch/arm/mach-k3/include/mach/sys_proto.h b/arch/arm/mach-k3/include/mach/sys_proto.h index dbf26b0aeb..d5d4b787b7 100644 --- a/arch/arm/mach-k3/include/mach/sys_proto.h +++ b/arch/arm/mach-k3/include/mach/sys_proto.h @@ -11,7 +11,6 @@ void sdelay(unsigned long loops); u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr, u32 bound); struct ti_sci_handle *get_ti_sci_handle(void); -int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name); int do_board_detect(void); void release_resources_for_core_shutdown(void); int fdt_disable_node(void *blob, char *node_path); diff --git a/arch/arm/mach-k3/j721e_fdt.c b/arch/arm/mach-k3/j721e_fdt.c new file mode 100644 index 0000000000..652fe8d32b --- /dev/null +++ b/arch/arm/mach-k3/j721e_fdt.c @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2023 Toradex - https://www.toradex.com/ + */ + +#include "common_fdt.h" +#include <fdt_support.h> + +int ft_system_setup(void *blob, struct bd_info *bd) +{ + return fdt_fixup_msmc_ram_k3(blob); +} diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index 93b4e553a8..6c0b3ec8cb 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -332,7 +332,7 @@ void board_init_f(ulong dummy) if (ret) panic("DRAM init failed: %d\n", ret); #endif - spl_enable_dcache(); + spl_enable_cache(); } u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) diff --git a/arch/arm/mach-k3/j721s2_fdt.c b/arch/arm/mach-k3/j721s2_fdt.c new file mode 100644 index 0000000000..652fe8d32b --- /dev/null +++ b/arch/arm/mach-k3/j721s2_fdt.c @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2023 Toradex - https://www.toradex.com/ + */ + +#include "common_fdt.h" +#include <fdt_support.h> + +int ft_system_setup(void *blob, struct bd_info *bd) +{ + return fdt_fixup_msmc_ram_k3(blob); +} diff --git a/arch/arm/mach-k3/j721s2_init.c b/arch/arm/mach-k3/j721s2_init.c index 90324ce096..680123e8af 100644 --- a/arch/arm/mach-k3/j721s2_init.c +++ b/arch/arm/mach-k3/j721s2_init.c @@ -233,7 +233,7 @@ void k3_mem_init(void) if (ret && ret != -ENODEV) panic("DRAM 1 init failed: %d\n", ret); } - spl_enable_dcache(); + spl_enable_cache(); } u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) |