diff options
Diffstat (limited to 'arch/arm/include/asm/arch-rockchip')
-rw-r--r-- | arch/arm/include/asm/arch-rockchip/clock.h | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-rockchip/cru.h | 18 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-rockchip/cru_rk3288.h | 6 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 11 |
4 files changed, 28 insertions, 11 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h index 8f7fc86a9eb..22de0aef8dc 100644 --- a/arch/arm/include/asm/arch-rockchip/clock.h +++ b/arch/arm/include/asm/arch-rockchip/clock.h @@ -153,10 +153,10 @@ void *rockchip_get_cru(void); */ void *rockchip_get_pmucru(void); -struct rk3288_cru; +struct rockchip_cru; struct rk3288_grf; -void rk3288_clk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf); +void rk3288_clk_configure_cpu(struct rockchip_cru *cru, struct rk3288_grf *grf); int rockchip_get_clk(struct udevice **devp); diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h new file mode 100644 index 00000000000..475d772fb64 --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/cru.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * (C) Copyright 2019 Amarula Solutions. + * Author: Jagan Teki <jagan@amarulasolutions.com> + */ + +#ifndef _ROCKCHIP_CLOCK_H +#define _ROCKCHIP_CLOCK_H + +#if defined(CONFIG_ROCKCHIP_RK3288) +# include <asm/arch-rockchip/cru_rk3288.h> +#elif defined(CONFIG_ROCKCHIP_RK3399) +# include <asm/arch-rockchip/cru_rk3399.h> +#endif + +#define MHz 1000000 + +#endif /* _ROCKCHIP_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h index e891f20b373..7aa6efe46c5 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h @@ -27,11 +27,11 @@ /* Private data for the clock driver - used by rockchip_get_cru() */ struct rk3288_clk_priv { struct rk3288_grf *grf; - struct rk3288_cru *cru; + struct rockchip_cru *cru; ulong rate; }; -struct rk3288_cru { +struct rockchip_cru { struct rk3288_pll { u32 con0; u32 con1; @@ -58,7 +58,7 @@ struct rk3288_cru { u32 cru_sdio1_con[2]; u32 cru_emmc_con[2]; }; -check_member(rk3288_cru, cru_emmc_con[1], 0x021c); +check_member(rockchip_cru, cru_emmc_con[1], 0x021c); /* CRU_CLKSEL11_CON */ enum { diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h index 15eeb9c4407..789ca6aa28f 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h @@ -10,7 +10,7 @@ /* Private data for the clock driver - used by rockchip_get_cru() */ struct rk3399_clk_priv { - struct rk3399_cru *cru; + struct rockchip_cru *cru; }; struct rk3399_pmuclk_priv { @@ -33,7 +33,7 @@ struct rk3399_pmucru { }; check_member(rk3399_pmucru, pmucru_gatedis_con[1], 0x134); -struct rk3399_cru { +struct rockchip_cru { u32 apll_l_con[6]; u32 reserved[2]; u32 apll_b_con[6]; @@ -65,8 +65,7 @@ struct rk3399_cru { u32 sdio0_con[2]; u32 sdio1_con[2]; }; -check_member(rk3399_cru, sdio1_con[1], 0x594); -#define MHz 1000000 +check_member(rockchip_cru, sdio1_con[1], 0x594); #define KHz 1000 #define OSC_HZ (24*MHz) #define LPLL_HZ (600*MHz) @@ -107,9 +106,9 @@ enum apll_b_frequencies { APLL_B_600_MHZ, }; -void rk3399_configure_cpu_l(struct rk3399_cru *cru, +void rk3399_configure_cpu_l(struct rockchip_cru *cru, enum apll_l_frequencies apll_l_freq); -void rk3399_configure_cpu_b(struct rk3399_cru *cru, +void rk3399_configure_cpu_b(struct rockchip_cru *cru, enum apll_b_frequencies apll_b_freq); #endif /* __ASM_ARCH_CRU_RK3399_H_ */ |