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Diffstat (limited to 'arch/arm/dts/k3-am69-r5-aquila-dev.dts')
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1 files changed, 179 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-am69-r5-aquila-dev.dts b/arch/arm/dts/k3-am69-r5-aquila-dev.dts
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index 0000000000..f6423cad17
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+++ b/arch/arm/dts/k3-am69-r5-aquila-dev.dts
@@ -0,0 +1,179 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2024 Toradex - https://www.toradex.com/
+ */
+
+/dts-v1/;
+
+#include "k3-am69-aquila-dev.dts"
+#include "k3-am69-aquila-lpddr4-4266.dtsi"
+#include "k3-j784s4-ddr.dtsi"
+#include "k3-am69-aquila-dev-u-boot.dtsi"
+
+/ {
+ chosen {
+ firmware-loader = &fs_loader0;
+ stdout-path = &main_uart8;
+ tick-timer = &timer1;
+ };
+
+ aliases {
+ remoteproc0 = &sysctrler;
+ remoteproc1 = &a72_0;
+ };
+
+ fs_loader0: fs_loader@0 {
+ compatible = "u-boot,fs-loader";
+ bootph-all;
+ };
+
+ a72_0: a72@0 {
+ compatible = "ti,am654-rproc";
+ reg = <0x0 0x00a90000 0x0 0x10>;
+ power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
+ <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
+ resets = <&k3_reset 202 0>;
+ clocks = <&k3_clks 61 0>;
+ assigned-clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
+ assigned-clock-parents = <&k3_clks 61 2>;
+ assigned-clock-rates = <200000000>, <2000000000>;
+ ti,sci = <&sms>;
+ ti,sci-proc-id = <32>;
+ ti,sci-host-id = <10>;
+ bootph-pre-ram;
+ };
+
+ clk_200mhz: dummy_clock_200mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ bootph-pre-ram;
+ };
+};
+
+&cbass_mcu_wakeup {
+ sa3_secproxy: secproxy@44880000 {
+ bootph-pre-ram;
+ compatible = "ti,am654-secure-proxy";
+ reg = <0x0 0x44880000 0x0 0x20000>,
+ <0x0 0x44860000 0x0 0x20000>,
+ <0x0 0x43600000 0x0 0x10000>;
+ reg-names = "rt", "scfg", "target_data";
+ #mbox-cells = <1>;
+ };
+
+ mcu_secproxy: secproxy@2a380000 {
+ compatible = "ti,am654-secure-proxy";
+ reg = <0x0 0x2a380000 0x0 0x80000>,
+ <0x0 0x2a400000 0x0 0x80000>,
+ <0x0 0x2a480000 0x0 0x80000>;
+ reg-names = "rt", "scfg", "target_data";
+ #mbox-cells = <1>;
+ bootph-pre-ram;
+ };
+
+ sysctrler: sysctrler {
+ compatible = "ti,am654-system-controller";
+ mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>, <&sa3_secproxy 5>;
+ mbox-names = "tx", "rx", "boot_notify";
+ bootph-pre-ram;
+ };
+
+ dm_tifs: dm-tifs {
+ compatible = "ti,j721e-dm-sci";
+ ti,host-id = <3>;
+ ti,secure-host;
+ mbox-names = "rx", "tx";
+ mboxes= <&mcu_secproxy 21>,
+ <&mcu_secproxy 23>;
+ bootph-pre-ram;
+ };
+
+ wkup_vtm0: vtm@42040000 {
+ compatible = "ti,j721s2-avs";
+ reg = <0x0 0x42040000 0x0 0x350>,
+ <0x0 0x42050000 0x0 0x350>,
+ <0x0 0x43000300 0x0 0x10>;
+ power-domains = <&k3_pds 243 TI_SCI_PD_SHARED>;
+ #thermal-sensor-cells = <1>;
+ };
+};
+
+&sms {
+ mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
+ mbox-names = "tx", "rx", "notify";
+ ti,host-id = <4>;
+ ti,secure-host;
+};
+
+&wkup_uart0 {
+ status = "okay";
+};
+
+&main_sdhci0 {
+ /delete-property/ power-domains;
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ clock-names = "clk_xin";
+ clocks = <&clk_200mhz>;
+};
+
+&main_sdhci1 {
+ /delete-property/ power-domains;
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ clock-names = "clk_xin";
+ clocks = <&clk_200mhz>;
+};
+
+&mcu_ringacc {
+ ti,sci = <&dm_tifs>;
+};
+
+&mcu_udmap {
+ ti,sci = <&dm_tifs>;
+};
+
+&wkup_i2c0 {
+ bootph-pre-ram;
+
+ tps659413: tps659413@48 {
+ compatible = "ti,tps659413";
+ reg = <0x48>;
+ bootph-pre-ram;
+
+ regulators: regulators {
+ bootph-pre-ram;
+ buck12_reg: buck12 {
+ /*VDD_DDR_1V1*/
+ regulator-name = "buck12";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ regulator-boot-on;
+ bootph-pre-ram;
+ };
+ };
+
+ esm: esm {
+ compatible = "ti,tps659413-esm";
+ bootph-pre-ram;
+ };
+ };
+
+ tps62873: tps62873@40 {
+ compatible = "ti,tps6287x";
+ bootph-pre-ram;
+ reg = <0x40>;
+ regulator-name = "VDD_CPU_AVS";
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1330000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&wkup_vtm0 {
+ vdd-supply-2 = <&tps62873>;
+ bootph-pre-ram;
+};