diff options
Diffstat (limited to 'arch/arm/dts/k3-am62x-r5-sk-common.dtsi')
| -rw-r--r-- | arch/arm/dts/k3-am62x-r5-sk-common.dtsi | 72 |
1 files changed, 64 insertions, 8 deletions
diff --git a/arch/arm/dts/k3-am62x-r5-sk-common.dtsi b/arch/arm/dts/k3-am62x-r5-sk-common.dtsi index bd03777322..521b6b678c 100644 --- a/arch/arm/dts/k3-am62x-r5-sk-common.dtsi +++ b/arch/arm/dts/k3-am62x-r5-sk-common.dtsi @@ -17,13 +17,6 @@ tick-timer = &timer1; }; - memory@80000000 { - device_type = "memory"; - /* 2G RAM */ - reg = <0x00000000 0x80000000 0x00000000 0x80000000>; - bootph-pre-ram; - }; - reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -40,7 +33,8 @@ compatible = "ti,am654-rproc"; reg = <0x00 0x00a90000 0x00 0x10>; power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, - <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>; + <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>, + <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>; resets = <&k3_reset 135 0>; clocks = <&k3_clks 61 0>; assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; @@ -72,6 +66,68 @@ ti,secure-host; }; +&cbass_mcu { + mcu_esm: esm@4100000 { + compatible = "ti,j721e-esm"; + reg = <0x0 0x4100000 0x0 0x1000>; + ti,esm-pins = <0>, <1>, <2>, <85>; + bootph-pre-ram; + }; +}; + +&cbass_main { + sa3_secproxy: secproxy@44880000 { + bootph-pre-ram; + compatible = "ti,am654-secure-proxy"; + #mbox-cells = <1>; + reg-names = "rt", "scfg", "target_data"; + reg = <0x00 0x44880000 0x00 0x20000>, + <0x00 0x44860000 0x00 0x20000>, + <0x00 0x43600000 0x00 0x10000>; + }; + + sysctrler: sysctrler { + compatible = "ti,am654-system-controller"; + mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>; + mbox-names = "tx", "rx", "boot_notify"; + bootph-pre-ram; + }; + + main_esm: esm@420000 { + compatible = "ti,j721e-esm"; + reg = <0x0 0x420000 0x0 0x1000>; + ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>; + bootph-pre-ram; + }; +}; + +&mcu_pmx0 { + bootph-pre-ram; + wkup_uart0_pins_default: wkup-uart0-pins-default { + pinctrl-single,pins = < + AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */ + AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */ + AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */ + AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */ + >; + bootph-pre-ram; + }; +}; + +&main_pmx0 { + bootph-pre-ram; + + main_uart1_pins_default: main-uart1-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */ + AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */ + AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */ + AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */ + >; + bootph-pre-ram; + }; +}; + &ospi0 { reg = <0x00 0x0fc40000 0x00 0x100>, <0x00 0x60000000 0x00 0x08000000>; |