diff options
Diffstat (limited to 'arch/arm/dts/imx8mm-phg-u-boot.dtsi')
| -rw-r--r-- | arch/arm/dts/imx8mm-phg-u-boot.dtsi | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/arch/arm/dts/imx8mm-phg-u-boot.dtsi b/arch/arm/dts/imx8mm-phg-u-boot.dtsi index 3bf45ef4a6..3ced97cfaa 100644 --- a/arch/arm/dts/imx8mm-phg-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-phg-u-boot.dtsi @@ -9,7 +9,7 @@ wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; - u-boot,dm-spl; + bootph-pre-ram; }; firmware { @@ -21,7 +21,7 @@ }; &aips4 { - u-boot,dm-spl; + bootph-pre-ram; }; ®_usdhc2_vmmc { @@ -29,67 +29,67 @@ }; &pinctrl_reg_usdhc2_vmmc { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2_gpio { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio1 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio2 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio3 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio4 { - u-boot,dm-spl; + bootph-pre-ram; }; &gpio5 { - u-boot,dm-spl; + bootph-pre-ram; }; &uart2 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbmisc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbphynop1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usbotg1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc1 { - u-boot,dm-spl; + bootph-pre-ram; }; &usdhc2 { - u-boot,dm-spl; + bootph-pre-ram; sd-uhs-sdr104; sd-uhs-ddr50; assigned-clocks = <&clk IMX8MM_CLK_USDHC2>; @@ -98,7 +98,7 @@ }; &usdhc3 { - u-boot,dm-spl; + bootph-pre-ram; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; /* @@ -113,25 +113,25 @@ }; &i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@25} { - u-boot,dm-spl; + bootph-pre-ram; }; &{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_i2c1 { - u-boot,dm-spl; + bootph-pre-ram; }; &pinctrl_pmic { - u-boot,dm-spl; + bootph-pre-ram; }; &wdog1 { - u-boot,dm-spl; + bootph-pre-ram; }; |