diff options
Diffstat (limited to 'arch/arm/dts/imx6q.dtsi')
| -rw-r--r-- | arch/arm/dts/imx6q.dtsi | 40 |
1 files changed, 23 insertions, 17 deletions
diff --git a/arch/arm/dts/imx6q.dtsi b/arch/arm/dts/imx6q.dtsi index c37484dce35..3b77eae40e3 100644 --- a/arch/arm/dts/imx6q.dtsi +++ b/arch/arm/dts/imx6q.dtsi @@ -9,7 +9,6 @@ / { aliases { ipu1 = &ipu2; - video1 = &ipu2; spi4 = &ecspi5; }; @@ -50,6 +49,8 @@ arm-supply = <®_arm>; pu-supply = <®_pu>; soc-supply = <®_soc>; + nvmem-cells = <&cpu_speed_grade>; + nvmem-cell-names = "speed_grade"; }; cpu1: cpu@1 { @@ -74,6 +75,7 @@ 396000 1175000 >; clock-latency = <61036>; /* two CLK32 periods */ + #cooling-cells = <2>; clocks = <&clks IMX6QDL_CLK_ARM>, <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, <&clks IMX6QDL_CLK_STEP>, @@ -108,6 +110,7 @@ 396000 1175000 >; clock-latency = <61036>; /* two CLK32 periods */ + #cooling-cells = <2>; clocks = <&clks IMX6QDL_CLK_ARM>, <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, <&clks IMX6QDL_CLK_STEP>, @@ -142,6 +145,7 @@ 396000 1175000 >; clock-latency = <61036>; /* two CLK32 periods */ + #cooling-cells = <2>; clocks = <&clks IMX6QDL_CLK_ARM>, <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, <&clks IMX6QDL_CLK_STEP>, @@ -155,14 +159,14 @@ }; }; - soc { + soc: soc { ocram: sram@900000 { compatible = "mmio-sram"; reg = <0x00900000 0x40000>; clocks = <&clks IMX6QDL_CLK_OCRAM>; }; - bus@2000000 { /* AIPS1 */ + aips1: bus@2000000 { /* AIPS1 */ spba-bus@2000000 { ecspi5: spi@2018000 { #address-cells = <1>; @@ -173,15 +177,11 @@ clocks = <&clks IMX6Q_CLK_ECSPI5>, <&clks IMX6Q_CLK_ECSPI5>; clock-names = "ipg", "per"; - dmas = <&sdma 11 8 1>, <&sdma 12 8 2>; + dmas = <&sdma 11 7 1>, <&sdma 12 7 2>; dma-names = "rx", "tx"; status = "disabled"; }; }; - - iomuxc: iomuxc@20e0000 { - compatible = "fsl,imx6q-iomuxc"; - }; }; sata: sata@2200000 { @@ -406,23 +406,29 @@ &hdmi { compatible = "fsl,imx6q-hdmi"; - port@2 { - reg = <2>; + ports { + port@2 { + reg = <2>; - hdmi_mux_2: endpoint { - remote-endpoint = <&ipu2_di0_hdmi>; + hdmi_mux_2: endpoint { + remote-endpoint = <&ipu2_di0_hdmi>; + }; }; - }; - port@3 { - reg = <3>; + port@3 { + reg = <3>; - hdmi_mux_3: endpoint { - remote-endpoint = <&ipu2_di1_hdmi>; + hdmi_mux_3: endpoint { + remote-endpoint = <&ipu2_di1_hdmi>; + }; }; }; }; +&iomuxc { + compatible = "fsl,imx6q-iomuxc"; +}; + &ipu1_csi1 { ipu1_csi1_from_mipi_vc1: endpoint { remote-endpoint = <&mipi_vc1_to_ipu1_csi1>; |