diff options
Diffstat (limited to 'arch/arm/dts/imx6q-bx50v3.dts')
| -rw-r--r-- | arch/arm/dts/imx6q-bx50v3.dts | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts new file mode 100644 index 0000000000..deaec63509 --- /dev/null +++ b/arch/arm/dts/imx6q-bx50v3.dts @@ -0,0 +1,89 @@ +/* SPDX-License-Identifier: GPL-2.0+ OR X11 */ +/* + * Copyright 2015 Timesys Corporation. + * Copyright 2018 General Electric Company + * Based on imx6q-ba16.dtsi and imx6q-bx50v3.dtsi from kernel 4.20.5. + */ + +/dts-v1/; + +#include "imx6q.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "General Electric Bx50v3"; + compatible = "ge,imx6q-bx50v3", "advantech,imx6q-ba16", "fsl,imx6q"; +}; + +&iomuxc { + pinctrl-names = "default"; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 + /* SPI1 CS */ + MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + >; + }; + + pinctrl_usdhc3_reset: usdhc3grp-reset { + fsl,pins = < + MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9 + >; + }; +}; + +&usdhc1 { + status = "disabled"; +}; + +&usdhc2 { + status = "disabled"; +}; + +/* eMMC */ +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>; + bus-width = <8>; + non-removable; + keep-power-in-suspend; + status = "okay"; +}; + +&usdhc4 { + status = "disabled"; +}; + +/* SPI NOR */ +&ecspi1 { + cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + status = "okay"; + + flash: n25q032@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; |