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Diffstat (limited to 'arch/arm/dts/fsl-ls1046a.dtsi')
-rw-r--r--arch/arm/dts/fsl-ls1046a.dtsi12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index 3f11d6cd18..155455d591 100644
--- a/arch/arm/dts/fsl-ls1046a.dtsi
+++ b/arch/arm/dts/fsl-ls1046a.dtsi
@@ -241,7 +241,7 @@
dr_mode = "host";
};
- pcie@3400000 {
+ pcie1: pcie@3400000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03400000 0x0 0x80000 /* dbi registers */
0x00 0x03480000 0x0 0x40000 /* lut registers */
@@ -257,7 +257,7 @@
0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
- pcie_ep@3400000 {
+ pcie_ep1: pcie_ep@3400000 {
compatible = "fsl,ls-pcie-ep";
reg = <0x00 0x03400000 0x0 0x80000
0x00 0x034c0000 0x0 0x40000
@@ -268,7 +268,7 @@
big-endian;
};
- pcie@3500000 {
+ pcie2: pcie@3500000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03500000 0x0 0x80000 /* dbi registers */
0x00 0x03580000 0x0 0x40000 /* lut registers */
@@ -285,7 +285,7 @@
0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
- pcie_ep@3500000 {
+ pcie_ep2: pcie_ep@3500000 {
compatible = "fsl,ls-pcie-ep";
reg = <0x00 0x03500000 0x0 0x80000
0x00 0x035c0000 0x0 0x40000
@@ -296,7 +296,7 @@
big-endian;
};
- pcie@3600000 {
+ pcie3: pcie@3600000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03600000 0x0 0x80000 /* dbi registers */
0x00 0x03680000 0x0 0x40000 /* lut registers */
@@ -312,7 +312,7 @@
0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
- pcie_ep@3600000 {
+ pcie_ep3: pcie_ep@3600000 {
compatible = "fsl,ls-pcie-ep";
reg = <0x00 0x03600000 0x0 0x80000
0x00 0x036c0000 0x0 0x40000