diff options
Diffstat (limited to 'arch/arm/cpu/armv8/start.S')
| -rw-r--r-- | arch/arm/cpu/armv8/start.S | 38 |
1 files changed, 6 insertions, 32 deletions
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index bcc2603098..4f95289b5e 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -64,10 +64,12 @@ reset: msr cpacr_el1, x0 /* Enable FP/SIMD */ 0: - /* Cache/BPB/TLB Invalidate */ - bl __asm_flush_dcache_all /* dCache clean&invalidate */ - bl __asm_invalidate_icache_all /* iCache invalidate */ - bl __asm_invalidate_tlb_all /* invalidate TLBs */ + /* + * Cache/BPB/TLB Invalidate + * i-cache is invalidated before enabled in icache_enable() + * tlb is invalidated before mmu is enabled in dcache_enable() + * d-cache is invalidated before enabled in dcache_enable() + */ /* Processor specific initialization */ bl lowlevel_init @@ -122,34 +124,6 @@ ENDPROC(lowlevel_init) /*-----------------------------------------------------------------------*/ ENTRY(c_runtime_cpu_setup) - /* If I-cache is enabled invalidate it */ -#ifndef CONFIG_SYS_ICACHE_OFF - ic iallu /* I+BTB cache invalidate */ - isb sy -#endif - -#ifndef CONFIG_SYS_DCACHE_OFF - /* - * Setup MAIR and TCR. - */ - ldr x0, =MEMORY_ATTRIBUTES - ldr x1, =TCR_FLAGS - - switch_el x2, 3f, 2f, 1f -3: orr x1, x1, TCR_EL3_IPS_BITS - msr mair_el3, x0 - msr tcr_el3, x1 - b 0f -2: orr x1, x1, TCR_EL2_IPS_BITS - msr mair_el2, x0 - msr tcr_el2, x1 - b 0f -1: orr x1, x1, TCR_EL1_IPS_BITS - msr mair_el1, x0 - msr tcr_el1, x1 -0: -#endif - /* Relocate vBAR */ adr x0, vectors switch_el x1, 3f, 2f, 1f |