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-rw-r--r--arch/arm/cpu/arm926ejs/armada100/cpu.c16
-rw-r--r--arch/arm/cpu/arm926ejs/mx25/generic.c2
-rw-r--r--arch/arm/cpu/arm926ejs/orion5x/Makefile2
-rw-r--r--arch/arm/cpu/arm926ejs/orion5x/cpu.c2
-rw-r--r--arch/arm/cpu/arm926ejs/orion5x/dram.c4
-rw-r--r--arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S2
-rw-r--r--arch/arm/cpu/arm926ejs/orion5x/timer.c2
-rw-r--r--arch/arm/cpu/arm926ejs/pantheon/cpu.c12
-rw-r--r--arch/arm/cpu/arm926ejs/start.S2
9 files changed, 36 insertions, 8 deletions
diff --git a/arch/arm/cpu/arm926ejs/armada100/cpu.c b/arch/arm/cpu/arm926ejs/armada100/cpu.c
index 62aa1753ce..c21938e31f 100644
--- a/arch/arm/cpu/arm926ejs/armada100/cpu.c
+++ b/arch/arm/cpu/arm926ejs/armada100/cpu.c
@@ -62,6 +62,16 @@ int arch_cpu_init(void)
/* Enable GPIO clock */
writel(APBC_APBCLK, &apb1clkres->gpio);
+#ifdef CONFIG_I2C_MV
+ /* Enable general I2C clock */
+ writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0);
+ writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0);
+
+ /* Enable power I2C clock */
+ writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1);
+ writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1);
+#endif
+
/*
* Enable Functional and APB clock at 14.7456MHz
* for configured UART console
@@ -90,3 +100,9 @@ int print_cpuinfo(void)
return 0;
}
#endif
+
+#ifdef CONFIG_I2C_MV
+void i2c_clk_enable(void)
+{
+}
+#endif
diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index c6e114634a..76e4b5c397 100644
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -145,7 +145,7 @@ int cpu_mmc_init (bd_t * bis)
}
#ifdef CONFIG_MXC_UART
-void mx25_uart_init_pins (void)
+void mx25_uart1_init_pins(void)
{
struct iomuxc_mux_ctl *muxctl;
struct iomuxc_pad_ctl *padctl;
diff --git a/arch/arm/cpu/arm926ejs/orion5x/Makefile b/arch/arm/cpu/arm926ejs/orion5x/Makefile
index e5a9994e6b..a4298b4b9c 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/Makefile
+++ b/arch/arm/cpu/arm926ejs/orion5x/Makefile
@@ -1,5 +1,5 @@
#
-# Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+# Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
#
# Based on original Kirkwood support which is
# (C) Copyright 2009
diff --git a/arch/arm/cpu/arm926ejs/orion5x/cpu.c b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
index 1894b52fbf..05bd45c3f6 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/cpu.c
+++ b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
*
* Based on original Kirkwood support which is
* (C) Copyright 2009
diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c b/arch/arm/cpu/arm926ejs/orion5x/dram.c
index b749282099..3e1ff7d8ea 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/dram.c
+++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
*
* Based on original Kirkwood support which is
* (C) Copyright 2009
@@ -38,7 +38,7 @@ u32 orion5x_sdram_bar(enum memory_bank bank)
{
struct orion5x_ddr_addr_decode_registers *winregs =
(struct orion5x_ddr_addr_decode_registers *)
- ORION5X_CPU_WIN_BASE;
+ ORION5X_DRAM_BASE;
u32 result = 0;
u32 enable = 0x01 & winregs[bank].size;
diff --git a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S
index 0523bd468a..a2de3cf710 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S
+++ b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
diff --git a/arch/arm/cpu/arm926ejs/orion5x/timer.c b/arch/arm/cpu/arm926ejs/orion5x/timer.c
index bbab2269dd..9d45260612 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/timer.c
+++ b/arch/arm/cpu/arm926ejs/orion5x/timer.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
*
* Based on original Kirkwood support which is
* Copyright (C) Marvell International Ltd. and its affiliates
diff --git a/arch/arm/cpu/arm926ejs/pantheon/cpu.c b/arch/arm/cpu/arm926ejs/pantheon/cpu.c
index 9ddc77c071..8b2eafa40b 100644
--- a/arch/arm/cpu/arm926ejs/pantheon/cpu.c
+++ b/arch/arm/cpu/arm926ejs/pantheon/cpu.c
@@ -59,6 +59,12 @@ int arch_cpu_init(void)
/* Enable GPIO clock */
writel(APBC_APBCLK, &apbclkres->gpio);
+#ifdef CONFIG_I2C_MV
+ /* Enable I2C clock */
+ writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apbclkres->twsi);
+ writel(APBC_FNCLK | APBC_APBCLK, &apbclkres->twsi);
+#endif
+
icache_enable();
return 0;
@@ -76,3 +82,9 @@ int print_cpuinfo(void)
return 0;
}
#endif
+
+#ifdef CONFIG_I2C_MV
+void i2c_clk_enable(void)
+{
+}
+#endif
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index fefcfa2f88..09409370c9 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -10,7 +10,7 @@
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
- * Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr>
+ * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
*
* See file CREDITS for list of people who contributed to this
* project.