diff options
Diffstat (limited to 'arch/arm/cpu/arm920t/s3c24x0/speed.c')
| -rw-r--r-- | arch/arm/cpu/arm920t/s3c24x0/speed.c | 30 |
1 files changed, 25 insertions, 5 deletions
diff --git a/arch/arm/cpu/arm920t/s3c24x0/speed.c b/arch/arm/cpu/arm920t/s3c24x0/speed.c index b13283a798..3ae558dd62 100644 --- a/arch/arm/cpu/arm920t/s3c24x0/speed.c +++ b/arch/arm/cpu/arm920t/s3c24x0/speed.c @@ -54,9 +54,9 @@ static ulong get_PLLCLK(int pllreg) ulong r, m, p, s; if (pllreg == MPLL) - r = readl(&clk_power->MPLLCON); + r = readl(&clk_power->mpllcon); else if (pllreg == UPLL) - r = readl(&clk_power->UPLLCON); + r = readl(&clk_power->upllcon); else hang(); @@ -64,7 +64,12 @@ static ulong get_PLLCLK(int pllreg) p = ((r & 0x003F0) >> 4) + 2; s = r & 0x3; +#if defined(CONFIG_S3C2440) + if (pllreg == MPLL) + return 2 * m * (CONFIG_SYS_CLK_FREQ / (p << s)); +#endif return (CONFIG_SYS_CLK_FREQ * m) / (p << s); + } /* return FCLK frequency */ @@ -77,8 +82,23 @@ ulong get_FCLK(void) ulong get_HCLK(void) { struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power(); - - return (readl(&clk_power->CLKDIVN) & 2) ? get_FCLK() / 2 : get_FCLK(); +#ifdef CONFIG_S3C2440 + switch (readl(&clk_power->clkdivn) & 0x6) { + default: + case 0: + return get_FCLK(); + case 2: + return get_FCLK() / 2; + case 4: + return (readl(&clk_power->camdivn) & (1 << 9)) ? + get_FCLK() / 8 : get_FCLK() / 4; + case 6: + return (readl(&clk_power->camdivn) & (1 << 8)) ? + get_FCLK() / 6 : get_FCLK() / 3; + } +#else + return (readl(&clk_power->clkdivn) & 2) ? get_FCLK() / 2 : get_FCLK(); +#endif } /* return PCLK frequency */ @@ -86,7 +106,7 @@ ulong get_PCLK(void) { struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power(); - return (readl(&clk_power->CLKDIVN) & 1) ? get_HCLK() / 2 : get_HCLK(); + return (readl(&clk_power->clkdivn) & 1) ? get_HCLK() / 2 : get_HCLK(); } /* return UCLK frequency */ |