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Diffstat (limited to 'README')
| -rw-r--r-- | README | 7 |
1 files changed, 0 insertions, 7 deletions
@@ -1075,13 +1075,6 @@ The following options need to be configured: The clock frequency of the MII bus - CONFIG_PHY_RESET_DELAY - - Some PHY like Intel LXT971A need extra delay after - reset before any MII register access is possible. - For such PHY, set this option to the usec delay - required. (minimum 300usec for LXT971A) - CONFIG_PHY_CMD_DELAY (ppc4xx) Some PHY like Intel LXT971A need extra delay after |