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-rw-r--r--README1
-rw-r--r--cpu/arm920t/s3c24x0/usb.c2
-rw-r--r--doc/README.nand-boot-ppc4402
3 files changed, 2 insertions, 3 deletions
diff --git a/README b/README
index 5e2bca41c1a..f14fb7bad2a 100644
--- a/README
+++ b/README
@@ -623,7 +623,6 @@ The following options need to be configured:
CONFIG_CMD_SPI * SPI serial bus support
CONFIG_CMD_USB * USB support
CONFIG_CMD_VFD * VFD support (TRAB)
- CONFIG_CMD_BSP * Board SPecific functions
CONFIG_CMD_CDP * Cisco Discover Protocol support
CONFIG_CMD_FSL * Microblaze FSL support
diff --git a/cpu/arm920t/s3c24x0/usb.c b/cpu/arm920t/s3c24x0/usb.c
index ef5d5bf71b1..421ebb4373f 100644
--- a/cpu/arm920t/s3c24x0/usb.c
+++ b/cpu/arm920t/s3c24x0/usb.c
@@ -69,4 +69,4 @@ int usb_cpu_init_fail (void)
}
# endif /* defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) */
-#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */
+#endif /* defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT) */
diff --git a/doc/README.nand-boot-ppc440 b/doc/README.nand-boot-ppc440
index a1c1d8c4447..1e9c102644b 100644
--- a/doc/README.nand-boot-ppc440
+++ b/doc/README.nand-boot-ppc440
@@ -9,7 +9,7 @@ The PPC440EP(x)/GR(x) cpu's can boot directly from NAND FLASH,
completely without NOR FLASH. This can be done by using the NAND
boot feature of the 440 NAND flash controller (NDFC).
-Here a short desciption of the different boot stages:
+Here a short description of the different boot stages:
a) IPL (Initial Program Loader, integrated inside CPU)
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