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-rw-r--r--MAINTAINERS1
-rwxr-xr-xMAKEALL1
-rw-r--r--board/amcc/sequoia/cmd_sequoia.c205
-rw-r--r--board/esd/common/auto_update.c4
-rw-r--r--board/netstal/common/hcu_flash.c (renamed from board/netstal/common/flash.c)0
-rw-r--r--board/netstal/hcu4/Makefile14
-rw-r--r--board/netstal/hcu4/hcu4.c20
-rw-r--r--board/netstal/hcu5/Makefile14
-rw-r--r--board/netstal/hcu5/hcu5.c69
-rw-r--r--board/netstal/hcu5/sdram.c15
-rw-r--r--include/configs/sequoia.h7
11 files changed, 255 insertions, 95 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index d5249e5155..efdfedb856 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -296,6 +296,7 @@ Stefan Roese <sr@denx.de>
ocotea PPC440GX
p3p440 PPC440GP
pcs440ep PPC440EP
+ rainier PPC440GRx
sequoia PPC440EPx
sycamore PPC405GPr
taishan PPC440GX
diff --git a/MAKEALL b/MAKEALL
index 9f47f5f858..a0b9f28d0d 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -204,6 +204,7 @@ LIST_4xx=" \
PLU405 \
PMC405 \
PPChameleonEVB \
+ rainier \
sbc405 \
sc3 \
sequoia \
diff --git a/board/amcc/sequoia/cmd_sequoia.c b/board/amcc/sequoia/cmd_sequoia.c
index 6fc60eaaa2..f3803c09f8 100644
--- a/board/amcc/sequoia/cmd_sequoia.c
+++ b/board/amcc/sequoia/cmd_sequoia.c
@@ -26,76 +26,185 @@
#include <command.h>
#include <i2c.h>
-static u8 boot_533_nor[] = {
- 0x87, 0x78, 0x82, 0x52, 0x09, 0x57, 0xa0, 0x30,
- 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
-};
+/*
+ * There are 2 versions of production Sequoia & Rainier platforms.
+ * The primary difference is the reference clock. Those with
+ * 33333333 reference clocks will also have 667MHz rated
+ * processors. Not enough differences to have unique clock
+ * settings.
+ *
+ * NOR and NAND boot options change bytes 6, 7, 8, 9, 11. The
+ * values are independent of the rest of the clock settings.
+ *
+ * All Sequoias & Rainiers select from two possible EEPROMs in Boot
+ * Config F. One for 33MHz PCI, one for 66MHz PCI. The following
+ * values are for the 33MHz PCI configuration. Byte 5 (0 base) is
+ * the only value affected for a 66MHz PCI and simply needs a +0x10.
+ */
+
+#define NAND_COMPATIBLE 0x01
+#define NOR_COMPATIBLE 0x02
+
+/* check with Stefan on CFG_I2C_EEPROM_ADDR */
+#define I2C_EEPROM_ADDR 0x52
-static u8 boot_533_nand[] = {
- 0x87, 0x78, 0x82, 0x52, 0x09, 0x57, 0xd0, 0x10,
- 0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
+static char *config_labels[] = {
+ "CPU: 333 PLB: 133 OPB: 66 EBC: 66",
+ "CPU: 333 PLB: 166 OPB: 83 EBC: 55",
+ "CPU: 400 PLB: 133 OPB: 66 EBC: 66",
+ "CPU: 400 PLB: 160 OPB: 80 EBC: 53",
+ "CPU: 416 PLB: 166 OPB: 83 EBC: 55",
+ "CPU: 500 PLB: 166 OPB: 83 EBC: 55",
+ "CPU: 533 PLB: 133 OPB: 66 EBC: 66",
+ "CPU: 667 PLB: 166 OPB: 83 EBC: 55",
+ NULL
};
-static u8 boot_667_nor[] = {
- 0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xa0, 0x30,
- 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+static u8 boot_configs[][17] = {
+ {
+ (NOR_COMPATIBLE),
+ 0x84, 0x70, 0xa2, 0xa6, 0x05, 0x57, 0xa0, 0x10, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NAND_COMPATIBLE | NOR_COMPATIBLE),
+ 0xc7, 0x78, 0xf3, 0x4e, 0x05, 0xd7, 0xa0, 0x30, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NOR_COMPATIBLE),
+ 0x86, 0x78, 0xc2, 0xc6, 0x05, 0x57, 0xa0, 0x30, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NOR_COMPATIBLE),
+ 0x86, 0x78, 0xc2, 0xa6, 0x05, 0xd7, 0xa0, 0x10, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NAND_COMPATIBLE | NOR_COMPATIBLE),
+ 0xc6, 0x78, 0x52, 0xa6, 0x05, 0xd7, 0xa0, 0x10, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NAND_COMPATIBLE | NOR_COMPATIBLE),
+ 0xc7, 0x78, 0x52, 0xc6, 0x05, 0xd7, 0xa0, 0x30, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NOR_COMPATIBLE),
+ 0x87, 0x78, 0x82, 0x52, 0x09, 0x57, 0xa0, 0x30, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NAND_COMPATIBLE | NOR_COMPATIBLE),
+ 0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xa0, 0x30, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+ }
};
-static u8 boot_667_nand[] = {
- 0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xd0, 0x10,
- 0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
+/*
+ * Bytes 6,8,9,11 change for NAND boot
+ */
+static u8 nand_boot[] = {
+ 0xd0, 0xa0, 0x68, 0x58
};
static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- u8 chip;
- u8 *buf;
- int cpu_freq;
+ u8 *buf, bNAND;
+ int x, y, nbytes, selcfg;
+ extern char console_buffer[];
- if (argc < 3) {
+ if (argc < 2) {
printf("Usage:\n%s\n", cmdtp->usage);
return 1;
}
- cpu_freq = simple_strtol(argv[1], NULL, 10);
- if (!((cpu_freq == 533) || (cpu_freq == 667))) {
- printf("Unsupported cpu-frequency - only 533 and 667 supported\n");
+ if ((strcmp(argv[1], "nor") != 0) &&
+ (strcmp(argv[1], "nand") != 0)) {
+ printf("Unsupported boot-device - only nor|nand support\n");
return 1;
}
- /* use 0x52 as I2C EEPROM address for now */
- chip = 0x52;
+ /* set the nand flag based on provided input */
+ if ((strcmp(argv[1], "nand") == 0))
+ bNAND = 1;
+ else
+ bNAND = 0;
- if ((strcmp(argv[2], "nor") != 0) &&
- (strcmp(argv[2], "nand") != 0)) {
- printf("Unsupported boot-device - only nor|nand support\n");
- return 1;
- }
+ printf("Available configurations: \n\n");
- if (strcmp(argv[2], "nand") == 0) {
- switch (cpu_freq) {
- default:
- case 533:
- buf = boot_533_nand;
- break;
- case 667:
- buf = boot_667_nand;
- break;
+ if (bNAND) {
+ for(x = 0, y = 0; boot_configs[x][0] != 0; x++) {
+ /* filter on nand compatible */
+ if (boot_configs[x][0] & NAND_COMPATIBLE) {
+ printf(" %d - %s\n", (y+1), config_labels[x]);
+ y++;
+ }
}
} else {
- switch (cpu_freq) {
- default:
- case 533:
- buf = boot_533_nor;
- break;
- case 667:
- buf = boot_667_nor;
- break;
+ for(x = 0, y = 0; boot_configs[x][0] != 0; x++) {
+ /* filter on nor compatible */
+ if (boot_configs[x][0] & NOR_COMPATIBLE) {
+ printf(" %d - %s\n", (y+1), config_labels[x]);
+ y++;
+ }
}
}
- if (i2c_write(chip, 0, 1, buf, 16) != 0)
- printf("Error writing to EEPROM at address 0x%x\n", chip);
+ do {
+ nbytes = readline(" Selection [1-x / quit]: ");
+
+ if (nbytes) {
+ if (strcmp(console_buffer, "quit") == 0)
+ return 0;
+ selcfg = simple_strtol(console_buffer, NULL, 10);
+ if ((selcfg < 1) || (selcfg > y))
+ nbytes = 0;
+ }
+ } while (nbytes == 0);
+
+
+ y = (selcfg - 1);
+
+ for (x = 0; boot_configs[x][0] != 0; x++) {
+ if (bNAND) {
+ if (boot_configs[x][0] & NAND_COMPATIBLE) {
+ if (y > 0)
+ y--;
+ else if (y < 1)
+ break;
+ }
+ } else {
+ if (boot_configs[x][0] & NOR_COMPATIBLE) {
+ if (y > 0)
+ y--;
+ else if (y < 1)
+ break;
+ }
+ }
+ }
+
+ buf = &boot_configs[x][1];
+
+ if (bNAND) {
+ buf[6] = nand_boot[0];
+ buf[8] = nand_boot[1];
+ buf[9] = nand_boot[2];
+ buf[11] = nand_boot[3];
+ }
+
+ /* check CPLD register +5 for PCI 66MHz flag */
+ if (in8(CFG_BCSR_BASE + 5) & 0x01)
+ buf[5] += 0x10;
+
+ if (i2c_write(I2C_EEPROM_ADDR, 0, 1, buf, 16) != 0)
+ printf("Error writing to EEPROM at address 0x%x\n", I2C_EEPROM_ADDR);
udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
printf("Done\n");
@@ -105,7 +214,7 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
}
U_BOOT_CMD(
- bootstrap, 3, 0, do_bootstrap,
+ bootstrap, 2, 0, do_bootstrap,
"bootstrap - program the I2C bootstrap EEPROM\n",
- "<cpu-freq> <nor|nand> - program the I2C bootstrap EEPROM\n"
+ "<nand|nor> - strap to boot from NAND or NOR flash\n"
);
diff --git a/board/esd/common/auto_update.c b/board/esd/common/auto_update.c
index da147ee550..a76b00fe49 100644
--- a/board/esd/common/auto_update.c
+++ b/board/esd/common/auto_update.c
@@ -24,10 +24,6 @@
#include <common.h>
-#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
-#warning CFG_NAND_LEGACY not defined in a file using the legacy NAND support!
-#endif
-
#include <command.h>
#include <image.h>
#include <asm/byteorder.h>
diff --git a/board/netstal/common/flash.c b/board/netstal/common/hcu_flash.c
index be2cb37734..be2cb37734 100644
--- a/board/netstal/common/flash.c
+++ b/board/netstal/common/hcu_flash.c
diff --git a/board/netstal/hcu4/Makefile b/board/netstal/hcu4/Makefile
index d9825a5f25..af90821faa 100644
--- a/board/netstal/hcu4/Makefile
+++ b/board/netstal/hcu4/Makefile
@@ -22,16 +22,20 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
-vpath flash.c ../common
-COBJS = $(BOARD).o flash.o
+vpath hcu_flash.c ../common
+
+# NOBJS : Netstal common objects
+NOBJS = hcu_flash.o
+COBJS = $(BOARD).o
SOBJS =
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) ../common/$(NOBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
+NOBJS := $(addprefix $(obj),$(NOBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+$(LIB): $(OBJS) $(SOBJS) $(NOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) $(NOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
diff --git a/board/netstal/hcu4/hcu4.c b/board/netstal/hcu4/hcu4.c
index 2b9560484d..48a3f13bad 100644
--- a/board/netstal/hcu4/hcu4.c
+++ b/board/netstal/hcu4/hcu4.c
@@ -43,7 +43,7 @@ enum {
HW_GENERATION_MCU25 = 0x09,
};
-void sysLedSet(u32 value);
+void hcu_led_set(u32 value);
long int spd_sdram(int(read_spd)(uint addr));
#ifdef CONFIG_SPD_EEPROM
@@ -121,22 +121,24 @@ int checkboard (void)
printf ("HCU3: index %d\n\n", index);
else if (generation == HW_GENERATION_HCU4)
printf ("HCU4: index %d\n\n", index);
- /* GPIO here noch nicht richtig initialisert !!! */
- sysLedSet(0);
+ hcu_led_set(0);
for (j = 0; j < 7; j++) {
- sysLedSet(1 << j);
+ hcu_led_set(1 << j);
udelay(50 * 1000);
}
return 0;
}
-u32 sysLedGet(void)
+u32 hcu_led_get(void)
{
return (~((*(u32 *)GPIO0_OR)) >> 23) & 0xff;
}
-void sysLedSet(u32 value /* value to place in LEDs */)
+/*---------------------------------------------------------------------------+
+ * hcu_led_set value to be placed into the LEDs (max 6 bit)
+ *---------------------------------------------------------------------------*/
+void hcu_led_set(u32 value)
{
u32 tmp = ~value;
u32 *ledReg;
@@ -243,9 +245,9 @@ long int fixed_hcu4_sdram (int board_type)
}
/*---------------------------------------------------------------------------+
- * getSerialNr
+ * hcu_serial_number
*---------------------------------------------------------------------------*/
-static u32 getSerialNr(void)
+static u32 hcu_serial_number(void)
{
u32 *serial = (u32 *)CFG_FLASH_BASE;
@@ -265,7 +267,7 @@ int misc_init_r(void)
char *s = getenv("ethaddr");
char *e;
int i;
- u32 serial = getSerialNr();
+ u32 serial = hcu_serial_number();
for (i = 0; i < 6; ++i) {
gd->bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
diff --git a/board/netstal/hcu5/Makefile b/board/netstal/hcu5/Makefile
index eee310b1a1..27398b905b 100644
--- a/board/netstal/hcu5/Makefile
+++ b/board/netstal/hcu5/Makefile
@@ -22,16 +22,20 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
-vpath flash.c ../common
-COBJS = $(BOARD).o sdram.o flash.o
+vpath hcu_flash.c ../common
+
+# NOBJS : Netstal common objects
+NOBJS = hcu_flash.o
+COBJS = $(BOARD).o sdram.o
SOBJS = init.o
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) ../common/$(NOBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
+NOBJS := $(addprefix $(obj),$(NOBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+$(LIB): $(OBJS) $(SOBJS) $(NOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) $(NOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
diff --git a/board/netstal/hcu5/hcu5.c b/board/netstal/hcu5/hcu5.c
index 23df0814ff..b9b10fdc29 100644
--- a/board/netstal/hcu5/hcu5.c
+++ b/board/netstal/hcu5/hcu5.c
@@ -22,10 +22,11 @@
#include <asm/processor.h>
#include <ppc440.h>
#include <asm/mmu.h>
+#include <net.h>
DECLARE_GLOBAL_DATA_PTR;
-void sysLedSet(u32 value);
+void hcu_led_set(u32 value);
extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
@@ -41,7 +42,8 @@ extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
#define SDR0_ECID2 0x0082
#define SDR0_ECID3 0x0083
-#define SYS_IO_ADDRESS 0xcce00000
+#define SYS_IO_ADDRESS (CFG_CS_2 + 0x00e00000)
+#define SYS_SLOT_ADDRESS (CFG_CPLD + 0x00400000)
#define DEFAULT_ETH_ADDR "ethaddr"
/* ethaddr for first or etha1ddr for second ethernet */
@@ -182,11 +184,14 @@ int board_early_init_f(void)
return 0;
}
+#ifdef CONFIG_BOARD_PRE_INIT
int board_pre_init(void)
{
return board_early_init_f();
}
+#endif
+
int checkboard(void)
{
unsigned int j;
@@ -211,38 +216,51 @@ int checkboard(void)
printf("Chip ID 0x%x 0x%x 0x%x 0x%x\n", ecid0, ecid1, ecid2, ecid3);
for (j = 0;j < 6; j++) {
- sysLedSet(1 << j);
+ hcu_led_set(1 << j);
udelay(200 * 1000);
}
return 0;
}
-u32 sysLedGet(void)
+u32 hcu_led_get(void)
{
return in16(SYS_IO_ADDRESS) & 0x3f;
}
-void sysLedSet(u32 value /* value to place in LEDs */)
+/*---------------------------------------------------------------------------+
+ * hcu_led_set value to be placed into the LEDs (max 6 bit)
+ *---------------------------------------------------------------------------*/
+void hcu_led_set(u32 value)
{
out16(SYS_IO_ADDRESS, value);
}
/*---------------------------------------------------------------------------+
- * getSerialNr
+ * get_serial_number
*---------------------------------------------------------------------------*/
-static u32 getSerialNr(void)
+static u32 get_serial_number(void)
{
u32 *serial = (u32 *)CFG_FLASH_BASE;
if (*serial == 0xffffffff)
- return get_ticks();
+ return 0;
return *serial;
}
/*---------------------------------------------------------------------------+
+ * hcu_get_slot
+ *---------------------------------------------------------------------------*/
+u32 hcu_get_slot(void)
+{
+ u16 *slot = (u16 *)SYS_SLOT_ADDRESS;
+ return (*slot) & 0x7f;
+}
+
+
+/*---------------------------------------------------------------------------+
* misc_init_r.
*---------------------------------------------------------------------------*/
int misc_init_r(void)
@@ -250,7 +268,7 @@ int misc_init_r(void)
char *s = getenv(DEFAULT_ETH_ADDR);
char *e;
int i;
- u32 serial = getSerialNr();
+ u32 serial = get_serial_number();
unsigned long usb2d0cr = 0;
unsigned long usb2phy0cr, usb2h0cr = 0;
unsigned long sdr0_pfc1;
@@ -272,8 +290,7 @@ int misc_init_r(void)
gd->bd->bi_enetaddr[2] = 0x13;
gd->bd->bi_enetaddr[3] = (serial >> 16) & 0xff;
gd->bd->bi_enetaddr[4] = (serial >> 8) & 0xff;
- /* byte[5].bit 0 must be zero */
- gd->bd->bi_enetaddr[5] = (serial >> 0) & 0xfe;
+ gd->bd->bi_enetaddr[5] = hcu_get_slot();
sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X\0",
gd->bd->bi_enetaddr[0], gd->bd->bi_enetaddr[1],
gd->bd->bi_enetaddr[2], gd->bd->bi_enetaddr[3],
@@ -283,6 +300,25 @@ int misc_init_r(void)
setenv(DEFAULT_ETH_ADDR, ethaddr);
}
+ /* IP-Adress update */
+ {
+ IPaddr_t ipaddr;
+ char *ipstring;
+
+ ipstring = getenv("ipaddr");
+ if (ipstring == 0)
+ ipaddr = string_to_ip("172.25.1.99");
+ else
+ ipaddr = string_to_ip(ipstring);
+ if ((ipaddr & 0xff) != (32 + hcu_get_slot())) {
+ char tmp[22];
+
+ ipaddr = (ipaddr & 0xffffff00) + 32 + hcu_get_slot();
+ ip_to_string (ipaddr, tmp);
+ printf("%s: enforce %s\n", __FUNCTION__, tmp);
+ setenv("ipaddr", tmp);
+ }
+ }
#ifdef CFG_ENV_IS_IN_FLASH
/* Monitor protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
@@ -346,6 +382,7 @@ int misc_init_r(void)
return 0;
}
+#if defined(CONFIG_PCI)
/*************************************************************************
* pci_pre_init
*
@@ -358,7 +395,6 @@ int misc_init_r(void)
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long addr;
@@ -411,7 +447,6 @@ int pci_pre_init(struct pci_controller *hose)
return 1;
}
-#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
@@ -421,7 +456,6 @@ int pci_pre_init(struct pci_controller *hose)
* may not be sufficient for a given board.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
/*-------------------------------------------------------------+
@@ -478,13 +512,11 @@ void pci_target_init(struct pci_controller *hose)
pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
/*************************************************************************
* pci_master_init
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
@@ -499,8 +531,6 @@ void pci_master_init(struct pci_controller *hose)
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
-#endif
-/* defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT) */
/*************************************************************************
* is_pci_host
@@ -517,9 +547,8 @@ void pci_master_init(struct pci_controller *hose)
*
*
************************************************************************/
-#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
return 1;
}
-#endif /* defined(CONFIG_PCI) */
+#endif /* defined(CONFIG_PCI) */
diff --git a/board/netstal/hcu5/sdram.c b/board/netstal/hcu5/sdram.c
index 40391958d2..5d457f7b21 100644
--- a/board/netstal/hcu5/sdram.c
+++ b/board/netstal/hcu5/sdram.c
@@ -36,7 +36,7 @@
#include <asm/mmu.h>
#include <ppc440.h>
-void sysLedSet(u32 value);
+void hcu_led_set(u32 value);
void dcbz_area(u32 start_address, u32 num_bytes);
void dflush(void);
@@ -138,7 +138,7 @@ static int wait_for_dlllock(void)
void sdram_panic(const char *reason)
{
printf("\n%s: reason %s", __FUNCTION__, reason);
- sysLedSet(0xff);
+ hcu_led_set(0xff);
while (1) {
}
/* Never return */
@@ -197,6 +197,13 @@ static void program_ecc(unsigned long start_address, unsigned long num_bytes,
mfsdram(DDR0_00, val);
mtsdram(DDR0_00, val | DDR0_00_INT_ACK_ALL);
+ /*
+ * Clear possible errors
+ * If not done, then we could get an interrupt later on when
+ * exceptions are enabled.
+ */
+ mtspr(mcsr, mfspr(mcsr));
+
/* Set 'int_mask' parameter to functionnal value */
mfsdram(DDR0_01, val);
mtsdram(DDR0_01, ((val &~ DDR0_01_INT_MASK_MASK) |
@@ -244,7 +251,6 @@ long int initdram (int board_type)
sdram_panic(INVALID_HW_CONFIG);
break;
}
- dram_size -= 16 * 1024 * 1024;
mtsdram(DDR0_07, 0x00090100);
/*
* TCPD=200 cycles of clock input is required to lock the DLL.
@@ -283,6 +289,7 @@ long int initdram (int board_type)
/*
* Program tlb entries for this size (dynamic)
*/
+ remove_tlb(CFG_SDRAM_BASE, 256 << 20);
program_tlb(0, 0, dram_size, MY_TLB_WORD2_I_ENABLE);
/*
@@ -291,6 +298,8 @@ long int initdram (int board_type)
*/
program_tlb(0, CFG_DDR_CACHED_ADDR, dram_size, 0);
+ /* Diminish RAM to initialize */
+ dram_size = dram_size - 32 ;
#ifdef CONFIG_DDR_ECC
/*
* If ECC is enabled, initialize the parity bits.
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 3f75a441a0..824a81240c 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -343,6 +343,11 @@
#define CONFIG_CMD_USB
#endif
+#ifndef CONFIG_RAINIER
+#define CFG_POST_FPU_ON CFG_POST_FPU
+#else
+#define CFG_POST_FPU_ON 0
+#endif
/* POST support */
#define CONFIG_POST (CFG_POST_MEMORY | \
@@ -350,7 +355,7 @@
CFG_POST_UART | \
CFG_POST_I2C | \
CFG_POST_CACHE | \
- CFG_POST_FPU | \
+ CFG_POST_FPU_ON | \
CFG_POST_ETHER | \
CFG_POST_SPR)
generated by cgit v1.2.3 (git 2.0.4) at 2024-07-02 01:13:26 +0000