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-rw-r--r--CHANGELOG18
-rw-r--r--common/miiphyutil.c17
-rw-r--r--include/configs/TQM5200.h2
-rw-r--r--include/configs/TQM834x.h2
-rw-r--r--include/configs/o2dnt.h25
-rw-r--r--include/miiphy.h2
-rw-r--r--net/eth.c9
7 files changed, 61 insertions, 14 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 2a41c2e7bb..3213a89255 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -11,8 +11,8 @@ Changes for U-Boot 1.1.4:
- CAS latency default values can be overwritten by setting "serial#"
to e.g. "ABC0001 casl=25" -> CAS latency 2.5 will be used.
If problems are detected with this non default CAS latency,
- the defualt values will be used instead.
- - FLASH size detection added.
+ the default values will be used instead.
+ - Flash size detection added.
- Moved FCC ethernet driver initialization behind TSEC driver init
-> TSEC is first device.
Patch by Stefan Roese, 30 Nov 2005
@@ -22,13 +22,25 @@ Changes for U-Boot 1.1.4:
* Changed PPC44x startup message (cpu info, speed...) to common style:
On PPC44x platforms, the startup message generated in "cpu.c" only
- comprised the ppc type and revision but not additional informations
+ comprised the ppc type and revision but not additional information
like speed etc. Those speed infos where printed in the board specific
code. This new implementation now prints all CPU infos in the common
cpu specific code. No board specific code is needed anymore and
therefore removed from all current 44x implementations.
Patch by Stefan Roese, 27 Nov 2005
+* Adjust TQM834x PHY addresses for latest hardware revision.
+
+* Increase malloc arena on TQM5200 board to 256 kB.
+ With 64 kb uniform flash sector size the old value of 128 kB was
+ too small.
+
+* Fix miiphy global data initialization (problem on 4xx boards when
+ no ethaddr is assigned). Initialization moved from
+ miiphy_register() to eth_initialize().
+
+ Based on initial patch for 4xx platform by Matthias Fuchs.
+
* Remove unnnecessary #include <linux/types.h> from include/asm-*/u-boot.h
* Allow use of include/image.h and include/asm-*/u-boot.h in proprietary code.
diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index d67c8b5371..e411e573c7 100644
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -60,6 +60,16 @@ static struct mii_dev *current_mii;
/*****************************************************************************
*
+ * Initialize global data. Need to be called before any other miiphy routine.
+ */
+void miiphy_init()
+{
+ INIT_LIST_HEAD(&mii_devs);
+ current_mii = NULL;
+}
+
+/*****************************************************************************
+ *
* Register read and write MII access routines for the device <name>.
*/
void miiphy_register(char *name,
@@ -71,15 +81,8 @@ void miiphy_register(char *name,
struct list_head *entry;
struct mii_dev *new_dev;
struct mii_dev *miidev;
- static int head_initialized = 0;
unsigned int name_len;
- if (head_initialized == 0) {
- INIT_LIST_HEAD(&mii_devs);
- current_mii = NULL;
- head_initialized = 1;
- }
-
/* check if we have unique name */
list_for_each(entry, &mii_devs) {
miidev = list_entry(entry, struct mii_dev, link);
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index e23fd77861..5ad1939481 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -369,7 +369,7 @@
#endif
#define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
-#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index c25a7775b8..ba2f4ead2c 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -249,7 +249,7 @@ extern int tqm834x_num_flash_banks;
#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
#define CONFIG_MPC83XX_TSEC2 1
#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
-#define TSEC1_PHY_ADDR 0
+#define TSEC1_PHY_ADDR 2
#define TSEC2_PHY_ADDR 1
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
diff --git a/include/configs/o2dnt.h b/include/configs/o2dnt.h
index 325f654776..981651ab07 100644
--- a/include/configs/o2dnt.h
+++ b/include/configs/o2dnt.h
@@ -137,8 +137,20 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+
+#if defined(CFG_IPBSPEED_133)
+/*
+ * PCI Bus clocking configuration
+ *
+ * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
+ * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
+ * been tested with a IPB Bus Clock of 66 MHz.
+ */
+#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#endif
#endif
+
/*
* I2C configuration
*/
@@ -263,7 +275,16 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#define CFG_BOOTCS_CFG 0x00047801
+
+#ifdef CFG_PCISPEED_66
+/*
+ * For 66 MHz PCI clock additional Wait State is needed for CS0 (flash).
+ */
+#define CFG_BOOTCS_CFG 0x00057801 /* for pci_clk = 66 MHz */
+#else
+#define CFG_BOOTCS_CFG 0x00047801 /* for pci_clk = 33 MHz */
+#endif
+
#define CFG_CS0_START CFG_FLASH_BASE
#define CFG_CS0_SIZE CFG_FLASH_SIZE
diff --git a/include/miiphy.h b/include/miiphy.h
index 3c6ee77077..71716b04d4 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -53,6 +53,8 @@ int miiphy_duplex(char *devname, unsigned char addr);
int miiphy_link(char *devname, unsigned char addr);
#endif
+void miiphy_init(void);
+
void miiphy_register(char *devname,
int (* read)(char *devname, unsigned char addr,
unsigned char reg, unsigned short *value),
diff --git a/net/eth.c b/net/eth.c
index 66884eff02..9341e20e95 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -24,6 +24,7 @@
#include <common.h>
#include <command.h>
#include <net.h>
+#include <miiphy.h>
#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
@@ -136,6 +137,10 @@ int eth_initialize(bd_t *bis)
eth_devices = NULL;
eth_current = NULL;
+#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+ miiphy_init();
+#endif
+
#ifdef CONFIG_DB64360
mv6436x_eth_initialize(bis);
#endif
@@ -442,6 +447,10 @@ extern int ns7520_miiphy_initialize(bd_t *bis);
int eth_initialize(bd_t *bis)
{
+#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+ miiphy_init();
+#endif
+
#if defined(CONFIG_AT91RM9200)
at91rm9200_miiphy_initialize(bis);
#endif