diff options
| -rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/k3-am69-r5-sk.dts | 168 | ||||
| -rw-r--r-- | arch/arm/dts/k3-am69-sk-u-boot.dtsi | 152 |
3 files changed, 321 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index cea1e31d5af..1b9c5f04c35 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1271,6 +1271,7 @@ dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-base-board.dtb\ k3-j721s2-common-proc-board.dtb\ k3-j721s2-r5-common-proc-board.dtb dtb-$(CONFIG_SOC_K3_J784S4) += k3-am69-sk.dtb \ + k3-am69-r5-sk.dtb \ k3-j784s4-evm.dtb \ k3-j784s4-r5-evm.dtb dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \ diff --git a/arch/arm/dts/k3-am69-r5-sk.dts b/arch/arm/dts/k3-am69-r5-sk.dts new file mode 100644 index 00000000000..1ca45a06e82 --- /dev/null +++ b/arch/arm/dts/k3-am69-r5-sk.dts @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; + +#include "k3-am69-sk.dts" +#include <dt-bindings/gpio/gpio.h> +#include "k3-j784s4-ddr-evm-lp4-4266.dtsi" +#include "k3-j784s4-ddr.dtsi" + +/ { + chosen { + firmware-loader = &fs_loader0; + stdout-path = &main_uart8; + tick-timer = &timer1; + }; + + aliases { + remoteproc0 = &sysctrler; + remoteproc1 = &a72_0; + }; + + fs_loader0: fs_loader@0 { + compatible = "u-boot,fs-loader"; + bootph-all; + }; + + memory@80000000 { + device_type = "memory"; + /* 32G RAM */ + reg = <0x00 0x80000000 0x00 0x80000000>, + <0x08 0x80000000 0x07 0x80000000>; + }; + + a72_0: a72@0 { + compatible = "ti,am654-rproc"; + reg = <0x0 0x00a90000 0x0 0x10>; + power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, + <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>; + resets = <&k3_reset 202 0>; + clocks = <&k3_clks 61 0>; + assigned-clocks = <&k3_clks 61 0>, <&k3_clks 202 0>; + assigned-clock-parents = <&k3_clks 61 1>; + assigned-clock-rates = <200000000>, <2000000000>; + ti,sci = <&sms>; + ti,sci-proc-id = <32>; + ti,sci-host-id = <10>; + bootph-pre-ram; + }; + + clk_200mhz: dummy_clock_200mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + bootph-pre-ram; + }; + + clk_19_2mhz: dummy_clock_19_2mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <19200000>; + bootph-pre-ram; + }; +}; + +&cbass_mcu_wakeup { + sa3_secproxy: secproxy@44880000 { + bootph-pre-ram; + compatible = "ti,am654-secure-proxy"; + reg = <0x0 0x44880000 0x0 0x20000>, + <0x0 0x44860000 0x0 0x20000>, + <0x0 0x43600000 0x0 0x10000>; + reg-names = "rt", "scfg", "target_data"; + #mbox-cells = <1>; + }; + + mcu_secproxy: secproxy@2a380000 { + compatible = "ti,am654-secure-proxy"; + reg = <0x0 0x2a380000 0x0 0x80000>, + <0x0 0x2a400000 0x0 0x80000>, + <0x0 0x2a480000 0x0 0x80000>; + reg-names = "rt", "scfg", "target_data"; + #mbox-cells = <1>; + bootph-pre-ram; + }; + + sysctrler: sysctrler { + compatible = "ti,am654-system-controller"; + mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>, <&sa3_secproxy 5>; + mbox-names = "tx", "rx", "boot_notify"; + bootph-pre-ram; + }; + + dm_tifs: dm-tifs { + compatible = "ti,j721e-dm-sci"; + ti,host-id = <3>; + ti,secure-host; + mbox-names = "rx", "tx"; + mboxes= <&mcu_secproxy 21>, + <&mcu_secproxy 23>; + bootph-pre-ram; + }; +}; + +&sms { + mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>; + mbox-names = "tx", "rx", "notify"; + ti,host-id = <4>; + ti,secure-host; + bootph-pre-ram; +}; + +&wkup_uart0 { + bootph-pre-ram; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&wkup_uart0_pins_default>; +}; + +&mcu_uart0 { + bootph-pre-ram; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_uart0_pins_default>; +}; + +&main_uart8 { + bootph-pre-ram; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_uart8_pins_default>; +}; + +&main_sdhci0 { + status = "okay"; + /delete-property/ power-domains; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + clock-names = "clk_xin"; + clocks = <&clk_200mhz>; + ti,driver-strength-ohm = <50>; + non-removable; + bus-width = <8>; +}; + +&main_sdhci1 { + status = "okay"; + /delete-property/ power-domains; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + pinctrl-0 = <&main_mmc1_pins_default>; + pinctrl-names = "default"; + clock-names = "clk_xin"; + clocks = <&clk_200mhz>; + ti,driver-strength-ohm = <50>; +}; + +&mcu_ringacc { + ti,sci = <&dm_tifs>; +}; + +&mcu_udmap { + ti,sci = <&dm_tifs>; +}; + +#include "k3-am69-sk-u-boot.dtsi" diff --git a/arch/arm/dts/k3-am69-sk-u-boot.dtsi b/arch/arm/dts/k3-am69-sk-u-boot.dtsi new file mode 100644 index 00000000000..39bfd5a3712 --- /dev/null +++ b/arch/arm/dts/k3-am69-sk-u-boot.dtsi @@ -0,0 +1,152 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/ { + chosen { + stdout-path = "serial2:115200n8"; + tick-timer = &timer1; + }; + + aliases { + serial0 = &wkup_uart0; + serial1 = &mcu_uart0; + serial2 = &main_uart8; + mmc0 = &main_sdhci0; + mmc1 = &main_sdhci1; + i2c0 = &wkup_i2c0; + i2c1 = &mcu_i2c0; + i2c2 = &mcu_i2c1; + i2c3 = &main_i2c0; + ethernet0 = &mcu_cpsw_port1; + }; +}; + +&wkup_i2c0 { + bootph-pre-ram; + status = "okay"; +}; + +&cbass_main { + bootph-pre-ram; +}; + +&main_navss { + bootph-pre-ram; +}; + +&cbass_mcu_wakeup { + bootph-pre-ram; + + timer1: timer@40400000 { + compatible = "ti,omap5430-timer"; + reg = <0x0 0x40400000 0x0 0x80>; + ti,timer-alwon; + clock-frequency = <250000000>; + bootph-pre-ram; + }; + + chipid@43000014 { + bootph-pre-ram; + }; +}; + +&mcu_navss { + bootph-pre-ram; +}; + +&mcu_ringacc { + reg = <0x0 0x2b800000 0x0 0x400000>, + <0x0 0x2b000000 0x0 0x400000>, + <0x0 0x28590000 0x0 0x100>, + <0x0 0x2a500000 0x0 0x40000>, + <0x0 0x28440000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; + bootph-pre-ram; +}; + +&mcu_udmap { + reg = <0x0 0x285c0000 0x0 0x100>, + <0x0 0x284c0000 0x0 0x4000>, + <0x0 0x2a800000 0x0 0x40000>, + <0x0 0x284a0000 0x0 0x4000>, + <0x0 0x2aa00000 0x0 0x40000>, + <0x0 0x28400000 0x0 0x2000>; + reg-names = "gcfg", "rchan", "rchanrt", "tchan", + "tchanrt", "rflow"; + bootph-pre-ram; +}; + +&secure_proxy_main { + bootph-pre-ram; +}; + +&sms { + bootph-pre-ram; + k3_sysreset: sysreset-controller { + compatible = "ti,sci-sysreset"; + bootph-pre-ram; + }; +}; + +&main_pmx0 { + bootph-pre-ram; +}; + +&main_uart8_pins_default { + bootph-pre-ram; +}; + +&main_mmc1_pins_default { + bootph-pre-ram; +}; + +&wkup_pmx0 { + bootph-pre-ram; +}; + +&k3_pds { + bootph-pre-ram; +}; + +&k3_clks { + bootph-pre-ram; +}; + +&k3_reset { + bootph-pre-ram; +}; + +&main_uart8 { + bootph-pre-ram; +}; + +&mcu_uart0 { + bootph-pre-ram; +}; + +&wkup_uart0 { + bootph-pre-ram; +}; + +&mcu_cpsw { + reg = <0x0 0x46000000 0x0 0x200000>, + <0x0 0x40f00200 0x0 0x8>; + reg-names = "cpsw_nuss", "mac_efuse"; + /delete-property/ ranges; + + cpsw-phy-sel@40f04040 { + compatible = "ti,am654-cpsw-phy-sel"; + reg= <0x0 0x40f04040 0x0 0x4>; + reg-names = "gmii-sel"; + }; +}; + +&main_sdhci0 { + bootph-pre-ram; +}; + +&main_sdhci1 { + bootph-pre-ram; +}; |