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-rw-r--r--CHANGELOG5
-rw-r--r--cpu/ppc4xx/cpu_init.c14
2 files changed, 15 insertions, 4 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 166cfa3a4e..87a87461d9 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,11 @@
Changes since U-Boot 1.1.4:
======================================================================
+* PPC405EP: Add CFG_GPIO0_OR, CFG_GPIO0_ODR to setup GPIO completely.
+ - Add configuration of Open Drain GPIO Output selection
+ - Add configuration of initial value of GPIO output pins
+ Patch by Tolunay Orkun, 07 Apr 2006
+
* Fix spelling; minor code cleanup.
* Fix JFFS2 compilation problem
diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c
index b27567fa4d..def46f15ca 100644
--- a/cpu/ppc4xx/cpu_init.c
+++ b/cpu/ppc4xx/cpu_init.c
@@ -226,13 +226,19 @@ cpu_init_f (void)
/*
* GPIO0 setup (select GPIO or alternate function)
*/
- out32(GPIO0_OSRH, CFG_GPIO0_OSRH); /* output select */
+#if defined(CFG_GPIO0_OR)
+ out32(GPIO0_OR, CFG_GPIO0_OR); /* set initial state of output pins */
+#endif
+#if defined(CFG_GPIO0_ODR)
+ out32(GPIO0_ODR, CFG_GPIO0_ODR); /* open-drain select */
+#endif
+ out32(GPIO0_OSRH, CFG_GPIO0_OSRH); /* output select */
out32(GPIO0_OSRL, CFG_GPIO0_OSRL);
- out32(GPIO0_ISR1H, CFG_GPIO0_ISR1H); /* input select */
+ out32(GPIO0_ISR1H, CFG_GPIO0_ISR1H); /* input select */
out32(GPIO0_ISR1L, CFG_GPIO0_ISR1L);
- out32(GPIO0_TSRH, CFG_GPIO0_TSRH); /* three-state select */
+ out32(GPIO0_TSRH, CFG_GPIO0_TSRH); /* three-state select */
out32(GPIO0_TSRL, CFG_GPIO0_TSRL);
- out32(GPIO0_TCR, CFG_GPIO0_TCR); /* enable output driver for outputs */
+ out32(GPIO0_TCR, CFG_GPIO0_TCR); /* enable output driver for outputs */
/*
* Set EMAC noise filter bits