diff options
| -rw-r--r-- | arch/mips/include/asm/system.h | 13 | ||||
| -rw-r--r-- | arch/mips/lib/cache.c | 4 |
2 files changed, 17 insertions, 0 deletions
diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h index c9c5961462..eaf1b2290d 100644 --- a/arch/mips/include/asm/system.h +++ b/arch/mips/include/asm/system.h @@ -14,8 +14,10 @@ #ifndef _ASM_SYSTEM_H #define _ASM_SYSTEM_H +#include <asm/asm.h> #include <asm/sgidefs.h> #include <asm/ptrace.h> +#include <linux/stringify.h> #if 0 #include <linux/kernel.h> #endif @@ -270,4 +272,15 @@ static inline void execution_hazard_barrier(void) ".set reorder"); } +static inline void instruction_hazard_barrier(void) +{ + unsigned long tmp; + + asm volatile( + __stringify(PTR_LA) "\t%0, 1f\n" + " jr.hb %0\n" + "1: .insn" + : "=&r"(tmp)); +} + #endif /* _ASM_SYSTEM_H */ diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c index eba7fff316..8e5b028c66 100644 --- a/arch/mips/lib/cache.c +++ b/arch/mips/lib/cache.c @@ -12,6 +12,7 @@ #endif #include <asm/io.h> #include <asm/mipsregs.h> +#include <asm/system.h> DECLARE_GLOBAL_DATA_PTR; @@ -134,6 +135,9 @@ void flush_cache(ulong start_addr, ulong size) ops_done: /* ensure cache ops complete before any further memory accesses */ sync(); + + /* ensure the pipeline doesn't contain now-invalid instructions */ + instruction_hazard_barrier(); } void flush_dcache_range(ulong start_addr, ulong stop) |