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-rw-r--r--arch/arm/cpu/armv7/cache_v7.c3
-rw-r--r--arch/arm/include/asm/cache.h1
-rw-r--r--arch/arm/lib/cache-cp15.c6
3 files changed, 0 insertions, 10 deletions
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 146cf52608..19ff432352 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -176,9 +176,6 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop)
{
}
-void arm_init_domains(void)
-{
-}
#endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */
#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index c20e05ec7f..b10edf805b 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -35,7 +35,6 @@ void l2_cache_disable(void);
void set_section_dcache(int section, enum dcache_option option);
void arm_init_before_mmu(void);
-void arm_init_domains(void);
void cpu_cache_initialization(void);
void dram_bank_mmu_setup(int bank);
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 4854c39a35..aab1bf4360 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -22,10 +22,6 @@ __weak void arm_init_before_mmu(void)
{
}
-__weak void arm_init_domains(void)
-{
-}
-
static void set_section_phys(int section, phys_addr_t phys,
enum dcache_option option)
{
@@ -210,8 +206,6 @@ static inline void mmu_setup(void)
asm volatile("mcr p15, 0, %0, c3, c0, 0"
: : "r" (0x55555555));
- arm_init_domains();
-
/* and enable the mmu */
reg = get_cr(); /* get control reg. */
set_cr(reg | CR_M);