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-rw-r--r--arch/arm/dts/zynqmp-zc1232-revA.dts2
-rw-r--r--arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts2
-rw-r--r--arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts2
-rw-r--r--arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts2
-rw-r--r--arch/arm/dts/zynqmp-zcu100-revC.dts2
-rw-r--r--arch/arm/dts/zynqmp-zcu102-revA.dts2
-rw-r--r--arch/arm/dts/zynqmp-zcu104-revA.dts2
-rw-r--r--arch/arm/dts/zynqmp-zcu104-revC.dts2
-rw-r--r--arch/arm/dts/zynqmp-zcu106-revA.dts2
-rw-r--r--arch/arm/dts/zynqmp-zcu111-revA.dts2
-rw-r--r--arch/arm/dts/zynqmp-zcu1275-revA.dts2
-rw-r--r--arch/arm/dts/zynqmp-zcu1275-revB.dts2
-rw-r--r--arch/arm/dts/zynqmp-zcu1285-revA.dts2
-rw-r--r--arch/arm/dts/zynqmp-zcu208-revA.dts2
-rw-r--r--arch/arm/dts/zynqmp-zcu216-revA.dts2
-rw-r--r--arch/arm/dts/zynqmp.dtsi2
16 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/dts/zynqmp-zc1232-revA.dts b/arch/arm/dts/zynqmp-zc1232-revA.dts
index ef7cf0a36b2..65dd4e1f3a5 100644
--- a/arch/arm/dts/zynqmp-zc1232-revA.dts
+++ b/arch/arm/dts/zynqmp-zc1232-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZC1232
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
index 039a8da1a96..0c6a2a92dfe 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP zc1751-xm015-dc1
*
- * (C) Copyright 2015 - 2020, Xilinx, Inc.
+ * (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
index d6e92480335..1a8cfdeb7f4 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP zc1751-xm016-dc2
*
- * (C) Copyright 2015 - 2020, Xilinx, Inc.
+ * (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
index 46b27a00094..41ab20c3895 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP zc1751-xm019-dc5
*
- * (C) Copyright 2015 - 2020, Xilinx, Inc.
+ * (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
* Michal Simek <michal.simek@xilinx.com>
diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts
index 3be69ad9bce..cad1a23e953 100644
--- a/arch/arm/dts/zynqmp-zcu100-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu100-revC.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU100 revC
*
- * (C) Copyright 2016 - 2020, Xilinx, Inc.
+ * (C) Copyright 2016 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
* Nathalie Chan King Choy
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index ec61b7089da..7190e876d8d 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU102 RevA
*
- * (C) Copyright 2015 - 2020, Xilinx, Inc.
+ * (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts
index c25ac9af48e..76c635f0d46 100644
--- a/arch/arm/dts/zynqmp-zcu104-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU104
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts
index ce9d8fb3b81..f9eb4caaf8c 100644
--- a/arch/arm/dts/zynqmp-zcu104-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revC.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU104
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts
index 2fd41ad2d52..4da7a3edf54 100644
--- a/arch/arm/dts/zynqmp-zcu106-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu106-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU106
*
- * (C) Copyright 2016 - 2020, Xilinx, Inc.
+ * (C) Copyright 2016 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts
index 10bb45b49f1..85821065dd4 100644
--- a/arch/arm/dts/zynqmp-zcu111-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu111-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU111
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zcu1275-revA.dts b/arch/arm/dts/zynqmp-zcu1275-revA.dts
index b9a9d9802d9..10d8bc8f9a1 100644
--- a/arch/arm/dts/zynqmp-zcu1275-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu1275-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU1275
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
* Siva Durga Prasad Paladugu <sivadur@xilinx.com>
diff --git a/arch/arm/dts/zynqmp-zcu1275-revB.dts b/arch/arm/dts/zynqmp-zcu1275-revB.dts
index f14707419b4..97ae1b2d2d7 100644
--- a/arch/arm/dts/zynqmp-zcu1275-revB.dts
+++ b/arch/arm/dts/zynqmp-zcu1275-revB.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU1275 RevB
*
- * (C) Copyright 2018 - 2020, Xilinx, Inc.
+ * (C) Copyright 2018 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
* Siva Durga Prasad Paladugu <sivadur@xilinx.com>
diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts b/arch/arm/dts/zynqmp-zcu1285-revA.dts
index 42a73ea31ae..eaf99a9fa82 100644
--- a/arch/arm/dts/zynqmp-zcu1285-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU1285 RevA
*
- * (C) Copyright 2018 - 2020, Xilinx, Inc.
+ * (C) Copyright 2018 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
* Siva Durga Prasad Paladugu <sivadur@xilinx.com>
diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts
index 496e8d1de22..03c84ae21ac 100644
--- a/arch/arm/dts/zynqmp-zcu208-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu208-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU208
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts
index 3a205c08944..fd1d9bfbd19 100644
--- a/arch/arm/dts/zynqmp-zcu216-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu216-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU216
*
- * (C) Copyright 2017 - 2020, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index deb3fa3ab3f..47ffdf1b165 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP
*
- * (C) Copyright 2014 - 2020, Xilinx, Inc.
+ * (C) Copyright 2014 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*
generated by cgit v1.2.3 (git 2.0.4) at 2024-10-05 13:29:39 +0000