diff options
| -rw-r--r-- | drivers/ddr/altera/sdram_arria10.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c index 1f2b7f48199..29ea7492f30 100644 --- a/drivers/ddr/altera/sdram_arria10.c +++ b/drivers/ddr/altera/sdram_arria10.c @@ -215,6 +215,30 @@ static int ddr_setup(void) return 0; } +static int sdram_is_ecc_enabled(void) +{ + return !!(readl(&socfpga_ecc_hmc_base->eccctrl) & + ALT_ECC_HMC_OCP_ECCCTL_ECC_EN_SET_MSK); +} + +/* Initialize SDRAM ECC bits to avoid false DBE */ +static void sdram_init_ecc_bits(u32 size) +{ + icache_enable(); + + memset(0, 0, 0x8000); + gd->arch.tlb_addr = 0x4000; + gd->arch.tlb_size = PGTABLE_SIZE; + + dcache_enable(); + + printf("DDRCAL: Scrubbing ECC RAM (%i MiB).\n", size >> 20); + memset((void *)0x8000, 0, size - 0x8000); + flush_dcache_all(); + printf("DDRCAL: Scrubbing ECC RAM done.\n"); + dcache_disable(); +} + /* Function to startup the SDRAM*/ static int sdram_startup(void) { @@ -711,5 +735,8 @@ int ddr_calibration_sequence(void) if (of_sdram_firewall_setup(gd->fdt_blob)) puts("FW: Error Configuring Firewall\n"); + if (sdram_is_ecc_enabled()) + sdram_init_ecc_bits(gd->ram_size); + return 0; } |