diff options
| -rw-r--r-- | drivers/spi/cadence_qspi.c | 2 | ||||
| -rw-r--r-- | drivers/spi/cadence_qspi.h | 2 | ||||
| -rw-r--r-- | drivers/spi/cadence_qspi_apb.c | 7 |
3 files changed, 8 insertions, 3 deletions
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 11fce9c4fe5..efdb178450e 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -256,7 +256,7 @@ static int cadence_spi_xfer(struct udevice *dev, unsigned int bitlen, break; case CQSPI_INDIRECT_WRITE: err = cadence_qspi_apb_indirect_write_setup - (plat, priv->cmd_len, cmd_buf); + (plat, priv->cmd_len, dm_plat->mode, cmd_buf); if (!err) { err = cadence_qspi_apb_indirect_write_execute (plat, data_bytes, dout); diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index 055900def00..b4914071308 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -60,7 +60,7 @@ int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat, int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat, unsigned int rxlen, u8 *rxbuf); int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat, - unsigned int cmdlen, const u8 *cmdbuf); + unsigned int cmdlen, unsigned int tx_width, const u8 *cmdbuf); int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat, unsigned int txlen, const u8 *txbuf); diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index a8af3520303..55a7501913a 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -77,6 +77,7 @@ #define CQSPI_REG_WR_INSTR 0x08 #define CQSPI_REG_WR_INSTR_OPCODE_LSB 0 +#define CQSPI_REG_WR_INSTR_TYPE_DATA_LSB 16 #define CQSPI_REG_DELAY 0x0C #define CQSPI_REG_DELAY_TSLCH_LSB 0 @@ -686,7 +687,7 @@ failrd: /* Opcode + Address (3/4 bytes) */ int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat, - unsigned int cmdlen, const u8 *cmdbuf) + unsigned int cmdlen, unsigned int tx_width, const u8 *cmdbuf) { unsigned int reg; unsigned int addr_bytes = cmdlen > 4 ? 4 : 3; @@ -702,6 +703,10 @@ int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat, /* Configure the opcode */ reg = cmdbuf[0] << CQSPI_REG_WR_INSTR_OPCODE_LSB; + + if (tx_width & SPI_TX_QUAD) + reg |= CQSPI_INST_TYPE_QUAD << CQSPI_REG_WR_INSTR_TYPE_DATA_LSB; + writel(reg, plat->regbase + CQSPI_REG_WR_INSTR); /* Setup write address. */ |