diff options
| -rw-r--r-- | configs/vf610twr_defconfig | 2 | ||||
| -rw-r--r-- | doc/README.nand | 18 | ||||
| -rw-r--r-- | drivers/mtd/nand/Kconfig | 30 | ||||
| -rw-r--r-- | include/configs/vf610twr.h | 3 |
4 files changed, 32 insertions, 21 deletions
diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index 7de374a406..5e0ac9fc3b 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -1,3 +1,5 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg,ENV_IS_IN_MMC" CONFIG_ARM=y CONFIG_TARGET_VF610TWR=y +CONFIG_NAND_VF610_NFC=y +CONFIG_SYS_NAND_BUSWIDTH_16BIT=y diff --git a/doc/README.nand b/doc/README.nand index 46d7edd179..0ff56331d5 100644 --- a/doc/README.nand +++ b/doc/README.nand @@ -188,24 +188,6 @@ Configuration Options: This is used by SoC platforms which do not have built-in ELM hardware engine required for BCH ECC correction. - CONFIG_SYS_NAND_BUSWIDTH_16BIT - Indicates that NAND device has 16-bit wide data-bus. In absence of this - config, bus-width of NAND device is assumed to be either 8-bit and later - determined by reading ONFI params. - Above config is useful when NAND device's bus-width information cannot - be determined from on-chip ONFI params, like in following scenarios: - - SPL boot does not support reading of ONFI parameters. This is done to - keep SPL code foot-print small. - - In current U-Boot flow using nand_init(), driver initialization - happens in board_nand_init() which is called before any device probe - (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are - not available while configuring controller. So a static CONFIG_NAND_xx - is needed to know the device's bus-width in advance. - Some drivers using above config are: - drivers/mtd/nand/mxc_nand.c - drivers/mtd/nand/ndfc.c - drivers/mtd/nand/omap_gpmc.c - Platform specific options ========================= diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 72825c3e2e..0a9e96f60a 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -32,6 +32,36 @@ config NAND_DENALI_SPARE_AREA_SKIP_BYTES of OOB area before last ECC sector data starts. This is potentially used to preserve the bad block marker in the OOB area. +config NAND_VF610_NFC + bool "Support for Freescale NFC for VF610/MPC5125" + select SYS_NAND_SELF_INIT + help + Enables support for NAND Flash Controller on some Freescale + processors like the VF610, MPC5125, MCF54418 or Kinetis K70. + The driver supports a maximum 2k page size. The driver + currently does not support hardware ECC. + +comment "Generic NAND options" + +# Enhance depends when converting drivers to Kconfig which use this config +# option (mxc_nand, ndfc, omap_gpmc). +config SYS_NAND_BUSWIDTH_16BIT + bool "Use 16-bit NAND interface" + depends on NAND_VF610_NFC + help + Indicates that NAND device has 16-bit wide data-bus. In absence of this + config, bus-width of NAND device is assumed to be either 8-bit and later + determined by reading ONFI params. + Above config is useful when NAND device's bus-width information cannot + be determined from on-chip ONFI params, like in following scenarios: + - SPL boot does not support reading of ONFI parameters. This is done to + keep SPL code foot-print small. + - In current U-Boot flow using nand_init(), driver initialization + happens in board_nand_init() which is called before any device probe + (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are + not available while configuring controller. So a static CONFIG_NAND_xx + is needed to know the device's bus-width in advance. + if SPL config SPL_NAND_DENALI diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 05bc7d0d9e..621aa13484 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -50,10 +50,7 @@ #define CONFIG_CMD_NAND_TRIMFFS #ifdef CONFIG_CMD_NAND -#define CONFIG_NAND_VF610_NFC -#define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_USE_ARCH_MEMCPY -#define CONFIG_SYS_NAND_BUSWIDTH_16BIT #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR |